RX MID CHANNELS 850: CH190 -- 881,6 GSM: CH 62 -- 947,4 MHz EGSM: CH 37 -- 942,4Mhz DCS: CH 700 -- 1842,8MHz PCS: CH 661

-- 1960MHz
18,31 2 4

VRF2

Internal Antenna

(1.3V, 399/156MHz 1.55V, 532/208MHz)

VCORE VDIG_1.8V

PA + Antenna Switch
TX_HB DCS/PCS OUT
25

M1
(indicates mechanical Antenna connection to U800)

(2,8V ) VRFDIG (2,8V ) VIOHI (1,775V ) VRFCP (3,2V ) EFUSE_PGM (from Atlas ) VMMC1 (to Atlas VMMC_EN ) (from Atlas ) BAT_DETB (Reset ) SIM_RST (Clock ) SIM_CLK (Data In /OUT) SIM_IO

E2 M18 H1 A11.. V5.. M21 H18 AG13 AA12 B17 B16 C16

SCMA11
Power Power

U800

DDR DATA D0-15 DATA BUS D0-15 ADDRESS BUS A0-23

External Memory

ANT_DETB

FL102

3
6

J1

Mechanical Antenna Switch

SIM

Interface 133MHz

Interface

B+
2

11,14....

FL101

TX_LB

26

U50 - RAPTOR
1900 MHZ

GSM850/ GSM900 OUT

1 234 10 16

15

9 13 8 17

1800 MHz

900 MHz

SC140 156MHz turbo 208MHz B5 VRAM P ( PA Power Control) TX_EN ( Trans mitt E nable) LB_HB US_EURO TX_ANT_SW_EN IP C_BCM A13 Digital RF Control Interface Bluetooth Interface

850 MHz

VDETECT

2.BCM: Bias Control mode - for GMSK mode (PA gain varies according to power step and fixed input PA power)

(T rans mitt E nabl e)

TX_START RESETB

PA Power Control selection via VRAMP, TX_HB and TX_LB 1. IPC: Input Power Control mode - for EDGE mode (PA gain is fixed and PA input power varies)

(to Atlas)

AD_TRIG

F14

AG3 AD9 AF8 AF7 F26 AD12 E26 N28.. AB26 AC28 AC23 AC26 AA27 AB27 W22 W26 Y28 V23 AA22 AG18 Y27 C19 AA26 AF19.. AF25 AH23 AD26 AF23 AC19 AG21 AG11

BT_RTS_B BT_CTS_B BT_RX_AP_TX BT_TX_AP_RX BT_RESET_B BT_WAKE_B BT_HOST_WAKE_B IPU_LD(15:0) IPU_D1CS_LD16 IPU_D0_VSYNC_LD17 IPU_D3_HSYNC IPU_D3_VSYNC IPU_D3_DRDY IPU_D3_CLK SER_EN GPIO_DISP_SD IPU_SD_MISO IPU_SD_MOSI IPU_SD_CLK GPIO_DISP_RST_B GPIO_CLI_SER_RS IPU_SD_D1_CS IPU_2D_CS_B CSI_D(7:0) CSI_MCLK CSI_VSYNC CSI_HSYNC CSI_PIXCLK GPIO_CAM_RST_B GPIO_CAM_PD CLI_ID SD1_CLK SD1_CMD SD1_DATA 0-3 MMC_CLK MMC_CMD MMC_DATA0

(from/to Bluetooth module U300)

Memory
(13 MHz)

Quard Saw Filter and Matching 1 3 4 6

High Band 1900MHz High Band 1800MHz Low Band
900MHz

FL100

GSM / EDGE Tranceiver IC

14 15 12 13 10 11 8 9 K12 L12 G12 H12 D12 E12 A12 B12
L8 L10

BB_SYS_CLK (from Atlas) 32K_CLK

U100 - TRANSAAM
LNA LNA

A4

B3

A1 C3 C2A2 B2

E2 B9

PA Control

GPIO

AH10 AG8 B14 W28

Clock Interface

16KB 16KB 128KB IPU Interface (Display)

(from/to Serializer U650)

LPF
DC Correct

LNA

Digital Radio Receiver RX CP

RX / TX In / Out -Put c ontrol er

AMR1
D1 E3 G3

RXTXEN RXTXDATA LEG_SPI_READY

C4 E3 A15 Digital BB Interface

399MHz turbo 532MHz

(from/to J650 /Flip)

128MB NAND ROM 64MB SDRAM

Power and Antenna Control

Memory 16KB 32KB

U2 V8 R1 M2 M3 U3 W7 V3 W8 V2 F7 C3 G8 B3 C2 F3 C8 T1 H2 P1 R7

DDR_CLK DDR_CAS_B DDR_RAS_B DDR_SDWE_B DDR_CS3B DDR_SDCKE DQM0 DQM1 DDR_SDBA0 DDR_SDBA1 NAND_CS_B NAND_RE_B NAND_WE_B NAND_WP_B NAND_ALE NAND_CLE NAND_R_B SDCLK_B MA10 DQS0 DQS1

C7 E6 F6 D6 D5 D7 K6 K7 E5 F5 G3 F3 M3 N3 L3 K3 E3 C6 G5 L6 L7

U700 FLASH
F4 E4... VDIG_1.8V (from Atlas) VSDRAM (from Atlas)

(to U650/Serializer)

Low Band 850MHz

LNA

4 90
RX VCO

TX VCO

TX CP Phase Modulation

Synthesiz er RX / TX Cl oc k

2 90

G1 F3 J1 J3 K4 K5 D2 F1 E1

SYSCLKEN SYSCLK BT_CLK BT_CLK_EN 1 Y101 2 3 26MHz CTRLDATA CTRLCLK CTRLEN

(Data In /OUT) (Clock ) (Chip select)

Camera Interface

(from/to J650 /Flip)

Serial Int erfac e

C6 C5 C7

SPI L27 SD Memory P22 Interface M27.. J28 M26 N22

(from/toTransFlash)

LPF Amplitude Modulation

Transmit Modulator

LPF

ADC Voltage Reg.

J8.. B4.. J5 H2..

VRF1 VRF2 VRFCP VRFDIG

(VCCs from Atlas)

(from/to SIM)

VDIG_1.8V

Hall Sens.
B19 AF13 AG17 AG20 AE27 B18 AH13 AC15 FLIP_DET EL_EN2 (to U901) LOWBAT_B (to U900) POWER_RDY (AMR) POWER_RDY (DSP) VVIB_EN (to U900) VFUSE_SEL (to U940) TOUCH_INTB (from J650)

U902

VIOHI

Keyboard Matrix 0-9,*,#,5-Way Navigation

KPP_COL(5:0) KPP_ROW(4:0)

FL771 FL770

GPIO

AB17.. Keypad Interface AB16..

(to U900)

Side Keys

KPP_COL(2,4,5) KPP_ROW(3,4)
J22

UART / USB Interface

AB15 L26 J26 F27 H27 J27

MQSPI
AF24 AE26 AG26 AD27 A19

Timer Interface
AF10 AF27 AF11 AH9 A20 AF5 (AMR)

I2C BUS
AD28 AH24

2nd 1st One Wire Serial Audio Serial Audio Bus Port Interface Port Interface
G27 AB7 AG7 AF9 AG6 AB8 AH5 AB9 AH6

(fr amesync)

BB_STANDBY RESETB WDOG_AP WDOG_BP

MMSAP_CLK (clock) MMSAP _F S (f rames ync) MMSAP _RX MMSAP _TX

OneWire data from Bat ter y

USB_VPI N USB_VMIN USB_VPO UT USB_VMOUT USB_XRXD USB_TXEN_B USB_XCVR_EN

BB_SP I_CLK BB_SPI_MOSI BB_SP I_MI SO PM_SPI_CS PM_INT

(clock)

Revision Overview Rev. 1.0: Initial Block Diagram

I 2C_CLK I 2C_DAT

ASAP _CLK ASAP_FS ASAP_RX ASAP_TX

BATT_DAT

^ Servive, Engineering & Optimization LEVEL 3 AL Block Diagram U9 Page 1of 2 2007.08.10 Rev. 1.0

U9

(fr o Atlas) m

(to Atlas )

( 2 wire Serial Bus , U 0, 50 Sl ider)

(from/to U900 USB Com.)

SCMA11/Atlas Communication

LVS

(from/to U900)

(from/to U900)

EL Backlight Driver

T-Flash

U901
(enable from SCMA11)

EL Driver
3 10 EL_LAMP_V 8 EL_LAMP_V+

(from/to SMA11)

EL_EN2

SD1_DATA(0) SD1_DATA(1) SD1_DATA(2) SD1_DATA(3) SD1_CMD SD1_CLK VTFLASH

12 11 10 9 8 7

FL620
1 2 3 4 5 6

T-Flash Con. J620

7 8 1 2 3 5 4 6

Sim
MMC_DATA0 MMC_CMD MMC_CLK
(from/to SMA11)

FL610
1 2 6 3 5 4 12 11 7 10 8 9

SIM Con. M610

8 7 3 6 4 5 2

Serializer / Flip Con.

VRFDIG IPU_LD(15:0) IPU_D1CS_LD16 IPU_D0_VSYNC_LD17 IPU_D3_HSYNC IPU_D3_VSYNC IPU_D3_DRDY IPU_D3_CLK GPIO_DISP_SD SER_EN GPIO_DISP_RST_B
(from Atlas)

Serializer U650
C2.. C6.. F5 G6 C4 C3 B3 B4 A3 G3 G2 F1 G1 E1 D1 SER_DATAM SER_DATAP SER_CLKM SER_CLKP IPU_SD_CLK IPU_SD_MOSI IPU_SD_MISO IPU_SD_D1_CS IPU_D2_CS_B SOL TOUCH_INTB (from Atlas) EAR_SPP EAR_SPM I2C_DAT I2C_CLK

Flip Con. J650

45 47 41 39 35 33 31 38 32 40 24 42 48 46 8 10 22 6 3,5 28 36 26 16 27.. 14 12 18 11 9 7 29 30 VBOOST VIOHI VRFDIG USB_PWR VDIG_1.8V B+ VCAM
(from Atlas)

(from Atlas)

VBOOST

(from Atlas)

SIM_CLK SIM_RST SIM_IO (from Atlas) VMMC1

(from/to Serializer SCMA11)

Bluetooth
P301
BT_ANT

CSI_D<7..0> GPIO_CAM_RST_B GPIO_CAM_PD CLI_ID CSI_MCLK CSI_VSYNC CSI_HSYNC CSI_PIXCLK GPIO_CLI_SER_RS

E-Fuse circuit
(from SCMA11) VFUSE_SEL

Bluetooth
(from Atlas)

(from/ to U301 BT, Neptune - BT - Neptune Communication and Wakeup)

VBTRF VIOLO BT_RX_AP_TX BT_TX_AP_RX BT_CTS_B BT_RTS_B

F1,F5.. A3,8... E4 E5 E8 E7 C8 F7 E3 D7 E2 F6

FL301
7 H1 H2 C5 C7 A7 B6 ASAP_TX ASAP_RX ASAP_FS ASAP_CLK
( fr om J600)

VBOOST
(from/ to SCMA11 Serial Audio for Ringtone and Voice Audio)

U940

EFUSE_PGM (to SCMA11 / 3,2V ) VFUSE_SENSE (to Atlas)

BT_WAKE_B BT_HOST_WAKE_B BT_RESET_B BT_CLK_EN BT_CLK (from Atlas) 32K_CLK

(to U250) (from U250)

U301

VF USE_S EL ( to U940)

ON_OFF_ END_B

USB_VM IN USB_ VPIN USB_ XRXD USB_ VPOUT USB_ VMOUT USB_TXEN_B USB_ XCVR_EN

(from/ to SCMA11 Serial Audio for High Quality Stereo)

SCMA11 Atlas USB/ RS232 Communication

SCMA11/Atlas Communication

Light Sensor U600

LT_SNS_ADC LT_SNS_EN

Charger and Powersource Control Charger

VIOHI
(Bias) (from Acesory Connector) (EXT Power)

BATT CONN. J903

2 3 1 4
VR991/VR992 VR993 BATT+_RAW

ASAP _CLK

ASAP_FS ASAP_RX ASAP_TX

M MSAP_CLK MMSAP_FS MMSAP_RX MMSAP_TX

BB_SPI_CLK BB_SPI_MOSI BB_SPI_MISO PM_SPI_CS PM_INT

USB_PWR
(Bias) (One Wire Bus to SCMA11)

ADOUT

BATT_DAT M7 M9 M6 L5 M8 M2 M5 M3 E16 E16 B2 B3 B5 C5 C6 C4 C3 N5 N8 P7 N6 P5 G8

GND

Speaker
TP_LSPP TP_LSPM
(to J600)

E5 P14

LSPP LSPM EAR_SPP EAR_SPM MC1RB MC1RIN

V5 V4 V9 V10 R2 V2

13 Bit SAP Alert Amplifier Handset Amplifier Microphone Supply Amplifier Headset Amplifier Stereo Det. Headset Det.

(tx) (rx) CODEC 16 BIT STEREO

USB/RS232
(communication)

PRI SPI CNTL. LOGIC

ON LOGIC

GPIO

MK900 4

U900 ATLAS UL

MIC

K13 A18.. AD M14 CONV. D15 C14 A/D A14 B17 B13 V18 C18 D13 A12 B15

BATTDETB (toSCMA11) CHRG_PWR (Sense) BATT_TEMP_SENSE BATT+_RAW (Battery Sense) CHRGISENSEN BATTISNS CHRGISENSEP (Charger+ Sense) B+ (Sense) VFUSE_SENSE CHRG_CTRL_2 SOL (toJ600) BATTFET_CTRL BPFET
(Current Control)

Q900 G

S D S R907 G R902 D S Q903

Battery to BPLUS Switch
Color definition only for this section ! Main Charge Path B+ support without Ext Charger B+ support with Ext Charger

CHARGE CONTR.

Q901 G

NC NC NC

Logic

B+

(Main Source for Atlas)

MICROUSB
J902

LED CNTL. C16 V14

B+ Sense

D Q902 S
VBUS to BP Switch

(from Atlas) VBOOST

B4 D3 D2 C2

1 2 3 4 5

USB_PWR USB_DM USB_DP EMU_ID

(to Charging Circuit)

4 3

(PPD device support) USB_PWR

FL902

ESD
1 2

VR952 VR961

USB_DM USB_DP
(Accessory Detection signal)

VBUS 5V Pass FET USB EMU Interface

V_COIN_CELL (to J650)

Y900

D900

USB_PWR

(from Mini USB Connector) (EXT Power)

USB_ID

F7
S witcher 2

TIMER
VIB REG
to Vibrator Mot or Switcher 3 Switcher 1

CP R ef. RE G.

Di g. R F RE G.

AU DIO RE G.

SIM Reg. Cam V11 Re g.

DVS 1A

RF2 Dri ver

RF1 Dri ver

MM C RE G.

Audio RE G.

IO L RE G.

IO H RE G.

G1-G4
(Shield)

K17

V3, J4. ... .. ..

V16 R14 L3 F17 N15 H14 G15 U17 N14

32K_CLK (to SCMA11 and U300) WDOG_AP BB_SYS_CLK (from SCMA11 / 13MHz) WDOG_BP WATCHDOG_B ADTRIG (from SCMA11, Tx Mode indication for Atlas) BB_STANDBY (from SCMA11) RESETB (to SCMA11, U100) POWER_RDY (from SCMA11) LOBAT_B (to SCMA11)

(from SCMA11)

V13

U10

G18

H18

R18

E 19
( from SCMA11)

L7 F16

B6

J15

G2

K8

J6

K2

F3

(f rom SCM A11)VMMC1_EN

( from SCMA11/ Dynamic Voltage scaling)

Q905

Q906

( 1.3 39 V, 9/156MHz 1.55V, 532/208MHz)

(Mai n Source- f rom Q902)

( 1,77 ) 5V

( 2,8V)

(2,8V)

(2,8V )

( 1,3V ) VVIB
2

VBTRF

VRF CP

VIOLO

VRF DIG

VTFLASH

VIO HI

VRF 2_DRV

VRF 1_DRV

VMM C_DRV

B+

VVIB_EN_EN

VBOOST

VDIG _1.8V

VAUDIO

VCORE

VVAM

(1,8V)

(2,85V)

(2 ,75V)

( 2,8 ) V

LVS

E2

Q907

VIB Motor

U903
1

(2,775V) VRF 2

B+

(2,775V) VRF 1

Servive, Engineering & Optimization LEVEL 3 AL Block Diagram U9

2007.08.10 Rev. 1.0 Page 2of 2

B+

U9

(2,775V) VMMC1