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PLASMA TV SERVICE MANUAL


CHASSIS : PA01A

MODEL : 50PJ350
CAUTION

50PJ350-AB

BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62882001(1012-REV01)

Printed in Korea

CONTENTS

CONTENTS ............................................................................................................................... 2 SAFETY PRECAUTIONS ...........................................................................................................3 SPECIFICATION.........................................................................................................................4 ADJUSTMENT INSTRUCTION ..................................................................................................6 TROUBLESHOOTING GUIDE..................................................................................................11 BLOCK DIAGRAM ...................................................................................................................22 EXPLODED VIEW ...................................................................................................................23 SVC. SHEET ................................................................................................................................

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this monitor is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1W), keep the resistor 10mm away from PCB. Keep wires away from high voltage or high temperature parts. Due to high vacuum and large surface area of picture tube, extreme care should be used in handling the Picture Tube. Do not lift the Picture tube by it's Neck.

Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet. Do not use a line Isolation Transformer during this check. Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.

Leakage Current Hot Check circuit

AC Volt-meter

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1M and 5.2M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.

To Instrument's exposed METALLIC PARTS

0.15uF

Good Earth Ground such as WATER PIPE, CONDUIT etc.

1.5 Kohm/10W

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
V

Application Range
This spec is applied to the PDP TV used PA01A Chassis.

Specification
Each part is tested as below without special appointment. 1) Temperature : 255C (779F), CST : 405 2) Relative Humidity: 6510% 3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz) * Standard Voltage of each product is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.

Test Method
1) Performance : LGE TV test method followed. 2) Demanded other specification Safety : CB specification EMC : CISPR 13 specification

Test Method
No 1. 2. Item Broadcasting system Available Channel 1)DTV -.VHF : 6 ~ 12 -.UHF : 27 ~ 69 2) ATV -.VHF : 0 ~ 20 -.UHD : 21 ~ 75 3. Tuner IF 1) PAL : 38.90MHz(Picture), 34.40MHz(Sound) 2) DVB-T : 36.125MHz 4. 5. Input Voltage Screen Size AC 100 ~ 240 V, 50/60Hz 42 inch XGA(1024 x 768) 50 inch Wide(1365 x 768) 50 inch Wide(1920 1080) 60 inch Wide(1920 1080) 6. 7. 8. 9. Aspect Ratio Module Operating Environment Storage Environment 16:9 42/50T1, 50/60R1 1) Temp : 0 ~ 40 deg 2) Humidity : ~ 80 % 1) Temp : -20 ~ 60 deg 2) Humidity : ~ 85 % Mark : 240V, 50Hz Specification PAL-B/B, DTV : DVB-T Remark

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

Chroma & Brightness

(1) FHD Module (50 1 Module, 38% Glass Filter ) * Warning : When measuring following test items, Dynamic Colour & Dynamic Contrast should be turned off. No 1. Item White peak brightness Min 369 Typ 410 Max Unit cd/m2 Remark (*) Peak Brightness Mode -1/100 white Window pattern (Typically 1% Window size) -100IRE (255Gray) -Picture: Vivid (Medium) -Input: HDMI-PC(1920*1080 60Hz) *Peak Brightness Condition may Slightly different between sets. 158 2. White average brightness 44 173 50 cd/m2 -25/100 white Window pattern - 100% Window White Pattern - 100IRE(255Gray) - Picture: Vivid(Medium ) 3. 4. Brightness uniformity Color Coordinate Red Green Blue 5. 6. White X Y X Y X Y X Y Color coordinate uniformity Contrast ratio at dark room -10 0.270 0.278 0.635 0.318 0.242 0.595 -0.01 100k: 1 0 0.285 0.293 0.640 0.333 0.300 0.600 0.150 0.065 Average 1,000k: 1 +10 0.300 0.303 0.345 0.305 0.158 0.075 +0.01 - 85IRE 100% Window White Pattern - Picture: Vivid(Medium) -1/100 white window pattern(Peak mode) -100IRE(255Gray) -Picture: Vivid(Medium) -Input: HDMI-PC (1920*1080 60Hz) 7. Color Temperature Medium Warm Cool X Y X Y X Y 0.261 0.268 0.270 0.278 0.298 0.314 0.276 0.283 0.285 0.293 0.313 0.329 0.291 0.298 0.300 0.308 0.328 0.344 - 85IRE 100% Window White Pattern Warm : ColorGamut => WIDE Cool : Color temperature C30 Meduum : Color temperature 0 Warm : Color temperature W30 % - 85IRE(216Gray) 100% Window White Pattern - Picture: Vivid(Medium) - White : 85IRE(216Gray) 100% Window White Pattern - R/G/B : 100IRE(255Gray) 100% Window White Pattern - Picture: Vivid(Medium ) - 100% Window

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

ADJUSTMENT INSTRUCTION
1. Application Range
This spec. sheet is applied to all of the PA01A chassis manufactured at LG TV Plant all over the world. Caution - Use 'power on' button of a service R/C to power on TV set. - Do not connect any external input cable if there is no any specifics.

2. Designation
Caution: The module keeping condition 1. The module keeping condition: The normal temperature condition(more than 15C) -> Immediately the line supply. 2. The module keeping condition: 0C -> The module must be kept for more than 2 hours at the normal temperature. 3. The module keeping condition: -20C -> The module must be kept for more than 3 hours at the normal temperature. 4. The case of Gu-mi factory at the winter season. -> The module must be kept for more than 5 minutes at the heating zone(40C~45C). (1) The adjustment is according to the order which is designated and which must be followed, according to the plan which can be changed only on agreeing. (2) If there is no specific designation, the adjustment must be performed in the circumstance of 25 5C of temperature and 6510% of relative humidity. (3) The input voltage of the set must keep 100~240V, 50/60Hz. (4) Input signal Unit: Product Specification Standard. (5) The set must be operated for about 5 minutes prior to the adjustment. . * After turning on RGB Full Window pattern in HEAT-RUN Mode, the receiver must be operated. * Enter into HEAT-RUN MODE 1) Press the POWER ON button on R/C for adjustment. 2) Press the ADJ button on R/C and enter EZ ADJUST - Select "7. Test Pattern" by using F / G (CH +/-) and press ENTER(V) - Select "White" by using F / G (VOL +/-) and press ENTER(V)
O O

3. Update S/W using auto download through the USB.


Caution: S/W version of USB file (xxx.epk) must be bigger than one which is downloaded previously. 1. Insert the USB stick to the USB socket 2. A downloaded file in USB stick will be detected automatically. 3. If S/W version of USB file (xxx.epk) is bigger than one which is downloaded previously, the message, Copying files from memory, will appear. 4. If an update procedure was completed, TV set will be turned off and on automatically. 5. If TV set is turned on, check an updated version. * If a downloaded version is more bigger than one of which TV set had, TV set can lost channel data. In this case, you have to scan channels again.

4. After downloading S/W, adjust TOOL OPTION.


(1) Push "IN-START" button on a service R/C. (2) Select "Tool Option 1" and Push OK button. (3) Put the number of a below table in order of a suffix of the Tool Option(X). (Each model has a different number.) Model 42PJ350-AB 42PJ650-AA 50PJ350-AB 50PJ650-AA 50PK550-AA 60PK550-AA Tool Option1 Tool Option2 Tool Option3 Tool Option4 25024 24896 37312 37184 36992 49280 2632 2632 2632 2632 2632 2632 51404 51408 51404 51408 51404 51404 4384 4384 4384 4384 4384 4384

Set heat run should be activated without a signal generator. Single color patterns (RED / BLUE / GREEN) of HEAT RUN MODE are used to check a plasma panel. Caution: If you turn on a still screen more than 20 minutes (Especially digital pattern, cross hatch pattern), an after image may be made in the black level part of the screen.

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LGE Internal Use Only

5. ADC Calibration Procedure


(1) Input the component (480i/Horizontal Color Bar) signal to a TV set. 1) Input Signal Timing : Component 480i (Other external connection is unnecessary except the component before executing ADC calibration.) 2) Input Signal Pattern

6. EDID Download Procedure


(1) Push ADJ button on a service R/C. (2) Enter EDID auto download mode by selecting 8. EDID D/L. (3) If you select Start on a dialog box of the screen, EDID download will be begun automatically.

<Horizontal Color Bar pattern> @ MODEL: 209 in Pattern Generator(480i Mode) @ PATTERN : 65 in Pattern Generator(MSPG-925 SERISE) (2) Push ADJ button on a service R/C. (3) Enter internal ADC mode by selecting 5. ADC Calibration. (4) If you select Start on a dialog box of the screen, ADC calibration will be begun.

(4) Press EXIT button on a service R/C. (5) EDID Data 1) HDMI (HD Models, 256 bytes)

Caution: Dont connect any external input cable except the component input(480i/Horizontal_Color_Bar) to adjust ADC calibration
O

Auto ADC Calibration Map(RS-232C) NO Item CMD1 CMD2 Data0 A A 0 0 When transfer the Made In, Carry the command.

2) RGB (HD Models, 128 bytes)

Enter Adjust Adjust MODE Mode In ADC Adjust

ADC Adjust

0 Automatically adjustment

# Adjust Sequence - aa 00 00 [Enter Adjust Mode] - xb 00 40 [Component1 Input (480i)] - ad 00 10 [Adjust 480i Comp1] - xb 00 60 [RGB Input (1024*768)] - ad 00 10 [Adjust 1024*768 RGB] - aa 00 90 End Adjust mode
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

EDID Data detailing (, , , , , )

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LGE Internal Use Only

Product ID MODEL ALL Model ALL Model EDID MODEL LG DTV LG DTV PRODUCT_ID 0001(0x01, 0x00) 0001(0x01, 0x00) FUNCTION Analog Digital

7. POWER Supply Unit PCB Assy Va/Vs Voltage Adjustment


Caution: Both Vs and Va voltage adjustment are necessary.

Serial No => Controlled on production line Month, Year => Controlled on production line: Model Name

7-1. Va/Vs Adjustment Procedure


(1) Connect positive(+) terminal of DMM to Vs/Va pin, connect negative(-) terminal to GND. (2) Turning Vs/Va Adjust and adjust Vs/Va voltages to a value which is written on a right/top label of a module. (deviation ; 0.5V)

Checksum => Changeable by total EDID data FHD HDMI1 HDMI2 HDMI3 HDMI4 RGB 0xE2 0xE2 0xE2 0x62 0xB4 0xA4 0x94 0xAF 0xAF 0xAF 0x2F Caution - Each Power Supply Unit PCB assembly must be checked by check JIG set. (Because power PCB Assy damages to PDP Module, especially be careful) - Set up RF mode(noise) before a voltage adjustment. - Test equipment: DMM 1EA When transfer the Made In, Carry the command. HD 0xE2 0xE2 0xE2 -

HDMI Port No.


O

Auto EDID Download Map(RS-232C) NO Enter download MODE Item Download Mode In CMD1 CMD2 Data0 A A 0 0

8. White Balance Adjustment


Caution: Press the POWER ON KEY on R/C before W/B adjustment.
O

EDID data and Model option Download download

Automatically download 00 10 (The use of a internal Data)

Test Equipment Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))

Please adjust CA-100+ / CA-210 by CS-1000 before measuring You should use Channel 10 which is Matrix compensated (White, Red, Green, Blue revised) by CS-1000 and adjust in accordance with White balance adjustment coordinate.

8-1. Color Temperature Standards According to CSM and Module(TBD)


CSM Cool Medium Warm PLASMA 11000K 9300K 6500K

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LGE Internal Use Only

8-2. Change Target Luminance and Range of the Auto Adjustment W/B Equipment
Target luminance Range 50 20

Auto W/B Adjustment Map(RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 FF White Balance End
RS-232C COMMAND [CMD ID DATA] Cool Med Ja Jb Jc Warm jd je jf 00 00 00 CENTER (DEFAULT) Cool 192 192 192 64 64 64 Med 192 192 192 64 64 64 Warm 192 192 192 64 64 64 255 255 255 128 128 128

Min

MA X

8-3. White Balance Adjustment Coordinate and Color Temperature


Target luminance Range 50 20

R Gain G Gain B Gain R Cut 50H3 60H3 G Cut B C ut

jg jh ji

8-4. White Balance Adjustment Coordinate and Color Temperature

8-6. Manual W/B Adjustment


(1) Execute the zero calibration of CA-100+ / CA-210. (2) Press the ADJ button on a service R/C and enter EZ ASJUST by selecting 6. White Balance. (3) Then, 216 gray pattern will appear on the screen. (4) Change the R/G/B-Gain as passing in 3 color coordinates and temperatures, COOL, MEDIUM and WARM. < Temperature: COOL > - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each gain is limited to 192 < Temperature: MEDIUM > - R-Cut / G-Cut / B-Cut is set to 64 - Control R-Gain and G-Gain. - Each gain is limited to 192

[ PC (for communication through RS-232C) ? UART Baud rate : 115200 bps

< Temperature: WARM > - R-Cut / G-Cut / B-Cut is set to 64 - Control G-Gain and B-Gain. - Each gain is limited to 192 (5) Press EXIT button on a service R/C

8-5. Automatic W/B Adjustment


(1) Internal PATTERN should be used when W/B is adjusted. Connect to auto controller like below.

(2) Start White-Balance adjustment, then the full white window pattern will appear on the screen. (3) Adjust in the place where the influx of light like floodlight around is blocked. (illumination is less than 10ux). (4) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

<Notice> Module Heat-Run Condition for W/B 1. The adjustment must be performed in the circumstance of 255C of temperature and 6510% of relative humidity if there is no any specifics. 2. Before an W/B adjustment, the module which will be used should be placed in the circumstance of 15C~25C for above 2 hours. 3. If a module was placed in the circumstance of below 15C, it should be placed in the circumstance of 15C~25C for above 2 hours or be run for above 5 minutes in an aging environment of 60C. 4. Before an W/B adjustment, TV set should be run for 5 minutes at least.

9-3. Command Set


[Description] FOS Default write : <7mode data> write Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase Data write : Model Name and Serial Number write in EEPROM,.

10. Check Information (Serial No. & Model name)


(1) Push the menu button in DTV mode. (2) Select the SETUP -> Diagnostics -> To set (3) Check the Serial Numbe

9. Serial Number Download


9-1. Download Procedure
(1) Press Power on button of a service R/C.(Baud rate : 115200 bps) (2) Connect RS232-C Signal Cable. (3) Write Serial number through RS-232C. (4) Check the serial number at the Diagnostics of SETUP menu. (Refer to below).

11. SET factoring condition


(1) This Adjustment result is set through factory shipment mode. (2) Push the IN-STOP button on a service R/C before the factory shipment and power button mush be pushed. Caution: If IN-STOP button is pushed, preset CH map will be lost.

Caution : Dont download HDMI/RGB EEPROM to write a model name. Model name dois unnecessary because this model use Tool Option to call a model name.

9-2. Signal TABLE

CMD LENGTH ADH ADL Data CS Delay

: A0h : 85~94h (1~16 bytes) : EEPROM Sub Address high (00~1F) : EEPROM Sub Address low (00~FF) : Write data : CMD + LENGTH + ADH + ADL + Data_1 + ... + Data_n : 20ms

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

TROUBLESHOOTING GUIDE

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

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LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

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LGE Internal Use Only

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LGE Internal Use Only

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LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

BLOCK DIAGRAM

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LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.

400

601

604

208

602

200

206

520

590

205

910

900

240

580

201

501

207

305

302

204

202

203

301

303

120

300

302

LV1

A10

A9

A12

310

570

A2
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

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LGE Internal Use Only

A21

+3.3V_ST +3.3V IC102 NAND512W3A2CN6E +3.3V S6_Reset NC_1 /PF_CE0 H : Serial Flash L : NAND Flash /PF_CE1 H : 16 bit L : 8 bit NC_2 NC_3 3.9K 1K NC_4 NC_5 NC_6 RB R /PF_OE E /PF_CE0 1K NC_7 READY 0.1uF C103 NC_8 VDD_1 VSS_1 NC_9 NC_10 CL R103 10K /PF_CE1 AL PF_ALE W /PF_WE WP R1239 1K PF_WP NC_11 NC_12 NC_13 NC_14 NC_15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_29 SW100 TMUE312GAB 2 NC_28 NC_27 NC_26 PCM_A[0-7] DEBUG 4 5

IC100 LGE3369A (SATURN6 NON RM)


D4 AC16 AA15 AA16 AC6 R114 100 PCM_A[0-7] PCM_A[0-7] S6_Reset PCM_A[0] AB16 AC15 AC14 AB14 AC12 AB8 AC13 AA9 AB5 AA4 V4 Y4 AB9 AA7 AD6 PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14 AA14 AB18 Y5 AB15 AA10 AC8 AC7 AA5 AR171 /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_WP /F_RB 22 +3.3V 22 22 22 22 AR101 22 W4 T4 AE6 AF6 AA12 AA11 AC9 Y14 AB11 F8 D11 AB21 AC21 J1 J2 W5 V5 DDCA_CLK DDCA_DA UART_RX2 UART_TX2 TS0_D0 TS0_D1 LGE3369A TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7 TS0_SYNC TS0_VLD TS0_CLK AB19 TS1_D0 AA20 AC19 AA19 C10 ET_TXD0 ET_TXD1 SAR0 SAR1 SAR2 SAR3 IRIN ET_TX_CLK ET_RXD0 ET_RXD1 ET_TX_EN ET_MDC ET_MDIO ET_COL GPIO44 +3.3V AMP_RST +3.3V R1241 10K XC5000_RESET R1268 4.7K FHD COMP1_DET READY READY READY 4.7K 4.7K 4.7K 4.7K READY DSUB_DET R1271 4.7K HD D9 D10 D7 E11 E8 E10 ST_AMP_MUTE D6 D5 C5 GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102 R1269 4.7K READY B11 A9 C11 C9 B10 A10 B9 A11 R1283 R190 R191 0 22 R1270 4.7K 0 +3.3V AB13 AB12 AD12 R1287 +3.3V R1298 10K KEY1 KEY2 LED_B IR 100 0 R1242 R106 100 READY AA13 A4 B4 F4 E4 C4 PWM0 PWM1 PWM2 PWM3 TS1_SYNC TS1_VLD TS1_CLK UART2_TX/SCKM UART2_RX/SDAM DDCR_DA DDCR_CK PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE PF_ALE PF_AD15 F_RBZ R162 R163 1K R164 R165 22 22 100 100 LHSYNC2/I2S_OUT_MUTE/RX1 LVSYNC/GPIO133 GPIO79/LVSYNC2/TX1 UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87 GPIO42/PCM2_CE_N GPIO43/PCM2_IRQA_N AA8 Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4 E7 R1237 AC18 R1286 C6 R1238 F9 F10 A6 B6 AF5 AF10 100 100 C108 10pF 50V READY R1277 R1276 C107 10pF 50V READY R1204 4.7K R1205 4.7K /PF_WE GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137 GPIO_PM4/GPIO138 GPIO_PM5/INT1/GPIO139 GPIO_PM6/INT2/GPIO140 GPIO131/LDE/SPI_WPn1 GPIO130/LCK GPIO132/LHSYNC/SPI_WPn GPIO60/PCM2_RESET/RX1 GPIO62/PCM2_CD_N/TX1 E5 F5 G5 H5 F6 G6 H6 AC17 AB17 AF11 AA18 AA17 R159 R1235 100 22 READY 100 R1294 R182 R185 100 10K R131 R130 100 100 +5V_ST USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2 B5 A5 AC10 AB10 PCM_A[1] 1 3 Y10 Y11 Y12 Y13 PCMD0/CI_D0 PCMD1/CI_D1 PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7 SPI_DI SPI_DO /SPI_CS SPI_CK AE11 AF12 AE12 AD11 33 33 33 33 R1224 R1230 R1225 R1226 TESTPIN/GND HWRESET B3 XIN XOUT A3 R193 1M

X100 12MHz

C111 18pF C112 18pF

NAND FLASH MEMORY

E6

SPI_DI SPI_DO SPI_CS SPI_CK

AR102
I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VDD_2 VSS_2 NC_22 NC_21 NC_20 C106 0.1uF C105 10uF 6.3V PCM_A[7] PCM_A[6] PCM_A[5]

C102 4.7uF 10V

R1240

R116 10

R111

/F_RB

KDS181 D100

PCM_A[4]

22

R115 62K

C101 0.1uF

PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7]

USB_DM USB_DP R196 15K READY R197 15K READY USB

+3.3V

READY R105 1K

R112

DBG_TX AC_DET PM GPIO Assignment Recommended by MStar

AR103
I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16 PCM_A[3] PCM_A[2] PCM_A[1] PCM_A[0]

100 READY R195 10K 100 READY R160 R134 27K R187

LED_R AC_DET MODULE_ON DISP_EN R186 DBG_RX ISP_TXD +3.3V R1203 4.7K Flash_WP_1 R1202 4.7K

100

RL_ON/PWR_ONOFF

22

SDA1 SCL1

R1236 22 +3.3V

+3.3V R1279 4.7K SUB_SCL 5V_HDMI_2 SUB_SDA USB_OCD MOD_ROM_RX MOD_ROM_TX AV_DET READY H/W Version Opiton(F9) 5V Tolerance /FE_RESET COMP2_DET
IC100-*1 LGE4369A (SATURN6 NON RM_NON SRS)
D4 HWRESET AC16 AA15 AA16 AC6 Y10 Y11 Y12 Y13 PCMD0/CI_D0 PCMD1/CI_D1 PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7 SPI_DI SPI_DO /SPI_CS SPI_CK AB16 PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14 AA14 AB18 Y5 AB15 AA10 AC8 AC7 AA5 W4 T4 AE6 AF6 AA12 AA11 AC9 Y14 AB11 F8 D11 AB21 AC21 UART2_TX/SCKM UART2_RX/SDAM DDCR_DA DDCR_CK PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_AD15 F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1 LVSYNC/GPIO133 GPIO79/LVSYNC2/TX1 UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87 DDCA_CLK DDCA_DA UART_RX2 UART_TX2 LGE4369 TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7 TS0_SYNC TS0_VLD TS0_CLK AB19 TS1_D0 AB13 AB12 AD12 AA13 A4 B4 F4 E4 C4 SAR0 SAR1 SAR2 SAR3 IRIN PWM0 PWM1 PWM2 PWM3 ET_TXD0 ET_TXD1 ET_TX_CLK ET_RXD0 ET_RXD1 ET_TX_EN ET_MDC ET_MDIO AC11 GPIO44 D9 D10 D7 E11 E8 E10 D6 D5 C5 GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102 D9 D10 D7 E11 E8 E10 D6 D5 C5 GPIO96 GPIO88 GPIO90/I2S_OUT_MUTE GPIO91 GPIO97 GPIO98 GPIO99 GPIO103/I2S_OUT_SD3 GPIO102 ET_COL TS1_SYNC TS1_VLD TS1_CLK C10 B11 A9 C11 C9 B10 A10 B9 A11 AC11 GPIO44 A4 B4 F4 E4 C4 SAR0 SAR1 SAR2 SAR3 IRIN AA20 AC19 AA19 AB13 AB12 AD12 AA13 PWM0 PWM1 PWM2 PWM3 ET_TXD0 ET_TXD1 ET_TX_CLK ET_RXD0 ET_RXD1 ET_TX_EN ET_MDC ET_MDIO ET_COL TS1_D0 TS1_SYNC TS1_VLD TS1_CLK C10 B11 A9 C11 C9 B10 A10 B9 A11 GPIO42/PCM2_CE_N GPIO43/PCM2_IRQA_N AA8 Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4 LGE4368 E7 AC18 C6 F9 F10 A6 B6 AF5 AF10 J1 J2 W5 V5 DDCA_CLK DDCA_DA UART_RX2 UART_TX2 TS0_D0 TS0_D1 TS0_D2 TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7 TS0_SYNC TS0_VLD TS0_CLK AB19 AA20 AC19 AA19 F8 D11 AB21 AC21 UART2_TX/SCKM UART2_RX/SDAM DDCR_DA DDCR_CK GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137 GPIO_PM4/GPIO138 GPIO_PM5/INT1/GPIO139 GPIO_PM6/INT2/GPIO140 GPIO131/LDE/SPI_WPn1 GPIO130/LCK GPIO132/LHSYNC/SPI_WPn GPIO60/PCM2_RESET/RX1 GPIO62/PCM2_CD_N/TX1 E5 F5 G5 H5 F6 G6 H6 AC17 AB17 AF11 AA18 AA17 AA14 AB18 Y5 AB15 AA10 AC8 AC7 AA5 W4 T4 AE6 AF6 AA12 AA11 AC9 Y14 AB11 PCM_RST/CI_RST PCM_CD/CI_CD /PCM_OE PCM_REG/CI_CLK PCM_WAIT/CI_WACK /PCM_IRQA /PCM_WE PCM_IOWR/CI_WR PCM_IOR/CI_RD /PCM_CE /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE PF_AD15 F_RBZ LHSYNC2/I2S_OUT_MUTE/RX1 LVSYNC/GPIO133 GPIO79/LVSYNC2/TX1 UART2_RX/GPIO84 UART2_TX/GPIO85 UART1_RX/GPIO86 UART1_TX/GPIO87 GPIO42/PCM2_CE_N GPIO43/PCM2_IRQA_N AA8 Y8 Y9 AB7 AA6 AB6 U4 AC5 AC4 AD5 AB4 E7 AC18 C6 F9 F10 A6 B6 AF5 AF10 GPIO_PM0/GPIO134 GPIO_PM1/GPIO135 GPIO_PM2/GPIO136 GPIO_PM3/GPIO137 GPIO_PM4/GPIO138 GPIO_PM5/INT1/GPIO139 GPIO_PM6/INT2/GPIO140 GPIO131/LDE/SPI_WPn1 GPIO130/LCK GPIO132/LHSYNC/SPI_WPn GPIO60/PCM2_RESET/RX1 GPIO62/PCM2_CD_N/TX1 USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2 B5 A5 AC10 AB10 AC15 AC14 AB14 AC12 AB8 AC13 AA9 AB5 AA4 V4 Y4 AB9 AA7 AD6 PCM_A0/CI_A0 PCM_A1/CI_A1 PCM_A2/CI_A2 PCM_A3/CI_A3 PCM_A4/CI_A4 PCM_A5/CI_A5 PCM_A6/CI_A6 PCM_A7/CI_A7 PCM_A8/CI_A8 PCM_A9/CI_A9 PCM_A10/CI_A10 PCM_A11/CI_A11 PCM_A12/CI_A12 PCM_A13/CI_A13 PCM_A14/CI_A14 E5 F5 G5 H5 F6 G6 H6 AC17 AB17 AF11 AA18 AA17 USB_DP_1 USB_DM_1 USB_DM_2 USB_DP_2 B5 A5 AC10 AB10 AE11 AF12 AE12 AD11 TESTPIN/GND XIN XOUT E6 B3 A3 AC16 AA15 AA16 AC6 Y10 Y11 Y12 Y13 PCMD0/CI_D0 PCMD1/CI_D1 PCMD2/CI_D2 PCMD3/CI_D3 PCMD4/CI_D4 PCMD5/CI_D5 PCMD6/CI_D6 PCMD7/CI_D7 SPI_DI SPI_DO /SPI_CS SPI_CK AE11 AF12 AE12 AD11 TESTPIN/GND

22 0 22

+3.3V

R1233 4.7K

READY

L102

L101

READY

R135 R133 0 4.7K

Serial FLASH MEMORY for BOOT


SPI_CS +3.3V R104 10K SPI_DO

IC105 M24M01-HRMN6TP
NC VCC

PDP_SDA PDP_SCL C116 100pF 50V

CS#

VCC

0.1uF C104

R125

R124

SO

HOLD#

E1

WP

C100 0.1uF 2K 2K

ISP_RXD ISP_TXD DBG_RX DBG_TX EEPROM_SCL

C117 100pF 50V R140 R141 R1297 R1296

E2

WP#

SCLK

SCL

SPI_CK
VSS 4 5 SDA

Flash_WP_1

GND

SI

EEPROM_SDA

SPI_DI

FE_TS_SERIAL FE_TS_SYN FE_TS_VAL FE_TS_CLK SIDE_CVBS_DET

HDCP EEPROM

+5V

MCU BOOT STRAP


10 : BOOT 51 11 : BOOT RISC

PWM0 PWM1 KEY_BUZZER

IC107 CAT24WC08W-T

+3.3V

R1256 4.7K

A0 1 A1 2 A2 3 VSS 4

8 7 6 5

VCC WP SCL SDA

R110 4.7K R1257 22 EEPROM_SCL EEPROM_SDA R1258 22 C114 0.1uF R199

R198 READY 1K READY R1200 1K R1201

1K SB_MUTE PWM0 1K

TU_SLEEP_MODE 5V_HDMI_3 5V_HDMI_1

PWM1

AC11

R1278 4.7K

IC103 MX25L4005AM2C-12G

+3.3V +3.3V_ST

1K

EEPROM_SDA

R102

+3.3V

R101

EEPROM_SCL

IC100-*2 LGE4368A (SATURN6 NO-DIVX_NON SRS)


D4 HWRESET XIN XOUT E6 B3 A3

R1299

R1300

R1275

R137

AB16 AC15 AC14 AB14 AC12 AB8 AC13 AA9 AB5 AA4 V4 Y4 AB9 AA7 AD6

+3.3V

J1 J2 W5 V5

A7 GPIO67 GPIO68 B8 GPIO67 GPIO68

A7 B8

A7 GPIO67 GPIO68 B8

R192

100

USB_CTL

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

MSD3368EV Platform FLASH/NVRAM/GPIO

09/11/17
1 10

LGE Internal Use Only

+1.26V_VDDC

C240 470uF 16V

C246 0.1uF

C257 0.1uF

C264 0.1uF

C275 0.1uF

C281 0.1uF

C2000 0.1uF

C2003 0.1uF

C2005 0.1uF

Audio Mute
+1.26V_VDDC
C2032 0.1uF SB_MUTE ST_AMP_MUTE C2033 0.1uF C2034 0.1uF C2035 0.1uF C2036 0.1uF C2037 0.1uF C2038 0.1uF C2039 0.1uF C2040 0.1uF C2041 0.1uF

D201 ENKMC2838-T112 A1 AMP_MUTE C A2

+3.3V_VDDP

+3.3V
L210 MLB-201209-0120P-N2

C250 0.1uF

C253 0.1uF

C258 0.1uF

C2026 0.1uF

C2004 0.1uF

+1.8V_DDR

IC100 LGE3369A (SATURN6 NON RM)

C2048 470uF 16V

C245 0.1uF

C248 0.1uF

C259 0.1uF

C266 0.1uF

C277 0.1uF

C283 0.1uF

C291 0.1uF

C296 0.1uF

CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1 HPD1 R258 1K

F1 RXACKP F2 RXACKN G2 RXA0P G3 RXA0N H3 RXA1P G1 RXA1N H1 RXA2P H2 RXA2N A1 DDCD_A_DA B2 DDCD_A_CK A2 HOTPLUG_A C3 RXBCKP B1 RXBCKN C1 RXB0P C2 RXB0N D2 RXB1P D3 RXB1N E3 RXB2P D1 RXB2N E1 DDCD_B_DA F3 DDCD_B_CK R203 1K E2 HOTPLUG_B AE8 RXCCKP RXCCKN RXC0P RXC0N RXC1P RXC1N

AE16 LVA0P LVA0M LVA1P LVA1M LVA2P LVA2M LVA3P LVA3M LVA4P LVA4M AE14 LVACKP LVACKM AE20 LVB0P LVB0M LVB1P LVB1M LVB2P LVB2M LVB3P LVB3M LVB4P LVB4M AE18 LVBCKP LVBCKM AD18 AD20 AD19 AF20 AF19 AE19 AD17 AF18 AF17 AE17 AD14 AD16 AD15 AF16 AF15 AE15 AD13 AF14 AF13 AE13

RXE0+ RXE0RXE1+ RXE1RXE2+ RXE2RXE3+ RXE3RXE4+ RXE4E16 E17 E18 F7 L9 L10 L11 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 L12 L13 L14 L15 L16 L17 L18 M9 M10 RXOCK+ RXOCKM11 M12 M13 M14 M15 COMP1_RIN COMP1_LIN M16 M17 M18 SIDE_RIN SIDE_LIN AV_RIN AV_LIN COMP2_RIN COMP2_LIN PC_RIN PC_LIN N15 N16 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 AVDD_DDR_1 AVDD_DDR_2 P11 P12 P13 P14 P15 P16 P17 P18 R4 R9 R10 R11 AUDIO_MASTER_CLK MS_LRCK MS_SCK MS_LRCH C236 22pF READY C235 C233 0.1uF R229 390 1% Check C234 0.1uF 0.1uF 10uF 0.1uF 1uF 4.7uF 0.1uF C237 22pF READY C238 22pF READY C239 22pF READY R12 R13 R14 R15 R16 R17 R18 T5 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 U5 W13 Y21 AA23 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 AVDD_USB H8 AVDD_DM +3.3V MLB-201209-0120P-N2 C287 C292 L202 MLB-201209-0120P-N2 0.1uF 0.1uF C2044 C2043 10uF 2.2uF 6.3V 10V C256 0.1uF C272 0.1uF W8 L208 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 C224 C225 C226 C227 C228 AVDD_33_1 AVDD_33_2 AVDD_33_3 AVDD_33_4 AVDD_33_5 J7 K7 L7 M7 N7 C241 C242 C286 0.1uF +3.3V 0.1uF AVDD_MPLL C255 C2025 10uF 6.3V H7 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 AVDD_LPLL R20 +3.3V_AVDD_MPLL C2030 0.1uF C263 0.1uF AVDD_MEMPLL_1 AVDD_MEMPLL_2 AVDD_MEMPLL_3 0.1uF 0.1uF 0.1uF 0.1uF +3.3V GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 AVDD_DDR_3 AVDD_DDR_4 AVDD_DDR_5 AVDD_DDR_6 AVDD_DDR_7 AVDD_DDR_8 AVDD_DDR_9 AVDD_DDR_10 AVDD_DDR_11 H17 T20 V20 C262 C269 G12 G13 H13 H14 H15 H16 W14 W15 W16 W17 W18 +3.3V L205 MLB-201209-0120P-N2 C273 C285 AVDD_AU +1.8V_DDR C284 0.1uF C293 0.1uF W7 N17 47 47 TUNER_SIF N18 P4 P9 P10 PSU_ERR_DET SPDIF_OUT N4 N9 N10 N11 N12 N13 N14 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 VDDP_1 VDDP_2 VDDP_3 VDDP_4 VDDP_5 VDDP_6 VDDP_7 VDDP_8 +3.3V_AVDD L209 MLB-201209-0120P-N2 H9 H10 H11 H12 N20 P20 W9 W10 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 D16 D17 D18 D19 D20 H18 H19 H20 J20 K20 L20 M20 P7 R7 T7 T22 U7 U20 U22 V7 V22 W11 W12 W19 W20 W22 Y22

IC100 +1.26V_VDDC LGE3369A (SATURN6 NON RM)

LVDS OUT

RXECK+ RXECKRXO0+ RXO0RXO1+ RXO1RXO2+ RXO2RXO3+ RXO3RXO4+ RXO4-

CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2

HDMI

DDC_SCL_2 HPD2 CK+_HDMI3 CK-_HDMI3 D0+_HDMI3 D0-_HDMI3 D1+_HDMI3 D1-_HDMI3 D2+_HDMI3 D2-_HDMI3 DDC_SDA_3 DDC_SCL_3 HPD3 HDMI_CEC R285 R204 1K 100

AD8 AD9 AF8 AF9 AE9

AE10 RXC2P AD10 RXC2N AE7 AF7 AD7 DDCD_C_DA DDCD_C_CK HOTPLUG_C

AA3 AUR0 AUL0 AUR1 AUL1 Y1 AE1 AF3 AE3

C229 C230 C2006 C2007 C2008 C2009 C2011 C2012 C2013 C2014 C2015 C2016

2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF

+3.3V_VDDP

J3 CEC

N2 HSYNC0/SC1_ID N1 VSYNC0/SC1_FB

COMP1

COMP1_Pr COMP1_Y COMP1_Pb

R211 R212 R213 R214 R215 R216 R217 R243 10K R244 10K

47 47 47 470 47 47 47

C200 C201 C202 C203 C204 C205 C206

0.047uF 0.047uF 0.047uF 1000pF 0.047uF 0.047uF 0.047uF

P2 RIN0P/SC1_R R3 GIN0P/SC1_G R1 BIN0P/SC1_B P3 SOGIN0/SC1_CVBS P1 RINM T3 BINM R2 GINM

AUR2 AUL2 AE2 AA1 AUR3 AB1 AUL3 AB2 AUR4 AC2 AUL4 AB3 AUR5 AC3 AUL5

AUDIO IN

W3 SIF0P SIF0M W2

C231 C232

0.1uF 0.1uF

R241 R242

F11 R246 R245 47 47 47 470 C212 C207 C213 C208 22 22 0.047uF 0.047uF 0.047uF 1000pF K3 HSYNC1/DSUB_HSYNC K2 VSYNC1/DSUB_VSYNC L1 RIN1P/DSUB_R L3 GIN1P/DSUB_G K1 BIN1P/DSUB_B L2 SOGIN1 AF1 AUOUTR0/HP_ROUT AUOUTL0/HP_LOUT AUOUTR1/SC1_ROUT AUOUTL1/SC1_LOUT AUOUTR2/SC2_ROUT AUOUTL2/SC2_LOUT AF2 AD3 AD1 AC1 AD2 SPDIF_IN SPDIF_OUT E9

R282 R230

0 100

DSUB_HSYNC DSUB_VSYNC

DSUB

DSUB_R DSUB_G DSUB_B

R218 R219 R220 R221

AUDIO OUT

COMP2

COMP2_Pr COMP2_Y COMP2_Pb

R222 R223 R224 R225

47 47 47 470

C214 C215 C216 C209

0.047uF 0.047uF 0.047uF 1000pF

V1 RIN2P/COMP_PR+ V2 GIN2P/COMP_Y+ U1 BIN2P/COMP_PB+ V3 SOGIN2 J5 VSYNC2

A8 I2S_OUT_MCK R205 47 47 47 47 C210 C211 C217 C218 0.047uF 0.047uF 0.047uF 0.047uF U3 CVBS1/SC1_CVBS U2 CVBS2/SC2_CVBS T1 CVBS3/SIDE_CVBS T2 VCOM1 B7 C7 D8 C8 R279 I2S_OUT_WS I2S_OUT_BCK I2S_OUT_SD I2S_IN_SD

R231 R232 R233 R234 100

22 22 22 22

CVBS

SIDE_CVBS_IN AV_CVBS_IN

R206 R226 R227

L207 MLB-201209-0120P-N2

C279 0.1uF

C288 0.1uF

R207 R208 R235 R236 R228 R209

47 47 47 47 100 100

C219 C220 C2024 C2019 C221 C222

0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF

M1 CVBS4/S-VIDEO_Y M2 CVBS6/S-VIDEO_C N3 CVBS5 M3 CVBS7 W1 CVBS0/RF_CVBS Y3 VCOM0 Y2 CVBSOUT0/SC2_MNTOUT AA2

+3.3V K4 VCLAMP REFP REFM REXT H4 J4 G4 C223 0.1uF

+3.3V_AVDD L206 MLB-201209-0120P-N2

TV/MNT

TUNER_CVBS

AE5 AUCOM AUVRM AUVRP AUVAG AE4 AF4 AD4

TP203

CVBSOUT1

0.1uF 0.1uF

Close to IC as close as possible

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

MSD3368EV Platform AV IN_OUT/LVDS/POWER 2 10

AV IN_OUT/LVDS/POWER

LGE Internal Use Only

DDR2 1.8V By CAP - Place these Caps near Memory


+1.8V_DDR L300 MLB-201209-0120P-N2 +1.8V_S_DDR

0.1uF C326

0.1uF C327

0.1uF C328

0.1uF C341

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C314

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C331

0.1uF

0.1uF C339

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF C329

0.1uF C332

0.1uF C334

0.1uF C336

C303

10uF

10uF C315

C306

C307

C308

C310

C312

C313

C316

C318

C319

C304

C305

C317

C320

C323 0.1uF

C324

+1.8V_S_DDR +1.8V_S_DDR 1K 1% +1.8V_S_DDR

R301

R321

1K 1%

R345 1K

C300 1000pF

R302 1K 1%

C301

C309

C311

1K

IC300 HYB18TC1G160C2F-2.5
SDDR_D[0] SDDR_D[1] SDDR_D[2] SDDR_D[3] SDDR_D[4] SDDR_D[0-15] SDDR_D[5] SDDR_D[6] SDDR_D[7] SDDR_D[8] SDDR_D[9] SDDR_D[10] SDDR_D[11] SDDR_D[12] SDDR_D[13] SDDR_D[14] SDDR_D[15] +1.8V_S_DDR L2 VDD5 VDD4 VDD3 VDD2 VDD1 A1 E1 J9 M9 R1 J8 K8 K2 CK CK CKE L3 L1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VREF

IC100 LGE3369A (Saturn6 Non RM)


D15 A_MVREF BDDR2_A[9] AR303 TDDR_A[9] TDDR_A[3] TDDR_A[1] 56 AR304 T26 A_DDR2_A0 A_DDR2_A1 A_DDR2_A2 A_DDR2_A3 A_DDR2_A4 A_DDR2_A5 A_DDR2_A6 A_DDR2_A7 A_DDR2_A8 A_DDR2_A9 A_DDR2_A10 A_DDR2_A11 A_DDR2_A12 B_DDR2_A0 B_DDR2_A1 B_DDR2_A2 B_DDR2_A3 B_DDR2_A4 B_DDR2_A5 B_DDR2_A6 B_DDR2_A7 B_DDR2_A8 B_DDR2_A9 B_DDR2_A10 B_DDR2_A11 B_DDR2_A12 AC23 A_DDR2_BA0 A_DDR2_BA1 A_DDR2_BA2 A_DDR2_MCLK A14 D23 /A_DDR2_MCLK A_DDR2_CKE D14 A_DDR2_ODT D13 D12 D22 /A_DDR2_RAS /A_DDR2_CAS /A_DDR2_WE B18 C17 A_DDR2_DQS0 A_DDR2_DQS1 C18 A19 A_DDR2_DQM0 A_DDR2_DQM1 A18 B17 A_DDR2_DQSB0 A_DDR2_DQSB1 B_DDR2_DQSB0 B_DDR2_DQSB1 W25 A_DDR2_DQ0 A_DDR2_DQ1 A_DDR2_DQ2 A_DDR2_DQ3 A_DDR2_DQ4 A_DDR2_DQ5 A_DDR2_DQ6 A_DDR2_DQ7 A_DDR2_DQ8 A_DDR2_DQ9 A_DDR2_DQ10 A_DDR2_DQ11 A_DDR2_DQ12 A_DDR2_DQ13 A_DDR2_DQ14 A_DDR2_DQ15 B_DDR2_DQ0 B_DDR2_DQ1 B_DDR2_DQ2 B_DDR2_DQ3 B_DDR2_DQ4 B_DDR2_DQ5 B_DDR2_DQ6 B_DDR2_DQ7 B_DDR2_DQ8 B_DDR2_DQ9 B_DDR2_DQ10 B_DDR2_DQ11 B_DDR2_DQ12 B_DDR2_DQ13 B_DDR2_DQ14 B_DDR2_DQ15 AE26 W24 AF24 AF25 V26 AE25 W26 Y26 AD25 Y25 BDDR2_D[0] BDDR2_D[1] BDDR2_D[2] BDDR2_D[3] BDDR2_D[4] BDDR2_D[0-15] BDDR2_D[5] BDDR2_D[6] BDDR2_D[7] BDDR2_D[8] BDDR2_D[9] BDDR2_D[10] B_DDR2_DQM0 B_DDR2_DQM1 AB25 AA25 BDDR2_DQS0_N BDDR2_DQS1_N AR310 BDDR2_D[11] BDDR2_D[12] BDDR2_D[9] BDDR2_D[14] AR311 BDDR2_D[4] BDDR2_D[3] BDDR2_D[1] BDDR2_D[6] BDDR2_D[15] BDDR2_D[8] BDDR2_D[10] BDDR2_D[13] AR313 BDDR2_D[7] BDDR2_D[0] BDDR2_D[2] BDDR2_D[5] 56 56 56 AR312 56 TDDR_D[11] TDDR_D[12] TDDR_D[9] TDDR_D[14] TDDR_D[4] TDDR_D[3] TDDR_D[1] TDDR_D[6] TDDR_D[15] TDDR_D[8] TDDR_D[10] TDDR_D[13] TDDR_D[7] TDDR_D[0] TDDR_D[2] TDDR_D[5] B_DDR2_DQS0 B_DDR2_DQS1 AC25 AC26 BDDR2_DQM0_P BDDR2_DQM1_P /B_DDR2_RAS /B_DDR2_CAS /B_DDR2_WE AB26 AA26 BDDR2_DQS0_P BDDR2_DQS1_P B_DDR2_ODT U25 U24 AB24 /BDDR2_RAS /BDDR2_CAS /BDDR2_WE /B_DDR2_MCLK B_DDR2_CKE U26 BDDR2_ODT B_DDR2_BA0 B_DDR2_BA1 B_DDR2_BA2 B_DDR2_MCLK V24 AB23 /BDDR2_MCLK BDDR2_CKE AC24 AB22 V25 BDDR2_MCLK R330 AF26 T25 AF23 T24 AE23 R26 AD22 R25 AC22 R24 BDDR2_A[0] BDDR2_A[1] BDDR2_A[2] BDDR2_A[3] BDDR2_A[4] BDDR2_A[0-12] BDDR2_A[5] BDDR2_A[6] BDDR2_A[7] BDDR2_A[8] BDDR2_A[9] BDDR2_A[11] BDDR2_A[5] BDDR2_A[12] BDDR2_A[7] BDDR2_A[0] BDDR2_A[2] BDDR2_A[4] BDDR2_A[6] BDDR2_A[11] R325 BDDR2_A[8] BDDR2_BA[0] BDDR2_BA[1] R326 56 56 56 56 AR305 BDDR2_A[3] BDDR2_A[1] BDDR2_A[10]

C335 1000pF

0.1uF

1% 0.1uF

C333 0.1uF

1000pF

R322

R343 1K 1%

1%

IC301 HYB18TC512160B2F-2.5
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 TDDR_D[0] TDDR_D[1] TDDR_D[2] TDDR_D[3] TDDR_D[4] TDDR_D[5] TDDR_D[6] TDDR_D[7] TDDR_D[8] TDDR_D[9] TDDR_D[10] TDDR_D[11] TDDR_D[12] TDDR_D[13] TDDR_D[14] TDDR_D[15] +1.8V_S_DDR L2 L3 A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1 TDDR_D[0-15]

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

J2

SDDR_A[5] SDDR_A[3] SDDR_A[0] SDDR_A[1] SDDR_A[0-12] SDDR_A[2] SDDR_A[3] SDDR_A[4] SDDR_A[5] SDDR_A[6] SDDR_A[7] SDDR_A[8] SDDR_A[9] SDDR_A[10] SDDR_A[11] SDDR_A[12] SDDR_A[1] SDDR_A[10] 56

AR300

C342

C302 0.1uF

0.1uF C338

0.1uF C340

10uF C325

0.1uF

10uF C330

C337

ADDR2_A[5] ADDR2_A[3] ADDR2_A[1] 56 ADDR2_A[10] ADDR2_A[0-12] ADDR2_A[0] ADDR2_A[1] ADDR2_A[2] ADDR2_A[3] ADDR2_A[4] ADDR2_A[5] ADDR2_A[6] ADDR2_A[7] ADDR2_A[8] ADDR2_A[9]

J2

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

C13 A22 B13 C22 A13 A23 C12 B23 B12 C23

TDDR_A[0] TDDR_A[1] TDDR_A[2] TDDR_A[3] TDDR_A[0-12] TDDR_A[4] TDDR_A[5] TDDR_A[6] TDDR_A[7] TDDR_A[8] TDDR_A[9] TDDR_A[10] TDDR_A[11] TDDR_A[12]

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

AR301 SDDR_A[9] SDDR_A[12] SDDR_A[7] SDDR_A[0] SDDR_A[2] SDDR_A[4] SDDR_A[6] SDDR_A[11] SDDR_A[8] R320 56 R319 56 56 AR302 ADDR2_A[9] ADDR2_A[12] ADDR2_A[7] ADDR2_A[0] ADDR2_A[2] ADDR2_A[4] ADDR2_A[6] ADDR2_A[11] ADDR2_A[8]

TDDR_A[10]

TDDR_A[5] TDDR_A[12] TDDR_A[7] TDDR_A[0] TDDR_A[2] TDDR_A[4] TDDR_A[6] TDDR_A[11] TDDR_A[8] R327 R328 56 56 22

ADDR2_A[10] B22 ADDR2_A[11] A12 ADDR2_A[12] A24

AD23 BDDR2_A[10] AE22 BDDR2_A[12]

BA0 BA1 BA2

SDDR_BA[0] SDDR_BA[1] SDDR_BA[2] R351 0 READY SDDR_CK READY 150 R300 /SDDR_CK

56 56 56 22

R303 R304 R305 R306

ADDR2_BA[0] ADDR2_BA[1] ADDR2_BA[2] ADDR2_MCLK

C24 B24 D24 B14

TDDR_BA[0] TDDR_BA[1]

BA0 BA1

READY

CK CK CKE

R344 150

J8 K8 K2

22

R307

/ADDR2_MCLK ADDR2_CKE

R331 R332 +1.8V_S_DDR

22 56 READY R348 56 56 56 56

56 R308 SDDR_CKE READY +1.8V_S_DDR R346 4.7K R347 READY 4.7K SDDR_ODT 56 56 56 56 R309 R310 R311 R312

TDDR_CKE TDDR_ODT 4.7K READY 4.7K R349 ODT CS RAS CAS WE K9 L8 K7 L7 K3 QIMONDA 512M A9 C1 C3 C7 C9 LDQS UDQS TDDR_DQS1_P TDDR_DQM0_P LDM UDM TDDR_DQM1_P TDDR_DQS0_N LDQS UDQS TDDR_DQS1_N NC4 NC5 NC6 L1 R3 R7
IC301-*1 H5PS5162FFR-S6C
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 J2 G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 QIMONDA 1G

K9 L8 K7 L7 K3

ODT CS RAS CAS WE

ADDR2_ODT /ADDR2_RAS /ADDR2_CAS /ADDR2_WE

R333 R334 R335 R336

VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

/SDDR_RAS /SDDR_CAS /SDDR_WE

/TDDR_RAS /TDDR_CAS /TDDR_WE TDDR_DQS0_P

F7 B7

E9 G1 G3 G7 G9

F7 B7

LDQS UDQS

SDDR_DQS0_P SDDR_DQS1_P

56 56

R313 R314

ADDR2_DQS0_P ADDR2_DQS1_P

R337 R338

56 56

F3 B3

F3 B3 VSS5 VSS4 VSS3 VSS2 VSS1 A3 E3 J3 N1 P9 R3 R7


IC300-*1 HY5PS1G1631CFP-S6
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 J2 G8 G2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

LDM UDM

SDDR_DQM0_P SDDR_DQM1_P

56 56

R315 R316

ADDR2_DQM0_P ADDR2_DQM1_P

R339 R340

56 56

E8 A8

A3 E3 J3 N1 P9

VSS5 VSS4 VSS3 VSS2 VSS1

E8 A8

LDQS UDQS

SDDR_DQS0_N SDDR_DQS1_N

56 56

R317 R318 AR306 SDDR_D[11] SDDR_D[12] SDDR_D[9] SDDR_D[14] 56 AR307

ADDR2_DQS0_N ADDR2_DQS1_N ADDR2_D[11] ADDR2_D[12] ADDR2_D[9] ADDR2_D[14] ADDR2_D[4] ADDR2_D[0-15] ADDR2_D[3] ADDR2_D[1] 56 AR308 ADDR2_D[6] ADDR2_D[15] ADDR2_D[8] ADDR2_D[10] 56 AR309 ADDR2_D[13] ADDR2_D[7] ADDR2_D[0] ADDR2_D[2] ADDR2_D[5] 56 ADDR2_D[0] ADDR2_D[1] ADDR2_D[2] ADDR2_D[3] ADDR2_D[4] ADDR2_D[5] ADDR2_D[6] ADDR2_D[7] ADDR2_D[8] ADDR2_D[9]

R341 R342

56 56

NC4 NC5

B15 A21 A15 B21 C21 C14 C20 C15 C16 C19

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

B2 B8 A7 D2 D8 E7 F2 F8 H2 H8

A2 E2 R8

NC1 NC2 NC3

SDDR_D[4] SDDR_D[3] SDDR_D[1] SDDR_D[6]

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

A9 A10/AP A11 A12

BA0 BA1 BA2

L2 L3 L1 A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1

BA0 BA1

L2 L3 A1 E1 J9 M9 R1 VDD5 VDD4 VDD3 VDD2 VDD1

CK CK CKE

J8 K8 K2

CK CK CKE

J8 K8 K2

ODT CS RAS CAS WE

K9 L8 K7 L7 K3 HYNIX 512M A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

ODT CS RAS CAS WE

K9 L8 K7 L7 K3 HYNIX 1G

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4 VDDQ3 VDDQ2 VDDQ1

LDQS UDQS

F7 B7

LDQS UDQS

F7 B7

LDM UDM

F3 B3

LDM UDM

F3 B3 A3 VSS5 VSS4 VSS3 VSS2 VSS1

LDQS UDQS

E8 A8

A3 E3 J3 N1 P9

VSS5 VSS4 VSS3 VSS2 VSS1

LDQS UDQS

E8 A8

E3 J3 N1 P9

NC4 NC5 NC6

L1 R3 R7

NC5 NC6

R3 R7

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

NC1 NC2 NC3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ10 VSSQ9 VSSQ8 VSSQ7 VSSQ6 VSSQ5 VSSQ4 VSSQ3 VSSQ2 VSSQ1

VSSDL

J7

VSSDL

J7

VDDL

J1

H8

J7

VSSDL +1.8V_S_DDR

SDDR_D[15] SDDR_D[8] SDDR_D[10] SDDR_D[13]

VSSDL +1.8V_S_DDR

VDDL

J1

H8

J7

IC300-*2 EDE1116AEBG-8E-F
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

J2

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

ADDR2_D[10] B16 ADDR2_D[11] B20 ADDR2_D[12] A20 ADDR2_D[13] A16 ADDR2_D[14] B19 ADDR2_D[15] A17

IC301-*2 EDE5116AJBG-8E-E
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

J2

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

BA0 BA1 BA2

L2 L3 L1 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1

CK CK CKE

J8 K8 K2

J1

VDDL

AE24 BDDR2_D[11] AD26 BDDR2_D[12] Y24 BDDR2_D[13] AD24 BDDR2_D[14] AA24 BDDR2_D[15]

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

SDDR_D[7] SDDR_D[0] SDDR_D[2] SDDR_D[5]

VDDL

BA0 BA1

L2 L3 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1

J1

H8

CK CK CKE

J8 K8 K2

ODT CS RAS CAS WE

K9 L8 K7 L7 K3 ELPIDA 512M A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1

ODT CS RAS CAS WE

K9 L8 K7 L7 K3 ELPIDA 1G

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1

LDQS UDQS

F7 B7

LDQS UDQS

F7 B7

LDM UDM

F3 B3

LDM UDM

F3 B3 A3 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

LDQS UDQS

E8 A8

A3 E3 J3 N1 P9

VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

LDQS UDQS

E8 A8

E3 J3 N1 P9

NC_4 NC_5 NC_6

L1 R3 R7

NC_5 NC_6

R3 R7

NC_1 NC_2 NC_3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1

NC_1 NC_2 NC_3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1

VSSDL

J7

VSSDL

J7

VDDL

J1

H8

VDDL

J1

H8

IC300-*3 K4T1G164QE-HCE7
VREF DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 VREF

IC301-*3 K4T51163QG-HCE7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

J2

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

J2

G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2

BA0 BA1 BA2

L2 L3 L1 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1

BA0 BA1

L2 L3 A1 E1 J9 M9 R1 VDD_5 VDD_4 VDD_3 VDD_2 VDD_1

CK CK CKE

J8 K8 K2

CK CK CKE

J8 K8 K2

ODT ODT CS RAS CAS WE K9 L8 K7 L7 K3 SS 1G A9 C1 C3 C7 C9 E9 LDQS UDQS F7 B7 G1 G3 G7 G9 LDM UDM F3 B3 A3 LDQS UDQS E8 A8 E3 J3 N1 NC_5 NC_6 R3 R7 B2 B8 A7 D2 D8 VSSDL J7 E7 F2 F8 H2 VDDL J1 H8 VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1 VDDL VSSDL P9 VSS_5 VSS_4 VSS_3 VSS_2 VSS_1 NC_4 NC_5 NC_6 LDQS UDQS VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1 LDM UDM LDQS UDQS CS RAS CAS WE

K9 L8 K7 L7 K3 SS 512M A9 C1 C3 C7 C9 F7 B7 E9 G1 G3 G7 F3 B3 G9 VDDQ_10 VDDQ_9 VDDQ_8 VDDQ_7 VDDQ_6 VDDQ_5 VDDQ_4 VDDQ_3 VDDQ_2 VDDQ_1

E8 A8

A3 E3 J3 N1 P9

VSS_5 VSS_4 VSS_3 VSS_2 VSS_1

L1 R3 R7

NC_1 NC_2 NC_3

A2 E2 R8

NC_1 NC_2 NC_3

A2 E2 R8

B2 B8 A7 D2 D8 E7 F2 F8 H2

VSSQ_10 VSSQ_9 VSSQ_8 VSSQ_7 VSSQ_6 VSSQ_5 VSSQ_4 VSSQ_3 VSSQ_2 VSSQ_1

J7

J1

H8

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR2

MSD3368EV Platform DDR2 3 10

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

5V_HDMI1

SHIELD 20 19 18 R600 17 16 15 14 13 EAG59023302 12 11 10 9 8 7 6 5 4 3 2 1 CK+ 1K C600 0.1uF 16V

R612 0 HPD1 1K R615 READY

5V_HDMI1

+5V_ST

A2 IC600

DDC_SDA_1 DDC_SCL_1 AT24C02BN-10SU-1.8

A1 ENKMC2838-T112 D600 C

CEC_REMOTE CK-_HDMI1

A0

VCC C603 0.1uF R626 18K R629 18K

5V_HDMI1

5V_HDMI2

5V_HDMI3

R660 10K

A1 CK+_HDMI1 D0D0-_HDMI1 D0_GND GND D0+ D0+_HDMI1 D1D1-_HDMI1 D1_GND D1+ D1+_HDMI1 D2D2-_HDMI1 D2_GND D2+ D2+_HDMI1

WP

R664 10K

5V_HDMI_1 R665 33K R661 33K

5V_HDMI_2 R663 33K

R662 10K

5V_HDMI_3

A2

SCL R623 22 DDC_SCL_1

SDA R621 22 DDC_SDA_1

GND JK600

UI_HW_PORT1

5V_HDMI2

SHIELD 20 19 18 R601 17 16 15 14 13 12 EAG59023301 11 10 9 8 7 6 5 4 3 2 1 CK+ 1K

R613 0 HPD2 READY 1K R616 5V_HDMI2 +5V_ST

A2

AT24C02BN-10SU-1.8 DDC_SDA_2 A0 DDC_SCL_2 A1 CEC_REMOTE CK-_HDMI2 A2 3 6 SCL 1 8 VCC C607 0.1uF

A1 ENKMC2838-T112 D602 C R649 18K

C601 0.1uF 16V

IC602

WP

R646 18K

DDC_SCL_2 R645 22 DDC_SDA_2 R642 22 SDA

GND CK+_HDMI2

D0D0-_HDMI2 D0_GND D0+ D0+_HDMI2 D1D1-_HDMI2 D1_GND D1+ D1+_HDMI2 D2D2-_HDMI2 D2_GND D2+ D2+_HDMI2 GND

+3.3V_HDMI_ST

R632 330K MMBD301LT1G READY R659 0

R637 27K

R624 0 READY CEC_REMOTE

D605 30V

HDMI_CEC

UI_HW_PORT2
JK601 GND

D604 READY

BSS83 Q600
READY

SIDE HDMI
5V_HDMI3 5V_HDMI3 +5V_ST JACK_GND 20 READY 19 18 R631 17 16 15 14 13 12 EAG42463001 11 10 9 8 7 6 5 4 3 2 1 CK+ CK+_HDMI3 D0D0_GND D0+ D1D1_GND D1+ D2D2_GND D2+ D2+_HDMI3 D1+_HDMI3 D2-_HDMI3 D0+_HDMI3 D1-_HDMI3 D0-_HDMI3 GND CEC_REMOTE CK-_HDMI3 A2 3 6 SCL DDC_SCL_3 R643 GND 4 5 SDA DDC_SDA_3 R644 22 22 1K C605 0.1uF 16V R636 0 1K R638 A2 A1 ENKMC2838-T112 D603 IC603 AT24C02BN-10SU-1.8 DDC_SDA_3 A0 DDC_SCL_3 A1 1 8 VCC C608 0.1uF C 2 7 WP R648 18K R650 18K HPD3

UI_HW_PORT4
GND JK603

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI

MSD3368EV Platform HDMI 5 10

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

Audio Amp
AVSS R715 470 4700pF 2200pF R717 0

This parts are Located on AVSS area.


C733 22K

+3.3V
1uF 16V

L702
P_17V

0.047uF

AVSS C702 AVSS C736 R718 470 4700pF

C713

C720

0.033uF 50V

+3.3V_AVDD_AMP
120-ohm

R707

C730

C703

L701 +3.3V_DVDD
120-ohm C714 C735 0.1uF C721 100uF 25V C775 100uF 25V C741 100uF 25V READY C742 100uF 25V C743 100uF 25V C744 100uF 25V READY

Separate DGND AND AVSS

0.047uF

PLL_FLTP

PLL_FLTM

GVDD_OUT_1

PVDD_A_2

PVDD_A_1

SSTIMER

0.1uF

VR_ANA

OC_ADJ

BST_A

OUT_A 1

AVSS

12

11

10

+3.3V_AVDD_AMP AVDD C723 10uF 16V C728 0.1uF


R713 200 1% 18K R714

NC

13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

48 47 46 45 44

PGND_AB_2 PGND_AB_1 OUT_B PVDD_B_2 PVDD_B_1 BST_B BST_C PVDD_C_2 PVDD_C_1 OUT_C PGND_CD_2 PGND_CD_1

P_17V L705 2S AD-9060 2F 1S


50V C732 0.033uF 0.01uF C701

TESTOUT MCLK

C704 0.1uF C740 0.68uF C726 0.1uF

C725 0.01uF R704 3.3 R705 3.3 C727 0.01uF


@netLa

SPK_L+

AUDIO_MASTER_CLK

1F

AVSS R702 22

OSC_RES DVSS_1 VR_DIG

EAP61008401

SPK_LWAFER-ANGLE

+3.3V

AC_DET

R712 1K
C712 1000pF 50V

PDN C718 0.1uF


C722 4.7uF 10V

LRCLK SCLK SDIN

TAS5709PHPR IC701

43 42 41 40 39 38 37 36

SPK_L+ 50V 0.033uF C729

R725 10K C AMP_MUTE R716 B 10K E Q701 2SC3052 0

R710

R711 READY 33K

L704 2S AD-9060 2F 1S 1F C739 0.68uF

C717 0.1uF

C734 0.01uF R709 3.3 R719 3.3 C715 0.01uF


@netLa

SPK_R+
SPK_L3 SPK_R+

MS_LRCK MS_SCK MS_LRCH SDA1 SCL1

R706 22 R703 22 R708 22

SDA SCL

EAP61008401

SPK_R-

C710 0.1uF

1 P700

SPK_R-

PVDD_D_1

PVDD_D_2

AGND

RESET

STEST

VREG

BST_D

GVDD_OUT_2

DVSS_2

OUT_D

DVDD

GND

P_17V C709 1000pF

C708

+3.3V_DVDD

1uF 16V

C719 C706 0.1uF 0.1uF

C738

AMP_RST
C711 10uF 16V C707 0.1uF

0.033uF 50V

C737 0.1uF

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
AUDIO

MSD3368EV Platform AUDIO 6 10

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

POWER B/D

P800 SMAW200-H18S1

L801 MLB-201209-0120P-N2

P_17V

+5V
P_+5V +5V +5V_ST +5V_ST P_+5V C854 L817

1 3 5 7 9 11
+5V_ST R837 2K RL_ON/PWR_ONOFF +5V_ST READY C805 0.1uF 16V

2 4 6 8 10 12 14 16 18
R804 0 C837 10uF 16V C809 16V 0.1uF READY C835 C834 100uF 0.1uF 16V AC_DET C812 16V 0.1uF R828 120K READY L800 C813 MLB-201209-0120P-N2 10uF 16V C804 470uF 16V C820 0.1uF C890 10uF 6.3V READY PSU_ERR_DET +5V_ST
G1 2 7 D1_1

C818 0.1uF 50V

C817 100uF 25V

0.1uF R856 10K READY R834 10K


S1 1 Q806 SI4925BDY

C862 10uF 16V L808


8 D1_2

C865 0.1uF 16V

C857 220uF 16V +5V_GENERAL

13
R801 100

C864 10uF 16V

C866 0.1uF 16V

15 17

C839 10uF 6.3V READY RL_ON/PWR_ONOFF

C858 220uF 16V

R835 Q803 2SC3052 B R829 10K

S2

D2_2

560 C
G2 4 5 D2_1

R838 10K

R803 100

MODULE_ON C807 0.1uF 16V

19

+3.3V_TU

L806 MLB-201209-0120P-N2

Stand-by +3.3V
+3.3V_ST +5V_ST +3.3V_ST R858 0 C815 0.1uF 16V C808 0.1uF 16V +3.3V_HDMI_ST R859 0 C816 0.1uF 16V +3.3V_AVDD_MPLL

C826 0.1uF 16V

+5V
IC804 AZ1085S-3.3TR/E1
MAX 3A INPUT 3 2 OUTPUT L814 MLB-201209-0120P-N2

C885 0.1uF 16V

C828 68uF 10V

GND
+3.3V_CI

40 mA

$0.122 1

AP2121N-3.3TRE1 VIN VOUT

R866 0

IC802

ADJ/GND

C852 0.1uF 16V

3 1

C802 10uF 16V

C803 0.1uF 16V

GND

C806 10uF 16V

C892 10uF 6.3V READY

C829 10uF 16V

C831 0.1uF GND 650 mA


0 R862 C850 10uF 6.3V C897 220uF 6.3V C844 0.1uF

+3.3V

C891 10uF 6.3V READY

GND

GND

+3.3V_AVDD
320 mA
+5V +3.3V_AVDD +3.3V_AVDD IC803 AP1117E18G-13 R865 0 IN ADJ/GND L805

S6 core 1.26 volt


50 mA
+1.8V_TU

+5V_GENERAL 465 mA @85% efficiency

3 2

IC801 AP1117E33G-13
IN ADJ/GND 10uF

C814 0.1uF 16V

OUT

C822 10uF 6.3V READY

C889 10uF 6.3V

C827 0.1uF 16V READY

C824 0.1uF 16V

C825 100uF 16V

P_+5V

3 2

READY

C810

C842 100uF 16V

C800 10uF 6.3V

C801 0.1uF 16V

OUT

C888 10uF 6.3V

C811 0.1uF 16V

L802 MLB-201209-0120P-N2
C841 100uF 16V

Replaced Part READY R827 10K

R831 10K

MAX 3A
+1.26V_VDDC
C899 READY 0.1uF 16V

R2 = R1/(Vout/0.8-1)

+3.3V

+1.8V_DDR
IC800 AZ1085S-ADJTR/E1 INPUT OUTPUT

450 mA
+1.8V_DDR

READY 50V 100pF C870

R824 360K 1% R825 620K

IC805 MP2212DN
R1 FB R2 GND 2 7 SW_2 EN/SYNC L813 3.6uH NR8040T3R6N
TP1451

1600 mA
R802 0 1/4W C OUT C843 10uF 6.3V C830 0.01uF 50V C894 10uF 6.3V C856 0.1uF C896 10uF 6.3V READY

R864 0

1% Placed on SMD-TOP IN

3 1

SW_1

C878 10uF 6.3V

C883 0.1uF 16V

ADJ/GND R861 75 1% R860 33 1%

C893 10uF 6.3V

C880 10uF 6.3V READY

C877 0.1uF 16V

BS C838 10uF 16V C898 10uF 16V

VCC

R830 10 1% C836 1uF 10V

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
POWER

MSD3368EV Platform POWER 7 10

Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

LGE Internal Use Only

JK900 PPJ237-01 6C 5C 4C 5B 4A 5A 6A 6H 5H 4H 5G 5F 7F 5E 7E 4D 5D 6D 6N 5N 4N 5M 5L 7L 5K 7K 4J 5J 6J [RD1]E-LUG [RD1]O-SPRING [RD1]CONTACT [WH1]O-SPRING [YL1]CONTACT [YL1]O-SPRING [YL1]E-LUG [RD2]E-LUG [RD2]O-SPRING_2 [RD2]CONTACT [WH2]O-SPRING [RD2]O-SPRING_1 [RD2]E-LUG-S
D912 D911 R905 470K READY
C905 1000pF 50V D900 30V D902 5.6V R901 470K D901 5.6V R900 470K

REAR CVBS
5A 4A R908 C900 100pF 50V 10K
AV_RIN

SIDE CVBS
[YL]E-LUG [YL]O-SPRING [YL]CONTACT [WH]O-SPRING [RD]CONTACT [RD]O-SPRING [RD]E-LUG R933 10K D922 C913 100pF C911 0.1uF 16V D919 30V R963 10K +3.3V_AVDD D931 30V R937 75 R938 0 C916 47pF 50V

SIDE_CVBS_IN

3A 4B

R915 12K

+3.3V_AVDD R940 10K


R909 C901 100pF 50V 10K
AV_LIN

3C 4C 5C PPJ235-01 JK902

R973 1K

SIDE_CVBS_DET

R916 12K D915 30V C906 47pF 50V

AV_DET

R917 0 R910 75

C909 0.1uF 16V


AV_CVBS_IN

SIDE_LIN
12K R932

R923

470K

R930 10K R922 470K D921 12K C912 100pF

SIDE_RIN
R931 P_+5V

R913
COMP1_RIN

COMP1
R925 12K

D909

R904 470K

C904 1000pF 50V

10K

R914
COMP1_LIN

10K

R926 12K
COMP1_Pr

SWITCH ADDED
IC900 AP2191SG-13

+3.3V_CI

L901

USB
IC902 NL17SZ08DFT2G

R927 75

1%

NC

GND

0.1uF

OUT_2

IN_1

R991 10K

USB_CTL AC_DET

[BL2]O-SPRING
D913

OUT_1

READY

R928 75

COMP1_Pb

C934 470uF 16V

IN_2

C927

READY

FLG

EN

R999 10K

[BL2]E-LUG-S [GN2]CONTACT

R992 10K

1%

R944 100 R970

0 USB_OCD

KJA-UB-4-0004 JK905

+3.3V_AVDD D914 R929 75 R907 10K

R939 0
COMP1_Y

1 USB DOWN STREAM

USB_DM

1%

[GN2]O-SPRING [GN2]E-LUG

READY

READY

D910 30V

COMP1_DET

[RD3]E-LUG [RD3]O-SPRING_2 [RD3]CONTACT [WH3]O-SPRING [RD3]O-SPRING_1 [RD3]E-LUG-S


D905 D903

R911
COMP2_RIN

R902 470K

C902 1000pF 50V

10K

R918 12K

COMP2

R912
COMP2_LIN

R903 470K

C903 1000pF 50V

10K

R919 12K
+5V_GENERAL +5V_GENERAL

R936 1K

USB_DP D932 D933 CDS3C05HDMI1 CDS3C05HDMI1 5.6V 5.6V

READY

COMP2_Pr

OPTIC
JK904 JST1223-001 GND

R920 75

[BL3]O-SPRING [BL3]E-LUG-S [GN3]CONTACT [GN3]O-SPRING [GN3]E-LUG

D906

1%

IC901 NL17SZ00DFT2G

SPDIF_OUT
B

VCC

R964 1K READY R998 100 READY R997 0

READY Y

READY

D907

R921 75

COMP2_Pb
GND 3 4

1%

Fiber Optic

R935 0

READY

D908

R924 75

1%

+3.3V_AVDD R906 10K

COMP2_Y

READY

D934 C926 0.1uF 50V VINPUT

3 4

R934 1K
COMP2_DET

VCC

GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

READY

FIX_POLE

D904 30V

MSD3368EV Platform JACK 8 10

LGE Internal Use Only

D1002

D1003

D1004

D1007

+5V_VGA JK1001 SPG09-DB-010


C1001 0.1uF 16V

D1008

+5V_VGA +5V_ST

A1

A2 C

R1018 22 C1015 4.7pF

DSUB_R

6 1 7 2 8 3 9 4 10 5 15 14 13 12 11

RED_GND GND_2 RED GREEN_GND DDC_DATA GREEN BLUE_GND H_SYNC BLUE NC V_SYNC GND_1 SYNC_GND DDC_CLOCK DDC_GND

IC1001 AT24C02BN-10SU-1.8
1 8

ENKMC2838-T112 D1012

R1017 22 +3.3V_AVDD R1016 10K C1014 4.7pF R1019 1K

DDC_SDA/UART_TX DSUB_G
2 7 3 6

R1024 4.7K R1023 100

R1029 4.7K

C1022 0.1uF
R1032 0 DDC_SCL/UART_RX R1033 0 DDC_SDA/UART_TX

DSUB_DET D1009 30V READY C1013 0.1uF 16V

C1018 18pF 50V

C1021 18pF 50V

ISP_RXD ISP_TXD

16

SHILED

R1015 22 C1012 4.7pF R1014 1K C1017 12pF

DSUB_B DSUB_HSYNC

PC AUDIO
JK1000 PEJ027-01 3 6A E_SPRING T_TERMINAL1 B_TERMINAL1 PC_RIN R_SPRING T_SPRING B_TERMINAL2 PC_LIN T_TERMINAL2 D1011 5.6V C1019 100pF 50V R1026 10K R1021 R1025 470K 12K D1010 5.6V 5 C1020 100pF 50V R1028 10K R1022 470K R1027 12K

R1013 1K

C1016 12pF

DSUB_VSYNC

7A 4

DDC_SCL/UART_RX
7B

GND

R1005 75

R1007 75

R1010 75

R1011 4.7K

R1012 4.7K

LVDS FFC WAFER


52 51 PC_SER_CLK PC_SER_DATA PDP_SCL 50 49 48 MOD_ROM_RX 47

LVDS
P401 SMAW200-H26S1

6B

ROM DOWNLOAD FOR PDP

1 3 5 7
PDP_SCL 100 R407

2 4 6 8 10
100 R401 RXO0+ RXO1+ RXO2+ RXOCK+ RXO3+ RXO4+ PC_SER_DATA PDP_SDA MOD_ROM_TX

R1003 10 C1003 270pF 50V READY C1004 220pF 50V READY

DISP_EN

PC_SER_DATA

PDP_SDA R442 27K READY

46 45 44 43

R1001 10 C1000 270pF 50V READY C1002 220pF 50V READY

9 11 13 15 17 19 21 23 HD

D1000

D1001
RXO0RXO0+ RXO1RXO1+ RXO2RXO2+

42 41

RXO0RXO1RXO2RXOCKRXO3RXO4PC_SER_CLK 100 DISP_EN R404 27K READY HD 0 R402 READY R403

12 14 16 18 20 22 24 26

PC_SER_CLK

40 39 38 37 36 35 34

RXOCK-

33 32 31

RS232C
+3.3V_ST

25

SUB Board I/F


P402
12507WS-12L
L405 MLB-201209-0120P-N2

RXOCK+

RXO3C1007 0.1uF 50V C1008 0.1uF 50V RXO3+ C1009 0.1uF 50V C1010 0.1uF 50V DOUT2 RIN2 C2C2+ C1C1+ VV+ RXO4RXO4+

30 29 28 27 26 25 FHD

27
IR R443 4.7K +3.3V_ST C403 680pF READY

C407 10pF 2

R408 10K KEY1

R409 10K

L404 MLB-201209-0120P-N2

3 C402 L403 10pF MLB-201209-0120P-N2 C406 10pF C405 10pF

RXE0RXE0+

24 23

KEY2 C401 L401 10pF MLB-201209-0120P-N2 LED_R C404 10pF

IC1000 MAX3232CDR

$0.179

RXE1RXE1+

22 21 20 19 18 SUB_SCL C1027 10pF READY

6 R1035 22 R1034 C102922 10pF READY

11

10

12

13

14

15

16

RXE2RXE2+

ROUT2

DIN1

ROUT1

DIN2

RIN1

DOUT1

GND

VCC

+3.3V_ST R1037 10 PC_SER_CLK R1038 10 PC_SER_DATA R1008 100 D1014 READY DBG_TX DBG_RX C1005 C1006 220pF 220pF 50V 50V D1006 READY 30V D1015 READY R1002 4.7K R1004 4.7K R1006 100 READY READY

C1011 0.1uF 50V

RXECKRXECK+

SUB_SDA 17 16 +3.3V 15
L406 GLASS

+5V

+3.3V_ST

C1028 10pF READY

9 R405 0 C400 10uF 6.3V

RXE3RXE3+ RXE4RXE4+

14 13 12 11 D1013 1N4148W_DIODES 10 9 8 7 6 5 R1036 22 B READY E C Q1001 2SC3052 +3.3V BU400 PKM13EPY-4002-B0

L408 NORMAL

R1039

0 READY SUB_SCL 0 READY SUB_SDA

10

R1040 C1031 10pF 50V READY D1005 READY 30V C1030 10pF 50V READY

+3.3V_ST READY

R445 4.7K

11 C1025 10uF 6.3V

L400 MLB-201209-0120P-N2

LED_B

12 13

C408 10pF C1026 10pF READY

100V READY

1 READY 2

JK1002 SPG09-DB-009 6 7 8 9

MOD_ROM_TX MOD_ROM_RX 10

4 3 2 1

KEY_BUZZER

TF05-51S P403

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

MSD3368EV Platform RGB,RS232,LVDS 9

10

LGE Internal Use Only

+3.3V_TU
FE_TS_SERIAL FE_TS_VAL

/FE_RESET
READY R1142 10 (TUNER RESET GPIO OPTION) C1141 0.1uF 16V

XC5000_RESET
10 R1127

TU_RESET

+3.3V_TU_CE READY

TUNER RESET
: ACTIVE LOW (SOFT RESET)

R1107

33

+1.8V_TU_CE

READY R1118 0 R1114 33 R1113 33 R1119 22K +3.3V_TU_CE

16V 0.1uF C1164

R1108 33

C1159 0.1uF

33 R1111

16V 0.1uF C1147

R1105 47K

FE_TS_CLK

FE_TS_SYN

IF_AGC

TU_RESET

+3.3V_TU_CE

0.1uF

0.1uF

C1140 0.1uF 16V

1000pF

0.1uF

0.1uF

4.99K

+1.8V_TU
+3.3V_TU

CVDD_6

VSS_11

CVDD_5

C1156

C1148

MICLK

BKERR

MOCLK

VDD_5

1%

+3.3V_TU
+3.3V_TU_CE

VSS_10

+3.3V_TU +1.8V_TU
C1165 0.1uF

MDO7

MDO6

MDO5

MDO4

MDO3

MDO2

MDO1

MDO0

C1115

C1117

C1163

R1152

C1142 1000pF 50V

VDDA_8

VDDC_9

VDDA_7

VDDC_8

VDDC_7

VREF_P

VREF_N

VDDC_6

64

63

62

61

60

59

58

57

56

55

54

53

52

51 50

GND_9

RESET

R1138 1K

REXT

VI2C

1K R1153

49

VSS_1 VDD_1 VSS_2 CLK1


SCL1 SDA1
+1.8V_TU_CE

48

47

46

45

44

43

42

41

40

39

38

37

KCN-ET-5-0094 JK1101 1 2 C1120 56pF C1126 L1108 0603CS-R27XGLW L1111 0603CS-6N8XGLW2% 39pF L1116 0603CS-R39XGLW 6.8nH 270nH 2% READY C1103 50V 6.8pF C1134 1000pF VDDA_1 IN1 GND_1 IN2 390nH 2% GND_2 C1109 0.1uF L1114 EXTCHOKE GND_3 VDDA_2 VDDA_3 VDDC_1 GND_4 C1171 0.1uF VDDC_2 820nH 2% 1008CS-821XGLC C1167 C1158 0.1uF 0.1uF 1 2 3 4 5 6 7 8 9 10 11 12

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

48 47 46 45 44

MOVAL MOSTRT VSS_9


+3.3V_TU_CE R1117 1K

36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24

GND_8 SDA SCL VDDD_2 EXTREF X1 GND_7 X2 ADDRSEL DDI2 VDDC_5 DDI1 0.1uF R1102 4.7K C1151 X1102 31.875MHz C1173 18pF /FE_RESET R1103 0 C1121 0.1uF C1108 18pF R1155 R1150 C1131 C1152 18pF 18pF 50V 50V 100 100

SDA1 SCL1

VDD_4 SMTEST GPP3 AGC1 AGC2/GPP2


+1.8V_TU_CE

IC1104 XC5000

DATA1 IRQ CVDD_1 VSS_3 RESET SLEEP STATUS SADD4 VDD_2 VSS_4 SADD3 SADD2

RCLAMP0502B D1101 C1 A C2

C1146 120pF

IC1100 CE6355

43 42 41 40 39 38 37 36 35 34 33

VSS_8 CVDD_4 VSS_7 CVDD_3 DATA2/GPP1 CLK2/GPP0 RFLEV VDD_3


R1115 10K R1116 10K +3.3V_TU_CE

+1.8V_TU
L1101 MLB-201209-0120P-N2

TU_SLEEP_MODE

ACTIVE HIGH
A2[GN]
4.7K R1100 READY

GND_5

GND_6

+3.3V_TU +1.8V_TU

TESTMODE

VIF

VDDC_3

VDDA_4

VDDA_5

SIF

VDDC_4

VDDA_6

VDDD_1

VAGC

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

C1129

C1169

C1124

C1182

C1116

C1118

C1119 0.1uF

C1176 0.1uF 16V

L1102 SAM2333
READY

A1[RD]

AVDD

XTI

XTO

VIN

PLLTEST

OSCMODE

CVDD_2

PLLVDD

PLLGND

AGND_1

VIN

R1130 1K C1133 0.1uF 16V

IF_AGC

+1.8V_TU_CE

C1123 0.1uF

To separate chassis ground


R1166 0 R1174 0 R1182 0 C1106 R1122 0.1uF 390 16V

R1104 10K READY R1106 10K

16V

+5V

C1128 0.1uF 50V READY 22pF C1136 C1135 0.1uF 16V 0 R1110 C1127 27pF 50V READY 22pF C1138

Place the Buffer close to Tuner


TUNER_SIF

READY R1109 100K

R1167

R1175

R1183

R1168

R1176

R1184

0 R1135 680 E Q1103 ISA1530AC1 L1105 MLF1608A2R7J 2.7uH 5% B C1161 6.8pF 50V C

X1100 20.48MHz

AGND_2

SADD1

SADD0

VSS_5

VSS_6

C1139 0.1uF 16V

R1169

R1177

R1185

R1170

R1178

C1122 27pF 50V

TUNER_IF_P

+5V
08.10.06 CHANGE LOAD CAP 22pF -> 27pF

R1171

R1179

0 C1183 0.1uF 16V

R1172

R1180

R1159 390

R1173

R1181

TUNER_IF_N +3.3V_TU
E Q1108 ISA1530AC1 B C

+5V
L1118

C1180 68uF 10V FHD

C1185 0.1uF 16V

C1186 0.1uF 16V

C1187 0.1uF 16V

+3.3V_TU
R1101 390 C1168 0.1uF 16V L1103 MLB-201209-0120P-N2

+3.3V_TU_CE

TUNER_CVBS

TUNER_IF_N

16V 0.1uF C1105

16V 0.1uF C1107

16V 0.1uF C1111

16V 0.1uF C1113

C1130 10uF 6.3V

16V 0.1uF C1137

16V 0.1uF C1144

16V 0.1uF C1149

16V 0.1uF C1150

R1112 680 L1110 MLF1608A2R7J 2.7uH 5% B C1104 6.8pF 50V

E Q1102 ISA1530AC1 C

+5V +1.8V_TU
R1157 390 C1184 0.1uF 16V L1100 MLB-201209-0120P-N2

+1.8V_TU_CE

TUNER_IF_P

C1100 10uF 6.3V

C1101 0.1uF 16V

C1102 0.1uF 16V

C1110 10uF 6.3V

C1112 0.1uF 16V

C1114 0.1uF 16V

C1125 0.1uF 16V

C1132 0.1uF 16V

C1143 0.1uF 16V

C1145 0.1uF 16V

E Q1109 ISA1530AC1 B C

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2010 LG Electronics Inc. All rights reserved. Only for training and service purposes

MSD3368EV Platform TUNER

10

10

LGE Internal Use Only