RF communication implementing Cognitive Radio

Dipti Baheti Computer Engineering Department, San Jose State University, San Jose, CA 95192-0180 distance is really short and so baseband signal itself is transmitted, without any change to its frequency or bandwidth. This sort of communication is usually over a short distance and a wired medium. Ethernet is a good example of baseband communication [2]. II. GOAL OF THE PROJECT This report is based on a number of projects completed incrementally along the course of this semester for the course Embedded Wireless Communication. The embedded system used for the implementation is Samsungs S3C44B0X ARM7 TDMI CPU development board. RF communication is established using two discrete modules for transmission and reception in unlicensed airspace. The final goal of this lab is to implement Cognitive Radio technique for efficient and effective RF communication. III. METHODOLOGY As mentioned before, baseband signals are the signals that carry the real information that is to be transmitted. They can be audio, video, temperature or any other data. A baseband signal can be represented by the following equation ( ) {

Abstract This is a report based on the implementation of a wireless RF communication system employing basic cognitive capabilities [1]. It is an account of a series of lab assignments performed incrementally towards achieving the final goal of Cognitive Radio. We start with implementing algorithms for establishing synchronization between the two ends of communication, followed by reduction of data redundancy, error detection and error correction. These techniques are static in nature which is good as long as the quality of communication is satisfactory, because it helps save costs. However if the communication channel becomes too noisy the system must adapt to use different techniques for better communication. Based on the feedback from the receiver side about type of noise being introduced in the channel, the system may modify one or more algorithms for improved communication. I. INTRODUCTION Radio Frequency (RF) has been used for wireless communication for decades now. New techniques in RF communication have helped achieve increasingly efficient communication with high resistance to external noise. With the maturing of 3G technology and the advent of 4G, we know that wireless communication is the way to go. Baseband signals are the low frequency signals that carry the actual information. These low frequency signals can only be transmitted over very short distances before they start getting distorted by external noise. Therefore effective communication requires processing the baseband signals such that they can be transmitted over long distances. There are some instances where the communication

A sequence of baseband signals looks like what is shown in figure below.

A

Fig1. Sequence of baseband signals

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This sequence is then multiplied with a carrier signal that is sinusoidal in nature and has higher frequency so it can be transmitted over longer distances. There are a number of techniques for modulation that have developed over the years and serve different purposes. Amplitude Shift Keying (ASK) and Frequency Shift Keying (FSK) are the basic methods that were developed to achieve frequency translation of digital signals. Later another technique was developed known as Phase Shift Keying (PSK) that had many advantages over ASK and FSK. Numerous other methods were also developed based on these fundamental modulation techniques such as BPSK, QPSK, DQPSK etc. Fig4. Block diagram of the S3C44B0X board The implementation of this series of projects has a hardware aspect and a software aspect. The hardware consists of the ARM7 development board and an external prototyping board on which all the components have been wire-wrapped. The prototyping board communicates with the CPU through the General Purpose Input Output (GPIO ports). The development board itself communicates with a host laptop through an RS 232 cable. The details of the hardware design have been described in the section below.

Fig2. ASK modulation In ASK (also known as On-Off keying), the binary data signal is multiplied with the modulating signal. The result of ASK modulation is illustrated in the figure below. The signal on top represents the binary data signals as a sequence of 1s and 0s. The second signal is the result of multiplication with the carrier signal.

Fig3. Binary signal before and after ASK mod. The receiver contains a demodulator that recovers the original data from the received data and recreates the binary pattern. The detailed mathematical analysis of all modulation techniques can be found in [3]. IV. IMPLEMENTATION (DESCRIPTION OF PROJECT) Figure 1 gives a block diagram of the development board used for the implementation and testing of this project.
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Fig5. Complete system connection Hardware Design: The crux of the hardware implementation is the set of transmitter and receiver modules used for the RF communication. We use CTI-TX1A100 RF module as the transmitter (Tx) and CTI-RX5D100 RF module as the receiver (Rx). The modules operate at a typical frequency of 430.5 MHz and use Amplitude Shift Keying (ASK) modulation. It is important to stay within the specified bandwidth

because overstepping might cause interference with other bands licensed for other tasks. The pin diagram of the modules and their functionality has been explained in the Figure 3 and Tables 1 and 2 respectively.

present on the S3C44B0X board. The transmitter sends out bits at a predefined rate of 300 bps. On the receiver side, the timer is set to 3000 bps so that it can oversample the incoming bits by a factor of 10.

Fig7. Block diagram of PWM timer [6] The MCLK (master clock) is 40MHz. The PWM can be set to use any 8-bit prescaler and any one of the 5 clock dividers. It can also be set to count at a rate provided by the equation below to get the clock cycle needed by using timer count buffer. The Prescalar value of 48, divider value of 16, and counter value of 0xAA will give a frequency output of almost 300Hz. Output Freq = MCLK/ (Prescalar Value +1)/ divider value/ counter Software Design The software aspect for wireless communication involves the programming for the transmitter and the receiver. We will discuss the software required on the transmitter and receiver side separately first, to focus on the discrete features included the software design in order to improve the efficiency and to reduce the probability of error. The data is transmitted in the form of packets. Apart from the data payload, each packet contains a synchronization field, information about the source, destination and a delimiter field [7]. The structure of the data packet is as shown in figure 8.The Sync field is 64 bits long and contains a sequence of 1s and 0s. Its purpose is to help establish synchronization between the transmitter and receiver end so that the data sent by the transmitter is received and interpreted correctly at the receiver end. IEEE 802.11 standards use a 128 bit Sync field [8]; however we use 64 bits for our implementation. Also, the bit pattern of the Sync field is chosen so that zero crossing may be established. The need for zero crossing has been explained in a later section.
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Fig6. Pin-out diagram of the Tx and Rx modules The Rx and Tx modules can be used for a wide variety of wireless applications both by amateurs as well as in the industry [4][5]. There are no external compensation components required for these modules. An antenna should be connected to the appropriate pins of the modules. Both the transmitter and the receiver need an antenna each. But we will look at design options in later sections, which help simplify the circuit by using one antenna for transmitter and receiver both. Once the hardware setup is constructed, it remains the same throughout all the projects. The features that are added are all implemented on the software side.
Transmitter Pin Number 1 2 3 4 Function 3 ~ 12V DC Ground Signal In Antenna

Table1. CTI-TX1A-100 (Transmitter) pin functions

Receiver Pin Number 1 2 3 4 5 6 Function Antenna Signal Out Signal Out (-) Not connected Ground 3V DC

Table2. CTI-RX5D-100 (Receiver) pin functions The transmitter has to transmit the bits at a fixed rate. For this it requires a clocking mechanism. The clock used for both the transmission and reception system is the Pulse Width Modulation (PWM) timer

linear-feedback shift registers with certain bits xored (modulo-2 addition) and fed back to the register as input. The descrambler is a feed-forward shift register and has a design symmetric to that of the scrambler. Fig8. Transmission packet structure [7] On the receiver side, each bit sent by the transmitter is sampled 10 times. The value of each sample is either 1 or 0. For a given set of 10 samples on the receiver (1 bit on the transmitter), if the number of 1s received are more than the number of 0s, the bit received is a 1 and vice versa. For example, if the transmitter transmits a 1. The receiver gets a sequence as 1 1 0 1 1 0 0 1 1 1 where some bits have been flipped due to transmission errors. There are seven 1s and three 0s. Based on our algorithm, we will assume that the received bit was a 1. Synchronization between the two CPUs boards can be tested out with wired communication using GPIO ports. Once we are convinced that sync has been established we test it on the wireless setup. Also, other problems that obstruct effective wireless communication can now be addressed. Some of the problems that affect wireless communication adversely are as listed below. a) The loss of timing due to insufficient zero crossing. b) The induction of errors in the data during transmission. c) Reduction of redundancy in the data being transmitted. A. Establishing zero crossing with scrambler and descramblers There are a number of reasons why one would want to avoid long series of zeroes or ones in a communication sequence. Communication systems require spectral rise and fall of signal to establish zero crossing of the signal. Zero crossing helps to establish timing and to minimize problems such adaptive equalization and clock recovery [3]. But sometimes, systems may encounter cases where they have to transmit a series of continuous ones or zeroes. To avoid this problem, we use scramblers and descramblers. A scrambler is essentially a
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IEEE 802.11 standards use a seventh order system for scrambling and descrambling [8]. A seventh order system means that there are seven delay elements in the shift registers. There are taps on the fourth and seventh elements. On the transmitter side, the scrambler uses modulo-2 addition to add the fourth and seventh bit with the input. This result is fed into the shift register as input. On the receiver side, the descrambler does a similar but symmetric operation on the incoming bits. The input sequence is fed into the shift register as it comes bit by bit. The fourth and seventh bits are added using modulo-2 addition. The result is now added with the incoming bit. This gives the descrambled output. In absence of transmission and local errors, the output of the descrambler is equal to the input to the scrambler. For implementation in this project we use a fifth order system with the taps present on the third and fifth bits. Figure 9 illustrates the use of a fifth order scrambler descrambler system. The following table illustrates how a fifth order scrambler system would help break a long string of ones. We assume that the initial contents of the scrambler register are all 0s.

Fig9. Fifth order scrambler system

Input D1 D2 D3 D4 D5 Output 1 0 0 0 0 0 1 1 1 0 0 0 0 1 0 1 1 0 0 0 0 0 0 1 1 0 0 1 0 1 0 1 1 0 1 1 1 1 0 1 1 0 0 1 1 1 0 1 0 0 0 1 1 1 0 1

Table 3. Fifth order scrambler input and output

1. No row should be all 0s. 2. Each row of the encoder matrix should be linearly independent. Gk,n = [Ik,k | Pk, n-k] where Ik,k is an identity matrix and Pk, encoder matrix. Fig10. Fifth order descrambler system
Input D1 D2 D3 D4 D5 Output 1 0 0 0 0 0 1 1 1 0 0 0 0 1 0 1 1 0 0 0 0 1 0 1 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 1 0 1 1 1 0 1 0 1 0 1 1 1 0 0
n-k

is an

The Generator matrix G used implementation is as shown below

1 0 0 0 G 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1

in

this

Table 4. Fifth order descrambler input and output We can observe that the scrambler and descrambler are always symmetric in nature. The output of the descrambler is same as the input to the scrambler. It also helps break long series of 1s or 0s. B. Error detection and correction with Channel coding Transmission through a medium can induce errors in the data being transmitted. If the receiver can detect that the data that it has received contains error(s), it can request the transmitter to resend the data. However a better way would be if the receiver can detect the presence of error and correct it. This is achieved using Channel Coding techniques. The objective of Channel coding is to make communication systems more robust and resistant to the errors induced due to channel noise. An easy way to achieve this is by transmitting certain bits with the data that indicate whether the data has maintained its integrity over the channel. So a data that is actually k bits long is transmitted as an n bit sequence where (n-k) bits have been added for error detection and correction. The algorithm used here is known as Linear Block Coding. It involves the construction of a Generator matrix Gk,n based on the following rules:
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1 1 0 0 0 1 1 0 0 0 1 1 1 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 0 1 1 1

This matrix G is multiplied with the k bit data vector that is to be transmitted. We get a resulting data of n bits that is actually transmitted. C1,n = D1,k Gk,n

Fig11. Linear Block Coding process On the receiver side, we have a vector R where R1,n = C1,n + E1,n where E1,n is error induced in message during transmission. It has the same dimension as the transmitted message. For decoding the message on the receiver side, we have a decoder matrix, Hn,n-k = Pk, n-k In-k,n-k The H matrix used in this implementation is as shown below

1 0 0 1 1 0 H 1 0 1 0 0 0

1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 1 1 1 0 0 0 1 0 0 0 1 0 0 0 1

the amount of data being sent, so by allocating shorter codes to more frequently occurring symbols, we can potentially reduce the size of the data to be transmitted. The steps to perform Huffman encoding on a set of symbols are as follows: i. ii. Arrange the symbols in descending order. Combine the 2 smallest probability symbols to form an item with the sum of the probability. iii. Mark the top branch as 1 and the bottom branch as 0. iv. Repeat this process till you finish entire source

We multiply this Decoder matrix with the received vector R. The result is what is known as the Syndrome matrix Sn,n-k = R1,n Hn,n-k This S matrix gives the indication of presence of error in the received data. If the Syndrome matrix is not a zero vector then error is present. The Syndrome matrix also indicates which vector has the error. The bits of the Syndrome matrix match with the bits of one of the rows of the H matrix. We compare the S matrix with each row of H; the position of the vector that matches indicates the bit in the R vector that should be flipped. For example, assume S = (1,1,1,0). This matches with the 6th vector from the bottom of the H matrix. This indicates that the 6th bit in the vector R contains error and should be flipped for the correct result. C. Reducing data redundancy using Huffmans Algorithm We know that bandwidth is an expensive resource. All data to be transmitted from one node to another occupies bandwidth, therefore there is constant concern to minimize the data that needs to be transmitted so that more meaningful data can be sent in the same bandwidth. Huffmans Algorithm is a popular technique to reduce such redundancy. The technique uses the probability of occurrence of each symbol to assign it a code. The codes can be of variable length and the shortest codes are assigned to the symbols with highest probability of occurrence. The idea is to minimize
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Fig12. Example of Huffman tree and encoding The result of Huffman coding is a tree like structure as illustrated in the figure. The left most part of the tree consists of the leaves or the symbols that underwent coding. The rightmost part of the tree should give a result 1 which can be interpreted as the sum of the probabilities of all the symbols. In order to get the Huffman code for a symbol, simply traverse the tree from right to left noting the value of each branch encountered beginning with the most significant bit (MSB) to the least significant bit (LSB). The average code length can be calculated as follows. _ ( ) L Huffman coding provides a significant reduction over other common codes (such as ASCII) in the size of data being transmitted. For data as small as SJSU, ASCII code takes 8 x 4 = 32 bits where as Huffman code takes only 6 bits. That is nearly 81% improvement in size.

V. SYSTEM DESIGN FOR IMPLEMENTING COGNITIVE RADIO The design used until now has not required full duplex communication. But in order to implement Cognitive Radio (CR), the receiver needs to send back information related to the quality of data transmission to the transmitter side. Based on this feedback, the transmitter can make some changes on the process of scrambling and coding. The receiver will establish the quality of communication and the integrity of the data received based on a predefined field whose expected value is known to the transmitter as well receiver. If this field of data does not satisfy the minimum criterion set for accepting incoming data packets, the transmitter is given an indication to resend the packet. The transmitter can change several factors to improve the quality of communication. 1. Increase in the voltage supply to the transmitter. 2. Use of a higher order scrambling system to ensure better zero crossing. 3. Use a different generator matrix G for Linear Block Coding. 4. If the RF modules used in the implementation use FSK modulation, then the transmitter could use a different frequency band for the communication.

require resources which in turn lead to increase in expense. For an embedded system, we would like to minimize the amount of electrical power or computational capacity the system consumes. For this reason we start with the minimum requirements and increase as the need arises. In fact, it has been observed that idle time of wireless systems is fairly high. At other times, the wireless systems are simply occupying a valuable resource [9].Cognitive radio can provide a way to let these systems hibernate when not in use so that radio frequencies may be allotted to other parties [10]. In the software design implementation, the receiver uses a part of the Sync field of the data frame to determine the quality of the communication. If the bits received do not match with the expected bits, an error bit is flagged back to the transmitter. The transmitter checks for the error bit before sending the next packet of data to the receiver. If the error bit is flagged, the transmitter changes its fifth order scrambler to a seventh order one. This is a basic implementation of RF communication implementing cognitive radio. We use ARM Program Manager as the development environment for creating our programs. The program is written as a RAM program with the RO base at memory location 0x0C00_8000 and RW base at 0x0C10_0000. We use the set of test programs available in the program distribution CD supplied with the S3C44B0X CPU development kit. The main file known as 44botest.c invokes a set of functions to test various functionality and peripherals. This program acts as our base program. We add functions and files to this file as we deem necessary. The ARM7 development board is interfaced with a host laptop using RS-232 serial communication. Once the binary image file has been loaded onto the board using Kermit protocol or a TFTP server, the output can be viewed on HyperTerminal (in case of Windows) and MiniCom (in case of Linux). The board is interfaced with the host laptop using a baud rate of 115200, no parity and flow control and stop bit length of 1. The development board interacts with the user through the HyperTerminal window.

Fig13. Software design flow of the system It would be a valid question to ask at this point that why do we not use these techniques that might potentially improve communication in the beginning itself. The reason is that all techniques
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We can improve the design of the hardware by reducing the components used. For example, we know that at a time a program is only transmitting or only receiving. So we can eliminate the use of two antennas and replace it with one antenna and a switching mechanism for switching back and forth between transmission and reception. VI. CONCLUSIONS In this paper, we gave a cumulative report of a series of lab projects performed to achieve wireless RF communication implementing Cognitive Radio. Cognitive Radio is an exciting field by where we can change certain parameters and techniques for transmission to improve the quality of communication in case of noisy channels. In cases where communication channel is satisfactory, the transmitter uses basic and low cost techniques for sending data across to the receiver. The design and code was tested on the S3C44B0X ARM7 development board with wireless RF transmitter and receiver modules from CTI+ Corp. We implemented techniques for redundant data reduction and channel coding to facilitate error detection and correction. Scrambling was used to establish better synchronization. Barker code was introduced with a 3 bit Barker code being implemented as a spread spectrum technique in case of noisy communication. The major limitation of our implementation is that the signal drops off significantly when the wireless units are moved farther than a few inches. There is sudden surge of noise that corrupts the signal being sent. The software code can be improved to account for better noise handling so that the communication can be efficient even at a slightly farther distance. The use of better RF modules will also help improve the quality of communication. One of the modifications that can be made to by the Transmitter when it receives unsatisfactory feedback from the receiver is to change the frequency channel. But this is only possible with RF modules that support FSK modulation.

VII. REFERENCES [1] J. Mitola, Cognitive radio model-based competence for software radios, Licentiate Thesis, KTH, Stockholm (September 1999) [2]tech-faq.com. Baseband. [Online]. Available: http://www.tech-faq.com/baseband.html,(n.d.) [3] B P Lathi, Modern Digital and Analog Communication Systems, 3rd ed. , Oxford University Press, (2008). [4] CTI-TX1A-100 RF Module, CTI Plus Corporation, (n.d). [5] CTI-RX5D-100 RF Module, CTI Plus Corporation, (n.d). [6] PWM Timer S3C44B0X RISC MicroProcessor, Samsung Electronics (n.d) [7] H. Li, Lab 1 Guidelines CMPE 245, Lecture Notes of CMPE 245, Computer Engineering Department, College of Engineering, San Jose State University, (n.d.). [8] Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications IEEE 802.11b-1999 (R2003), (2003). [9] P. Kolodzy, et. al.,Next Generation Communications: Kickoff Meeting, DARPA, October 17, 2001. [10] G. Staple and K. Werbach. The End of Spectrum Scarcity, IEEE Spectrum, vol. 41, Issue 3, pp. 48-52, (2004).