BC0036

DIGITAL SYSTEM
(1 mark each)
d) Error can raise Trap. e) No f) Yes g) Not allowed h) Can be done with parity

i) Flags are implemented through j) Flip-flops k) Register l) AND gates m) Tri-state devices

n) A tri-state buffer is used to interface .. device. o) Input p) Output q) Memory r) Programmable

s) When CALL is executed the stack pointer register is decremented by t) 1 u) 2 v) 0

w) Off set value x) When PUSH is executed the stack pointer register is decremented by y) 1 z) 2 aa) 0 bb) Off set value

cc) The instruction RET transfers the content of the top two locations of the stack to the dd) Accumulator ee) H and L Register ff) B and C registers gg) Program counter hh) The POP transfers the content of the loop two locations of the stack to ii) Accumulator jj) H and L registers kk)Any two register pair ll) Program counter mm)In a 3-input DAC with 1 V as full scale analog input, the binary inputs 000 and 001 represent .. respectively. nn) 0 V and 1 V oo) 1/8 V and V pp)0 V and 1/8 V qq) 0 V and V rr) In the above question the binary input 111 represent ss) 1 V tt) V uu) 6/8 V vv) 7/8V

ww)Match the following : xx) Locator yy) Editor zz) Basic aaa)Assembler (A) (B) (C) (D) Symbol Table EXE2BIN EDLIN ROM

(a)-(B), (b)-(C) , (c)-(D), (d)-(A)

bbb)Resolution of 8-bit input DAC is approximately ccc)0.3% ddd)0.4% eee)1/28 % fff) 8% ggg)For a 8-bit converter we need comparators hhh)8 iii) 255 jjj) 2 x 28 kkk)28/2 lll) For 10-bit flash convertor we need .. comparators mmm)10 nnn)210 ooo)210-1 ppp)210/10 qqq)Dual slope ADCs are used mostly in voltmeters because rrr) It is of low cost sss)It converts high voltage to low voltage ttt) It converts analog to digital uuu)It gives large number of bits of resolution.

vvv)The main disadvantage of slope-type converter is (a) (b) (c) (d) low speed high cost large size complicate to design

www)The SAR is expended as (e) (f) (g) (h) Successive Accession Register Sequential Accession Register Successive Address Register Successive Approximation Register

xxx)An ADC is called unipolar when (i) (j) (k) (l) Its input are always (+)ve Its input are always (-)ve Its output are always (+)ve Its output are always (-)ve

yyy)If output of an ADC converter is going to drive a display, hen it is convenient to have the output coded in (m) (n) (o) (p) ASCII Gray Code BCD Octal

zzz)A smart scale device uses (q) (r) (s) (t) ADCs interfaced with computer DACs interfaced with computer Both ADCs and DACs interfaced with computer Computer scaling device

aaaa)Pick up the correct word for the following points: extremely low power dissipation

single supply voltage high noise immunity wide operating range with respect to supply voltage and ambient temperature

bbbb)MOS technology cccc)TTL dddd)Bipolar IC technology eeee)Static memory ffff)Select correct chip for PLA (Parallel interface Adapters) (u) (v) (w) (x) 8255 8237 8087 8259

gggg)The 10s compliment of 428 is (y) (z) (aa) (bb) 571 572 571 572

hhhh)The decimal value of (110101.11) is (cc) (dd) (ee) (ff) 53.75 55.75 51.75 57.75

iiii)The Gray code of the Binary number(10110)2 is (gg) (hh) (ii) 01001 10001 11101

(jj)

10101

jjjj)The Binary number of the Gray code number 11011 is (kk) (ll) 11010 10010

(mm) 10110 (nn) 00101

kkkk)In certain application, propagation delay is not a consideration, but power dissipation is critical, which logic family can be used? (oo) (pp) (qq) (rr) CMOS MOS TT TTY

llll)The Boolean function AB + A(B+C)+B(B+C) is equivalent to (ss) (tt) (uu) (vv) A+BC B+A AB+BC B+AC

mmmm)The Boolean expression for the following statement is X is a 1 only if A=B=C=1 or if only one of the variable is a Zero. (ww) X = ABC+ABC (xx) (yy) (zz) X = ABC+ABC+ABC+ABC X = ABC+ABC+ABC+ABC X = ABC+ABC+ABC+ABC

nnnn)Multiplexers are also known as .. selectors (aaa) Data selectors (bbb) address (ccc) control

(ddd) any input

oooo)One of the following can be used to eliminate key- bounce. (eee) (fff) R-S flip flop AND gate

(ggg) RS flip flops in which outputs are connected to inputs (hhh) J-K flip flops pppp)The S and R inputs of S-R flip flops are input (iii) (jjj) Asynchronous Synchronous

(kkk) Any type (lll) Synchronous, only for edge- triggering flip flops

qqqq)The major restriction when operating a pulse triggered flip flop is (mmm) data cannot be changed while, the clock pulse is in active state. (nnn) data cannot be changed while, the clock pulse is in inactive state. (ooo) data cannot be changed while, flip flop is set. (ppp) data cannot be changed while, flip flop is reset. rrrr)A decade counter is a counter that has the property (qqq) it has 4 flip flops and 16 possible outputs (rrr) (sss) (ttt) it has 4 flip flops and 10 possible outputs BCD counters Counters with 3 flip flops and 10 outputs

ssss)Ripple counters are also called (uuu) Synchronous counters (vvv) Decade counters (www) Flip flop with feedback inputs (xxx) Asynchronous counters tttt)A full counter with n flip flops will have .. states.
(yyy)

2n

(zzz) (aaaa) (bbbb)

2n -1 2n-1 2n +1

uuuu)The ring counter with n flip flops has . States. (a)2n (b) 2n (c) 2n -1 (d) 2n-1 vvvv)The number of clock pulses required to move data into and out of an eight bit serial in and serial out shift register is (cccc) 15 (dddd) 17 (eeee) 16 (ffff) 9

wwww)The binary numbers 1011 0101 is shifted into an eight bit parallel out shift register serially. The register has an initial contents 1110 0100. The outputs of Q after 2 clock pulses and 4 clock pulses are .. respectively. (gggg) 0101 0100 and 0110 0100 (hhhh) 1101 0111 and 1001 0010 (iiii) (jjjj) 1001 0010 and 1101 1110 0111 1001 and 0101 1110

xxxx)The divide-by 10 johnson requires .. flip flops (kkkk) 5 (llll) 10 4

(mmmm) (nnnn) 11

yyyy)The following is the sequence of states of a 3-bit .

000, 100, 110, 111, 011, 001, 000 (oooo) Ring counter (pppp) Serial in serial out BCD counter (qqqq) Ripple counter (rrrr) Johnson counter

(2 marks each)
FILL IN THE BLANKS

zzzz). Holds the last instruction fetched. A is a special kind of register designed to count number of clock pulses arriving as its input. aaaaa)To set the most significant bit of a 8 bit register A to 0. Logical AND operation on A with mask hex is used. A .. gate and a bubbled AND gate are equivalent. bbbbb)The carry output of a full adder with two inputs A and B with previous carry C is given by . The hamming distance between 101101 and 110010 is ccccc)In 1s complement representation +0 and -0 are . . Non numeric data are called .. ddddd)Binary equivalent of 13 is , Decimal number of 127 is equal to the hexadecimal .. eeeee)Nano second is equal to of a second. A flip-flop is an example of .. circuit. fffff)A circuit is one whose outputs depends upon the order in which the variables changes and can be affected. Data representation in a computer uses the number system. ggggg)The digits of binary system are called .. . A latch is a device. hhhhh)Sequential logic circuits contain devices called . , In half adder circuit SUM is realized using . Operation. iiiii)Multiplexer are used in digital circuits to control signal and data . , The smallest number of JK flip-flops required, to implement a ring counter is ..

jjjjj)In a gray code sequence, the .. between any two successive number is 1, Even parity is used to transmit 8 bit data. There is a transmission error if the byte received is kkkkk)A decoder can function as a demultiplexer with enable input used as , Master slave J-K flip-flop is configured from .. J-K flipflops. lllll)A accepts an n-bit binary word as input to convert digital to analog, A bar over a variable is called . mmmmm)Three basics law of Boolean algebra are commutative, associative and .., There are two basic forms of Boolean expressions : the sum of products and .. nnnnn)Demorgans theorms are used to represent the function only with gates, A . Operates as a decoder in reverse. ooooo) Product of Sum (POS) expression is the ANDed representation of two or more OR functions. The Ored terms in a POS form are known as __________ and used with a prefix __________ ppppp)There are flip-flops with ______________inputs, It has two outputs, which are always the ___________ of each other. qqqqq)CMOS is the acronym for ., rrrrr)A carry is generated from a full-adder when both input bits are ____, but a carry is propagated by a full adder when _____________ input bits are 1s. sssss)_________parity means that there is an even number of 1s in a code, while __________ parity means that there is an odd number of 1s in a code. Answers 1)Instruction Register. , Counters 4)Same, Characters 6)Billionth , Sequential 2)7F , Micro 5)1101 , 7F 7)Combinational, Binary 9)Flip-flops , Ex-or 11)Hamming distance , Odd 13)DAC, Complement 15)Universal, Encoder. 17) asynchronous, complement 3)AB+BC+CA. , 5

8)Bits , Storage 10)Routing ,4 12)Data input , 2 14)Distributive, Product of sum 16) maxterms, M

18) Combinational Metal Oxide Semiconductor 19) 1s, either or both. 20) Even, odd

(4 marks each)
1. Consider the following sequence of instructions : a=ab b=ab a=ba This sequence : a) b) c) d) swap a and b complements the values of a and b negates values of a and b then swaps them. retains the values of a and b

2. Consider the boolean expression xyz + xyz + x(y+z). The equivalent product of sums form is a) b) c) d) 3. xyz+xyz+xy+xz (x+y+z)(x+y+z)(x+y+z) (y+z)(x+y+z) (y+z)(xy+z) A positive binary coded decimal (BCD) number may be represented as N1 = (DL-1 DL-2 ...............D0) Where Di is a four bit binary form of each digit. The binary value of N1 may be written as : a) b) c) d) N1 = (..((DL-1 * 102 + DL-2 ) * 102)+......+D1) * 102 + D0 N1 = (..((DL-1 * 10102 + DL-2 ) * 10102)+......+D1) * 10102 + D0 N1 = (DL-1 DL-2 ........ D0)* 10102 N1 = (DL-1 DL-2 ........ D0)* 102

4. A circuit is designed to generate an even parity bit for a 3-bit register (4 Boolean variables) . which of the following equations a circuit to accomplish this task using a minimum number of AND, OR and NOT gates ? a) b) c) d) z= b0 b1 + b0 b1 b2 z= b0b1 + b0 b1 z= b0b1b2+b0 b1 + b0 b1 b2 z= b0b1b2+b0 b1 b2 + b0 b1b2 +b0 b1 b2

5. In the following K-map with dont care states, which values of A and B would minimize the final functions expression length ? 0 0 1 0 0 1 B 0 A 1 1 0 0 0 0 0

a) A=0, B=0 b) A=0, B=1 c) A=1, B=0 d) A=1, B=1 6. x 0 0 0 0 1 Determine which sum of minterms corresponds to the following Boolean function y 0 0 1 1 0 0 1 1 a) 1 1 z+y+x z 0 1 0 1 0 1 0 1 f(x,y,z) 0 1 1 0 1 0 0 0

b) c) d) 7.

xyz+xyz+xyz xyz+xyz+xyz xyz+xyz+xyz+xyz

The inputs of the J-K flip-flop, shown below are

PRESET = CLEAR = 1, J=K=0 If a single clock pulse is applied, then device will be : a) b) c) d) 8. toggle set reset not change state

Consider the circuit in the figure below. Here f implement

a) b) c) d)

ABC+ABC+ABC A+B+C ABC AB+BC+CA

9. What is the equivalent Boolean expression in product of sums for the K-map given in the figure below:

CD 00 01 11 10

AB

00

01 1

11 1

10

1 1 1 a) b) c) d) BD+BD (B+C+D)(B+C+D) (B+D)(B+D) (B+D)(B+D) 1

1 1

10.

The function represented by K-map given in the figure below: 00 01 0 0 11 0 0 10 1 1

0 1

1 1 ttttt)A.B

uuuuu)AB+BC+CA vvvvv)(B C) wwwww)A.BC 11. What is the equivalent Boolean expression K-map given in the figure below:

AB 00 01 11 10

CD

00 0 X 0 0 xxxxx)AB+CD yyyyy)D(C+A) zzzzz)AD+AB

01 0 X 1 1

11 1 1 1 1

10 0 X 0 0

aaaaaa)(C+D)(C+D)(A+B) 12. XY 00 01 11 10 a) b) c) d) 13. CD 00 01 11 10 1 1 1 1 Which function does NOT implement the K-Map given below: WZ 00 0 0 1 0 (W+X)Y XY+YW (W+X)(W+Y)(X+Y) None of these 01 X X 1 X 11 0 1 1 0 10 0 1 1 0

The minimized expression for the K-map given in the figure below: AB 00 01 1 11 10

bbbbbb)ABCD+ACD cccccc)ABCD+ACD+ABC dddddd)BCD+CD+ABC eeeeee)BCD+CD+BC 14. The negative logic AND gate shown in the figure to a positive logic

a) AND gate b) OR gate

c) NAND gate d) NOR gate 15. An excess-3 code is used to represent the integers 0 through 9, thus Code 1100 0010 1010 0110 1110 0001 1001 0101 1101 0011

Number 0 1 2 3 4 5 6 7 8 9

Which of the following expression is the correct one of an invalid code a) b) c) d) BCD+CD BCD+ACD BCD+BCD+ACD+ACD BCD+ACD