Beruflich Dokumente
Kultur Dokumente
Features
o Selectable Soft Switching Mode for Clickless Audio Operation o 35 max On-Resistance o -90dB Audio Off-Isolation at 20kHz -50dB Video Off-Isolation at 10MHz o -90dB Audio Crosstalk at 20kHz -52dB Video Crosstalk at 10MHz o Serial Interface 2-Wire, Fast-Mode, I2C-Compatible (MAX4571/72) 3-Wire, SPI/QSPI/MICROWIRE-Compatible (MAX4573/74) o Single-Supply Operation from +2.7V to +5.25V
MAX4571MAX4574
Applications
Set-Top Boxes PC Multimedia Boards Audio Systems Video Conferencing Systems
PART MAX4571CEI MAX4571CAI MAX4571CWI MAX4571EEI MAX4571EAI MAX4571EWI MAX4572CEI MAX4572CAI MAX4572CWI MAX4572EEI MAX4572EAI MAX4572EWI MAX4573CEI MAX4573CAI MAX4573CWI MAX4573EEI MAX4573EAI MAX4573EWI MAX4574CEI MAX4574CAI MAX4574CWI MAX4574EEI MAX4574EAI MAX4574EWI
Ordering Information
TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO 28 QSOP 28 SSOP 28 Wide SO
Pin Configurations
TOP VIEW
MAX4571/MAX4573
NO1 1 COM1 2 NO2 3 COM2 4 NO3 5 COM3 6 NO4 7 COM4 8 NO5 9 COM5 10 NO6 11 COM6 12 NO7 13 COM7 14 ( ) ARE FOR MAX4573 28 V+ 27 SDA (DOUT) 26 SCL (DIN) 25 A1 (SCLK) 24 A0 (CS) 23 GND 22 NO8 21 COM8 20 NO9 19 COM9 18 NO10 17 COM10 16 NO11 15 COM11
QSOP/SSOP/SO
I2C is a trademark of Philips Corp. SPI/QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Note 1: Signals on NO_ _ or COM_ exceeding V+ or V- are clamped by internal diodes. Limit forward-diode current to maximum current rating.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
On-Resistance
On-Resistance Match Between Channels (Note 4) On-Resistance Flatness (Note 5) NO_ _ Off-Leakage Current (Note 6) COM_ Off-Leakage Current (Note 6) COM _ On-Leakage Current (Note 6) AUDIO PERFORMANCE Total Harmonic Distortion plus Noise Off-Isolation (Note 7) Channel-to-Channel Crosstalk
RON
RFLAT
INO_ _ (OFF)
ICOM_ (OFF)
ICOM_ (ON)
fIN = 1kHz, RL = 600, VNO_ _ = 1VRMS, VNO_ _ = 2.5V VNO_ _ = 1VRMS, fIN = 20kHz, RL = 600, Figure 1 VNO_ _ = 1VRMS, fIN = 20kHz, RS = 600, Figure 1
% dB dB
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MAX4571MAX4574
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Notes 8 and 12, Figure 2) 200 500 ns 700 300 ns 400 ns Turn-On Time tONSD
Turn-Off Time
tOFFSD
Break-Before-Make Time
tBBM
MAX4572/MAX4574, VNO_ _ = 1.5V, TA = TMIN to TMAX VNO_ _ = 1.5V, RL = 5k, CL = 35pF, TA = +25C VNO_ _ or = 1.5V, RL = 300, CL = 35pF, TA = +25C TA = TMIN to TMAX All logic inputs = 0 or V+, TA = TMIN to TMAX
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Note 8, Figure 2) Turn-On Time Turn-Off Time POWER SUPPLY Supply Voltage Range Supply Current (Note 9) V+ I+ +2.7 6 +5.25 10 V A tONSE tOFFSE 8 3 ms ms
On-Resistance
RON
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INO_ _ (OFF)
VNO_ _ = 3V, 0.5V; ICOM_ (OFF) VCOM_ = 0.5V, 3V; V+ = 3.6V VCOM_ = 3V, 0.5V; VNO_ _ = 3V, 0.5V, or floating; V+ = 3.6V
COM _ On-Leakage Current (Notes 6 and 10) AUDIO PERFORMANCE Total Harmonic Distortion plus Noise Off-Isolation (Note 7) Channel-to-Channel Crosstalk VIDEO PERFORMANCE Off-Isolation (Note 7) Channel-to-Channel Crosstalk -3dB Bandwidth Off Capacitance
ICOM_ (ON)
fIN = 1kHz, RL = 600, VNO_ = 0.5VRMS, VNO_ _ = 1.5V VNO_ _ = 0.5VRMS, fIN = 20kHz, RL = 600, Figure 1 VNO_ _ = 0.5VRMS, fIN = 20kHz, RS = 600, Figure 1
% dB dB
VNO_ _ = 0.5VRMS, fIN = 10MHz, RL = 50, Figure 1 VNO_ _ = 0.5VRMS, fIN = 10MHz, RS = 50, Figure 1 RSOURCE = 50, RL = 50, CL = 35pF fIN = 1MHz VNO_ _ = 1.5V, RL = 5k, CL = 35pF TA = +25C TA = TMIN to TMAX
-50 -52 >150 9 300 100 10 200 900 1000 300 400
dB dB MHz pF
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Notes 8 and 12, Figure 2) Turn-On Time Turn-Off Time Break-Before-Make Time tONSD tOFFSD tBBM ns ns ns
TA = +25C VNO_ _ = 1.5V, RL = 300, CL = 35pF TA = TMIN to TMAX VNO_ _ = 1.5V, TA = TMIN to TMAX VNO_ _ = 1.5V, RL = 5k, CL = 35pF, TA = +25C VNO_ _ = 1.5V, RL = 300, CL = 35pF, TA = +25C
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Notes 8 and 12, Figure 2) Turn-On Time Turn-Off Time tONSE tOFFSE 8 3 ms ms
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MAX4571MAX4574
2-WIRE INTERFACE TIMING (Figure 3) SCL Clock Frequency Bus Free Time between Stop and Start Condition START Condition Hold Time STOP Condition Setup Time Data Hold Time Data Setup Time Clock Low Period Clock High Period SCL/SDA Rise Time SCL/SDA Fall Time 3-WIRE TIMING (Figure 5) Operating Frequency DIN to SCLK Setup DIN to SCLK Hold SCLK Fall to Output Data Valid CS to SCLK Rise Setup CS to SCLK Rise Hold CS High Pulse Width SCLK Pulse Width Low SCLK Pulse Width High Rise Time (SCLK, DIN, CS) Fall Time (SCLK, DIN, CS) fOP tDS tDH tDO tCSS tCSH tCSW tCL tCH tR tF 2.1 MHz ns ns ns ns ns ns ns ns s s fSCL tBUF tHD:STA tSU:STO tHD:DAT tSU:DAT tLOW tHIGH tR tF kHz s s s s ns s s ns ns
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32 30 ON-RESISTANCE () 28 26 24 22 TA = +25C
100
TA = +85C TA = +70C
10 CURRENT (nA)
20 18 0 1
NO_ _ ON 60 80
VCOM (V)
TEMPERATURE (C)
3 2 1
600 500 400 TIME (ns) 300 200 tOFF, V+ = 3V 100 tOFF, V+ = 5V 0 tON, V+ = 3V tON, V+ = 5V
Q (pC)
0 -1 -2 -3 0 1 2 3 4 5 VCOM (V)
-40
-20
20
40
60
80
TEMPERATURE (C)
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MAX4571MAX4574
THD + N (%)
0.1
LOSS (dB)
-40
-60
-100
CS 5V/div
1V/div
tOFF
TIME (2ms/div)
TIME (50ns/div)
AMPLITUDE (500mV/div)
AMPLITUDE (500mV/div)
TIME (500s/div)
TIME (500s/div)
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Normally Open Terminals Normally Open Terminals Normally Open Terminals Normally Open Terminals Normally Open Terminals
Common Terminals Ground LSB + 1 of 2-Wire Serial Interface Address Field LSB + 2 of 2-Wire Serial Interface Address Field Clock Input of 2-Wire Serial Interface Data Input of 2-Wire Serial Interface Positive Supply Voltage
PIN MAX4573 1, 3, 5, 7, 9, 11, 13, 22, 20, 18, 16 2, 4, 6, 8, 10, 12, 14, 21, 19, 17, 15 23 24 25 26 27 28 MAX4574 1, 4, 7, 10 3, 6, 9, 12 13, 16 22, 19, 20, 17 2, 5, 8, 11, 14, 21, 18, 15 23 24 25 26 27 28 MAX4573
NAME MAX4574 NO1ANO4A NO1BNO4B NO5, NO8 NO6A, NO7A, NO6B, NO7B COM1COM8 GND CS SCLK DIN DOUT V+
FUNCTION
NO1NO11
Normally Open Terminals Normally Open Terminals Normally Open Terminals Normally Open Terminals Normally Open Terminals
Common Terminals Ground Chip Select of 3-Wire Serial Interface Clock Input of 3-Wire Serial Interface Clock Input of 3-Wire Serial Interface Data Output of 3-Wire Serial Interface Positive Supply Voltage
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10nF
V+
10nF
V+
COM_V+
V+ COM1
N.C.
a) Off-Isolation
b) Crosstalk
3V
SCL 0 VOUT V+ 2-Wire 0 VOUT VOUT RL 300 DECODER/ CONTROLLER SERIAL INTERFACE GND 3-Wire 0 CL 35pF 3V CS 0 VOUT 0
V+ NO NO_ _ COM_
2 OR 3 P
50%
CL INCLUDES FIXTURE AND STRAY CAPACITANCE VOUT = VCOM [RL / (RL + RON)]
Applications Information
Switch Control
The MAX4571MAX4574 have a common command and control-bit structure, the differences being only in the interface type (2-wire or 3-wire) and in the switch configurations. The SWITCHSET command controls the open/closed states of the various switches. MODESET controls soft/hard-mode states of the switches. There are also NO_OP and RESET commands. The NO_OP command is useful for daisy-chaining multiple 3-wire parts. The RESET command places a device in a state identical to its power-up state, with all switches open and in soft switching mode. Table 1 shows the configuration of the command bits and their related commands. Table 2 shows the configSendByte and WriteWord are trademarks of Philips Corp.
10
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MAX4571MAX4574
X = Dont care
communicating with the slave, it issues a stop condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission.
Figures 5 and 6 and the I/O Interface Characteristics show the timing details of the 3-wire interface. If the two command bits initiate a SWITCHSET command, a logic 1 in a switch control location closes the associated switch, while a logic 0 opens it. If the command bits initiate a MODESET command, a logic 1 in a switch control location sets the associated switch into hard mode, while a logic 0 sets it into soft, clickless mode. For command-bit configurations, see Table 1.
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SWITCHSET Command
Address Byte MSB S R T 0 1 1 0 1 A 1 A 0 LSB 0 A C K Command Byte (SWITCHSET) MSB 1 1 X X X X X LSB X A C K
MAX4571
First Data Byte MSB X X X X X SW 11 SW 10 LSB SW 9 A C K MSB SW 8 SW 7 SW 6 SW 5 SW 4 SW 3 SW 2 Second Data Byte LSB SW 1 A C K S T P
MAX4572
First Data Byte MSB X X SW 8 SW 5 SW 7B SW 7A SW 6B LSB SW 6A A C K MSB SW 4B SW 4A SW 3B SW 3A SW 2B SW 2A SW 1B Second Data Byte LSB SW 1A A C K S T P
MODESET Command
Address Byte MSB S R T 0 1 1 0 1 A 1 A 0 0 A C K Command Byte (MODESET) MSB 0 1 X X X X X LSB X A C K
MAX4571
First Data Byte MSB X X X X X SW 11 SW 10 LSB SW 9 A C K MSB SW 8 SW 7 SW 6 SW 5 SW 4 SW 3 SW 2 Second Data Byte LSB SW 1 A C K S T P
MAX4572
First Data Byte MSB X X SW 8 SW 5 SW 7B SW 7A SW 6B LSB SW 6A A C K MSB SW 4B SW 4A SW 3B SW 3A SW 2B SW 2A SW 1B Second Data Byte LSB SW 1A A C K S T P
STP = Stop Condition Logic "0" in any data bit location places the associated switch open or in soft (clickless) switching mode. Logic "1" in any data bit location places the associated switch closed or in hard switching mode. For command bit configuration see Table 1.
12
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MAX4571MAX4574
MAX4574 (6 SPDT + 2 SPST) MSB COMMAND D15 C1 D14 C0 D13 SW8 D12 SW5 D11 SW7B D10 D9 D8 SWITCH CONTROL D7 D6 D5 D4 D3 D2 D1 D0 SW7A SW6B SW6A SW4B SW4A SW3B SW3A SW2B SW2A SW1B SW1A LSB
SDA
70% 20%
70% 20%
tHD, DAT 70% 20% tHIGH tR tF REPEATED START CONDITION 70% 20% 70% 70%
70% 20%
70%
START CONDITION
STOP CONDITION
START CONDITION
ADDRESS BYTE SDA MSB SCL START CONDITION LSB ACK MSB
COMMAND BYTE
LSB
ACK
MSB
LSB
ACK
MSB
LSB ACK
STOP CONDITION
CS
20% tCSS tCL 20% tDH tDS 20% tCH 20% 20% 70% 70%
20% tCSH
tCSW
SCLK
20%
DIN
D15
D14
D1 tDO
D0
DOUT
CS COMMAND EXECUTED 1 DIN D15 D14 D13.... MSB DOUT Q15........ MSB FROM PREVIOUS WRITE .........00 LSB FROM PREVIOUS WRITE D2 D1 D0.... LSB 8 9 16
SCLK
14
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___________________Chip Information
TRANSISTOR COUNT: 5397
MAX4571MAX4574
MAX4572/MAX4574
NO1A 1 COM1 2 NO1B 3 NO2A 4 COM2 5 NO2B 6 NO3A 7 COM3 8 NO3B 9 NO4A 10 COM4 11 NO4B 12 NO5 13 COM5 14 28 V+ 27 SDA (DOUT) 26 SCL (DIN) 25 A1 (SCLK) 24 A0 (CS) 23 GND 22 NO6A 21 COM6 20 NO6B 19 NO7A 18 COM7 17 NO7B 16 NO8 15 COM8
QSOP/SSOP/SO
( ) ARE FOR MAX4574
Package Information
QSOP.EPS
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15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
SOICW.EPS