UNIT -2 MICROPROCESSOR 8086

ADDRESSING MODES OF 8086 Addressing mode indicates a way of locating data or operands. Depending upon the data types used in the instruction and the memory addressing modes, any instruction may belong to one or more addressing modes or some instruction may not belong to any of the addressing modes. Thus the addressing modes describe the types of operands and the way they are accessed for executing an instruction. Here, we will present the addressing modes of the instructions depending upon their types. According to the flow of instruction execution, the instructions may be categorized as (i) Sequential control flow instructions and (ii) Control transfer instructions. Sequential control flow instructions are the instructions, which after execution, transfer control to the next instruction appearing immediately after it (in the sequence) in the program. For example, the arithmetic, logical, data transfer and processor control instructions are sequential control flow instructions. The control transfer instructions, on the other hand, transfer control to some predefined address somehow specified in the instruction after their execution. For example, INT, CALL, RET and JUMP instructions fall under this category. The addressing modes for sequential control transfer instructions are explained as follows:

1. Immediate Addressing Mode:

In this type of addressing, immediate data is a part of instruction, and appears in the form of successive byte or bytes. Example: MOV AX, 0005H In the above example, 0005H is the immediate data. The immediate data may be 8bit or 16-bit in size.

2. Direct Addressing Mode:

In the direct addressing mode, a 16-bit memory address (offset) is directly specified in the instruction as a part of it. Example: MOV AX, [5000H] Here, data resides in a memory location in the data segment, whose effective address may be computed using 5000H as the offset address and content of DS as segment address. The physical address, here, is 10H*DS+5000H.

3. Register Addressing Mode:

In register addressing mode, the data is stored in a register and it is referred using the particular register. All the registers, except IP, may be used in this mode.

Example: MOV BX, AX. Which moves 16 bit content of AX into BX

4. Register Indirect Addressing Mode: Sometimes, the address of the memory location, which contains data or operand, is determined in an indirect way, using the offset registers. This mode of addressing is known as register indirect mode. In this addressing mode, the offset address of data is in either BX or SI or DI registers. The default segment is either DS or ES. The data is supposed to be available at the address pointed to by the content of any of the above registers in the default data segment. Example: MOV AX, [BX] Here, data is present in a memory location in DS whose offset address is in BX. The Physical address of the data is given as 10H*DS+ [BX].

5. Indexed Addressing Mode:

In this addressing mode, offset of the operand is stored in one of the index registers. DS and ES are the default segments for index registers SI and DI respectively. This mode is a special case of the above discussed register indirect addressing mode. Example: MOV AX, [SI] Here, data is available at an offset address stored in SI in DS. The Physical address, in this case, is computed as 10H*DS+ [SI].

6. Register Relative Addressing Mode:

In this addressing mode, the data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX, BP, SI and DI in the default (either DS or ES) segment. The example given before explains this mode. Example: MOV Ax, 50H [BX] Here, physical address is given as 10H*DS+50H+ [BX].

7. Based Indexed Addressing Mode:

The effective address of data is formed, in this addressing mode, by adding content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI). The default segment register may be ES or DS. Example: MOV AX, [BX] [SI] Here, BX is the base register and SI is the index register. The physical address is computed as 10H*DS+ [BX] + [SI].

8. Relative Based Indexed Addressing Mode:

The effective address is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases registers (BX or BP) and any one of the index registers, in a default segment. 2

Example: MOV AX, 50H [BX] [SI] Here, 50H is an immediate displacement, BX is a base register and SI is an index register. The physical address of data is computed as 10H*DS+ [BX] + [SI] + 50H. For the control transfer instructions, the addressing modes depend upon whether the destination location is within the same segment or a different one. It also depends upon the method of passing the destination address to the processor. Basically, there are two addressing modes for the control transfer instructions, viz. inter-segment and intra-segment addressing modes. If the location to which the control is to be transferred lies in a different segment other than the current one, the mode is called inter-segment mode. If the destination location lies in the same segment, the mode is called intra-segment.

Inter-segment Direct Inter-segment Inter-segment Indirect Modes for control Transfer instructions

Inter-segment
Intra-segment

Intra-segment Direct

Intra-segment Indirect

Intra-segment Indirect

Fig: Addressing Modes for Control Transfer Instruction 9. Intra-segment direct mode: In this mode, the address to which the control is to be transferred lies in the same segment in which the control transfers instruction lies and appears directly in the instruction as an immediate displacement value. In this addressing mode, the displacement is computed relative to the content of the instruction pointer IP.

The effective address to which the control will be transferred is given by the sum of 8 or 16 bit displacement and current content of IP. In case of jump instruction, if the signed displacement (d) is of 8 bits (i.e. 128<d<+128), we term it as short jump and if it is of 16 bits (i.e. 32768<+32768), it is termed as long jump. Ex: JMP SHORT LAVEL; Label lies within128 to +128 from the current IP content 10. Intra-segment Indirect Mode: In this mode, the displacement to which the control is to be transferred, is in the same segment in which the control transfer instruction lies, but it is passed to the instruction indirectly. Here, the branch address is found as the content of a register or a memory location. This addressing mode may be used in unconditional branch instructions. Ex: JMP [BX]: jump to effective address stored in BX. 11. Inter-segment Direct Mode: In this mode, the address to which the control is to be transferred is in a different segment. This addressing mode provides a means of branching from one code segment to another code segment. Here, the CS and IP of the destination address are specified directly in the instruction. Ex : JMP 5000H : 2000H; Jump to effective address 2000H in segment 5000H. 12. Inter-segment Indirect Mode: In this mode, the address to which the control is to be transferred lies in a different segment and it is passed to the instruction indirectly, i.e. contents of a memory block containing four bytes, i.e. IP (LSB), IP (MSB), CS (LSB) and CS (MSB) sequentially. The starting address of the memory block may be referred using any of the addressing modes, except immediate mode. Ex: JMP [2000H]; Jump to an address in other segment specified at effective address 2000H in DS, that point to memory block as said above.

Instruction Set
8086 Instruction Set Summary The following is a brief summary of the 8086 instruction set: 1) Data copy/transfer Instructions a) Memory/Register Transfers LDS Load pointer using data segment LES Load pointer using extra segment MOV Move byte or word to register or memory XCHG Exchange byte or word XLAT Translate byte using look-up table b) Stack Transfers PUSH Push data onto stack PUSHF Push flags onto stack POP Pop data onto stack POPF Pop flags off stack c) AH/Flags Transfers LAHF Load AH from flags SAHF Store AH into flags d) Address Transfer LEA Load effective address e )Port I/O Instructions IN Input byte or word from port OUT Output word to port 2) Arithmetic Instructions a) Addition ADD AAA INC b) Subtraction SUB AAS DEC c) Multiplication MUL IMUL AAM d) Division DIV IDIV AAD

Add byte or word ASCII adjust for addition Increment byte or word Subtract byte or word ASCII adjust for subtraction Decrement byte or word Multiply byte or word (unsigned) Integer multiply byte or word (signed) ASCII adjust for multiplication Divide byte or word (unsigned) Integer divide byte or word (signed) ASCII adjust for division

e) Conversion CBW CWB 3) Logical Instructions AND OR NOT XOR TEST

Convert byte to word Convert word to byte Logical AND of byte or word Logical OR of byte or word Logical NOT of byte or word (one's complement) Boolean exclusive OR Test byte or word (AND without storing)

4) Shift & Rotate Instructions SAL Arithmetic shift left byte or word by 1 or CL SAR Arithmetic shift right byte or word by 1 or CL SHL Logical shift left byte or word by 1 or CL SHR Logical shift right byte or word by 1 or CL RCL Rotate left through carry byte or word by 1 or CL RCR Rotate right through carry byte or word by 1 or CL ROL Rotate left byte or word by 1 or CL ROR Rotate right byte or word by 1 or CL 5) String Instructions CMPSB CMPSW LODSB LODSW MOVSB MOVSW SCASB SCASW STOSB STOSW Repeat Prefixes REP REPE REPNE REPNZ REPZ Compare string of bytes Compare string of words Load string of bytes Load string of words Move string of bytes Move string of words Scan string of bytes Scan string of words Store string of bytes Store string of words Repeat Repeat while equal Repeat while not equal Repeat while not zero Repeat while zero

6) Control Transfer Instructions a) Unconditional Transfers CALL Call for procedure RET Return from procedure JMP Unconditional jump INT Software interrupt IRET Return from interrupt b) Conditional Transfers JA (JNBE) Jump if above (not below or equal) JAE (JNB) Jump if above or equal (not below) JB (JNAE) Jump if below (not above or equal) JBE (JNA) Jump if below or equal (not above) JE (JZ) Jump if equal (zero) JG (JNLE) Jump if greater (not less or equal) JGE (JNL) Jump if greater or equal (not less) JL (JNGE) Jump if less (not greater nor equal) JLE (JNG) Jump if less or equal (not greater) JCXZ Jump if CX equals zero LOOP Loop unconditional, count in CX LOOPE Loop if equal (zero), count in CX LOOPNE Loop if not equal (not zero), count in CX 7) Flag Control Instructions CLC Clear Carry Flag CMC Compliment Carry Flag STC Set Carry Flag CLD Clear Direction Flag STD Set Direction Flag CLI Clear Interrupt Enable Flag STI Set Interrupt Enable Flag 8) Machine Control Instructions HLT Halt processor LOCK Lock bus during next instruction NOP No operation (do nothing) WAIT Wait for signal on TEST input ESC Escape to external processor interface

Discussion on Instruction Set The 8086 has approximate 117 different instructions with about 300 OP codes. It is not possible to describe all instruction in details. So here, we will describe the instructions that we frequently use in normal assembly programming. 1) Data Copy/transfer Instructions These instructions provide convenient methods for moving bytes, words, or double words of data between memory and the registers of the base architecture.

MOV Instruction - MOV destination, source

The MOV instruction copies a word or a byte of data from a specified source to a specified destination . MOV op1, op2 Example: MOV CX, 037AH MOV AX, BX MOV DL,[BX] of byte in DS.

; MOV 037AH into the CX. ;Copy the contents of register BX to AX ;Copy byte from memory at BX to DL , BX contains the offset

PUSH Instruction - PUSH source

PUSH instruction decrements the stack pointer by 2 and copies a word from a specified source to the location in the stack segment where the stack pointer pointes. Example: PUSH BX PUSH DS PUSH TABLE[BX] ;Decrement SP by 2 and copy BX to stack ;Decrement SP by 2 and copy DS to stack ;Decrement SP by 2 and copy word from memory in DS at EA =

TABLE + [BX] to stack .

POP Instruction - POP destination

POP instruction copies the word at the current top of the stack to the operand specified by op then increments the stack pointer to point to the next stack.

Example: POP DX POP DS POP TABLE [BX] + [BX].

;Copy a word from top of the stack to DX and increments SP by 2. ; Copy a word from top of the stack to DS and increments SP by 2. ;Copy a word from top of stack to memory in DS with EA = TABLE

XCHG Instruction - Exchange XCHG destination, source

The Exchange instruction exchanges the contents of the register with the contents of another register (or) the contents of the register with the contents of the memory location. Direct memory to memory exchange are not supported. Syntax: XCHG op1, op2 - The both operands must be the same size and one of the operand must always be a register . Example: XCHG AX, DX XCHG BL, CH XCHG AL, Money [BX]

;Exchange word in AX with word in DX ;Exchange byte in BL with byte in CH ;Exchange byte in AL with byte in memory at EA.

XLAT/XLATB Instruction - Translate a byte in AL

XLAT exchanges the byte in AL register from the user table index to the table entry, addressed by BX. It transfers 16 bit information at a time. The no-operands form (XLATB) provides a "short form" of the XLAT instructions. Example: MOV AL, [BX+AL]

IN Instruction - Copy data from a port IN accumulator, port

This IN instruction will copy data from a port to the AL or AX register. For the Fixed port IN instruction type the 8 bit port address of a port is specified directly in the instruction. Example:

IN AL,0C8H IN AX, 34H A_TO_D EQU 4AH IN AX, A_TO_D

;Input a byte from port 0C8H to AL ;Input a word from port 34H to AX ;Input a word from port 4AH to AX

For a variable port IN instruction, the port address is loaded in DX register before IN instruction. DX is 16 bit. Port address range from 0000H FFFFH.

Example: MOV DX, 0FF78H IN AL, DX IN AX, DX

;Initialize DX point to port ;Input a byte from a 8 bit port 0FF78H to AL ;Input a word from 16 bit port to 0FF78H to AX.

OUT Instruction - Output a byte or word to a port OUT port, accumulator AL or AX.

The OUT instruction copies a byte from AL or a word from AX or a double from the accumulator to I/O port specified by op. Two forms of OUT instruction are available : (a) Port number is specified by an immediate byte constant, ( 0 - 255 ).It is also called as fixed port form. (b) Port number is provided in the DX register ( 0 65535 ) Example: (a) OUT 3BH, AL OUT 2CH,AX Example: (b) MOV DX, 0FFF8H OUT DX, AL OUT DX, AX

;Copy the contents of the AL to port 3Bh ;Copy the contents of the AX to port 2Ch

;Load desired port address in DX ; Copy the contents of AL to FFF8h ;Copy content of AX to port FFF8H

LEA Instruction - Load Effective Address

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LEA Instruction - This instruction indicates the offset of the variable or memory location named as the source and put this offset in the indicated 16 bit register. Syntax LEA register, source Example: LEA BX, PRICE LEA BP, SS:STAK LEA CX, [BX][DI]

;Load BX with offset of PRICE in DS ;Load BP with offset of STACK in SS ;Load CX with EA=BX + DI

LDS Instruction - Load register and Ds with words from memory

LDS Instruction - This instruction loads a far pointer from the memory address specified by op2 into the DS segment register and the op1 to the register. Syntax LDS register, memory address of first word or LDS op1, op2 Example: LDS BX, [4326] register.

; copy the contents of the memory at displacement 4326H in DS to

BL, contents of the 4327H to BH. Copy contents of 4328H and 4329H in DS to DS

LES Instruction - Load register and ES with words from memory

This instruction loads a 32- bit pointer from the memory address specified to destination register and Extra Segment. The offset is placed in the destination register and the segment is placed in Extra Segment. Using this instruction, the loading of far pointers may be simplified. Syntax LES register, memory address of first word

LAHF Instruction - Load Register AH From Flags

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LAHF instruction copies the value of SF, ZF, AF, PF, and CF, into bits of 7, 6, 4, 2, 0 respectively of AH register. This LAHF instruction was provided to make conversion of assembly language programs written for 8080 and 8085 to 8086 easier.

SAHF instruction - Store AH Register into FLAGS

SAHF instruction transfers the bits 0-7 of AH of SF, ZF, AF, PF, and CF, into the Flag register.

PUSHF Instruction - Push flag register on the stack

This instruction decrements the SP by 2 and copies the word in flag register to the memory location pointed to by SP.

POPF Instruction - Pop word from top of stack to flag - register.

This instruction copies a word from the two memory location at the top of the stack to flag register and increments the stack pointer by 2. 2) Arithmetic Instructions ADD Instruction - ADD destination, source These instructions add a number from source to a number from some destination and put the result in the specified destination. The source and destination must be of same type , means they must be a byte location or a word location. If you want to add a byte to a word, you must copy the byte to a word location and fill the upper byte of the word with zeroes before adding.

ADC Instruction - Add with carry

After performing the addition, the add with carry instruction ADC, adds the status of the carry flag into the result. EXAMPLE:

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ADD AL,74H ADC CL,BL CL ADD DX, BX ADD DX, [SI] ADD CL, BL

;Add immediate number 74H to content of AL ;Add contents of BL plus carry status to contents of CL Results in ;Add contents of BX to contents of DX ;Add word from memory at offset [SI] in DS to contents of DX ; Addition of Un Signed numbers ;CL = 01110011 =115 decimal + BL = 01001111 = 79 decimal ; Addition of Signed numbers

Result in CL = 11000010 = 194 decimal ADD CL, BL ;CL = 01110011 = + 115 decimal + BL = 01001111 = +79 decimal ; Incorrect because result is too large to fit in 7 bits.

Result in CL = 11000010 = - 62 decimal

INC Instruction - Increment - INC destination

INC instruction adds one to the operand and sets the flag according to the result. INC instruction is treated as an unsigned binary number. Example: ; AX = 7FFFh INC AX INC BL INC CL

;After this instruction AX = 8000h ; Add 1 to the contents of BL register ; Add 1 to the contents of CX register.

AAA Instruction - ASCII Adjust after Addition

AAA converts the result of the addition of two valid unpacked BCD digits to a valid 2-digit BCD number and takes the AL register as its implicit operand. Two operands of the addition must have its lower 4 bits contain a number in the range from 0-9.The AAA instruction then adjust AL so that it contains a correct BCD digit. If the addition produce carry (AF=1), the AH register is incremented and the carry CF and auxiliary carry AF flags are set to 1. If the addition did not produce a decimal carry, CF and AF are cleared to 0 and AH is not altered. In both cases the higher 4 bits of AL are cleared to 0. 13

AAA will adjust the result of the two ASCII characters that were in the range from 30h (0) to 39h(9).This is because the lower 4 bits of those character fall in the range of 09.The result of addition is not a ASCII character but it is a BCD digit. Example: MOV AH,0 MOV AL,6 ADD AL,5 AAA

;Clear AH for MSD ;BCD 6 in AL ;Add BCD 5 to digit in AL ;AH=1, AL=1 representing BCD 11.

DAA Instruction - Decimal Adjust after Addition

The contents after addition are changed from a binary value to two 4-bit binary coded decimal (BCD) digits. S, Z, AC, P, CY flags are altered to reflect the results of the operation. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example: MOV AL, 0Fh DAA RET

; AL = 0Fh (15) ; AL = 15h

ADD Instruction - ADD destination, source

These instructions add a number from source to a number from some destination and put the result in the specified destination. The source and destination must be of same type , means they must be a byte location or a word location. If you want to add a byte to a word, you must copy the byte to a word location and fill the upper byte of the word with zeroes before adding.

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ADC Instruction - Add with carry

After performing the addition, the add with carry instruction ADC, adds the status of the carry flag into the result. EXAMPLE: ADD AL,74H ADC CL,BL CL ADD DX, BX ADD DX, [SI] ADD CL, BL ;Add contents of BX to contents of DX ;Add word from memory at offset [SI] in DS to contents of DX ; Addition of Un Signed numbers ;CL = 01110011 =115 decimal + BL = 01001111 = 79 decimal ; Addition of Signed numbers ADD CL, BL ;CL = 01110011 = + 115 decimal + BL = 01001111 = +79 decimal ; Incorrect because result is too large to fit in 7 bits.

;Add immediate number 74H to content of AL ;Add contents of BL plus carry status to contents of CL Results in

Result in CL = 11000010 = 194 decimal

Result in CL = 11000010 = - 62 decimal

INC Instruction - Increment - INC destination

INC instruction adds one to the operand and sets the flag according to the result. INC instruction is treated as an unsigned binary number. Example: ; AX = 7FFFh INC AX INC BL INC CL

;After this instruction AX = 8000h ; Add 1 to the contents of BL register ; Add 1 to the contents of CX register.

AAA Instruction - ASCII Adjust after Addition

AAA converts the result of the addition of two valid unpacked BCD digits to a valid 2-digit BCD number and takes the AL register as its implicit operand.

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Two operands of the addition must have its lower 4 bits contain a number in the range from 0-9.The AAA instruction then adjust AL so that it contains a correct BCD digit. If the addition produce carry (AF=1), the AH register is incremented and the carry CF and auxiliary carry AF flags are set to 1. If the addition did not produce a decimal carry, CF and AF are cleared to 0 and AH is not altered. In both cases the higher 4 bits of AL are cleared to 0. AAA will adjust the result of the two ASCII characters that were in the range from 30h (0) to 39h(9).This is because the lower 4 bits of those character fall in the range of 09.The result of addition is not a ASCII character but it is a BCD digit. Example: MOV AH,0 MOV AL,6 ADD AL,5 AAA

;Clear AH for MSD ;BCD 6 in AL ;Add BCD 5 to digit in AL ;AH=1, AL=1 representing BCD 11.

DAA Instruction - Decimal Adjust after Addition

The contents after addition are changed from a binary value to two 4-bit binary coded decimal (BCD) digits. S, Z, AC, P, CY flags are altered to reflect the results of the operation. If the value of the low-order 4-bits in the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the low-order four bits. If the value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag is set, the instruction adds 6 to the high-order four bits. Example: MOV AL, 0Fh DAA RET SUB Instruction - Subtract two numbers ; AL = 0Fh (15) ; AL = 15h

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These instructions subtract the source number from destination number destination and put the result in the specified destination. The source and destination must be of same type , means they must be a byte location or a word location.

SBB Instruction - Subtract with borrow SBB destination, source

SBB instruction subtracts source from destination, and then subtracts 1 from source if CF flag is set and result is stored destination and it is used to set the flag. ie.,destination = destination -(source + CF) Example: SUB CX, BX SUBB CH, AL of CH . ;Result in CH SUBB AX, 3427H Example: - Subtracting unsigned number ; CL = 10011100 = 156 decimal BH = 00110111 = 55 decimal SUB CL, BH PF = 1 - Subtracting signed number ; CL = 00101110 = + 46 decimal BH = 01001010= + 74 decimal SUB CL, BH result negative

;CX BX . Result in CX ; Subtract contents of AL and contents CF from contents

;Subtract immediate number from AX

; CL = 01100101 = 101 decimal CF, AF, SF, ZF = 0, OF,

;CL = 11100100 = - 28 decimal,CF = 1, AF, ZF =0,SF = 1

DEC Instruction - Decrement destination register or memory DEC destination.

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DEC instruction subtracts one from the operand and sets the flag according to the result. DEC instruction is treated as an unsigned binary number. Example: ; AX =8000h DEC AX DEC BL

;After this instruction AX = 7999h ; Subtract 1 from the contents of BL register

NEG Instruction - From 2s complement NEG destination

NEG performs the twos complement subtraction of the operand from zero and sets the flags according to the result. ;AX = 2CBh NEG AX Example: NEG AL NEG BX NEG BYTE PTR[BX]

;after executing NEG result AX =FD35h.

;Replace number in AL with its 2s complement ;Replace word in BX with its 2s complement ; Replace byte at offset BX in DS with its 2s complement

CMP Instruction - Compare byte or word -CMP destination, source.

The CMP instruction compares the destination and source ie.,it subtracts the source from destination.The result is not stored anywhere. It neglects the results, but sets the flags accordingly.This instruction is usually used before a conditional jump instruction. Example: MOV AL, 5 MOV BL, 5 CMP AL, BL RET ; AL = 5, ZF = 1 (so equal!)

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AAS Instruction - ASCII Adjust for Subtraction

AAS converts the result of the subtraction of two valid unpacked BCD digits to a single valid BCD number and takes the AL register as an implicit operand. The two operands of the subtraction must have its lower 4 bit contain number in the range from 0 to 9 .The AAS instruction then adjust AL so that it contain a correct BCD digit. MOV AX,0901H SUB AL, 9 AAS Example:( a ) ;AL =0011 1001 =ASCII 9 ;BL=0011 0101 =ASCII 5 SUB AL, BL AAS required Example:( b ) ;AL = 0011 0101 =ASCII 5 ;BL = 0011 1001 = ASCII 9 SUB AL, BL CF = 1 AAS

;BCD 91 ;Minus 9 ; Give AX =0802 h (BCD 82)

;(9 - 5) Result : ;AL = 00000100 = BCD 04,CF = 0 ;Result : AL=00000100 =BCD 04 , CF = 0 NO Borrow

;( 5 - 9 ) Result : AL = 1111 1100 = 4 in 2s complement ;Results :AL = 0000 0100 =BCD 04, CF = 1 borrow needed

DAS Instruction - Decimal Adjust after Subtraction

This instruction corrects the result (in AL) of subtraction of two packed BCD values. The flags which modify are AF, CF, PF, SF, ZF if low nibble of AL > 9 or AF = 1 then: - AL = AL 6 - AF = 1

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if AL > 9Fh or CF = 1 then: - AL = AL - 60h - CF = 1 Example: MOV AL, 0FFh DAS RET

; AL = 0FFh (-1) ; AL = 99h, CF = 1

MUL Instruction - Multiply unsigned bytes or words-MUL source

MUL Instruction - This instruction multiplies an unsigned multiplication of the accumulator by the operand specified by op. The size of op may be a register or memory operand . Syntax: MUL op Example: ;AL = 21h (33 decimal),BL = A1h(161 decimal ) MUL BL set to 1. MUL BH MUL CX

;AX =14C1h (5313 decimal) since AH0, CF and OF will ; AL times BH, result in AX ;AX times CX, result high word in DX,low word in AX.

IMUL Instruction - Multiply signed number-IMUL source

This instruction performs a signed multiplication.There are two types of syntax for this instruction. They are: IMUL op IMUL op1, op2 ;In this form the accumulator is the multiplicand and op is the ;In this form op1 is always be a register operand and op2 may

multiplier. op may be a register or a memory operand. be a register or a memory operand.

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Example: IMUL BH and result in AX . Example: ; 69 * 14 ; AL = 01000101 = 69 decimal ; BL = 00001110 = 14 decimal IMUL BL result , - 28 * 59 ; AL = 11100100 = - 28 decimal ,BL = 00001110 = 14 decimal IMUL BL result

;Signed byte in AL times multiplied by signed byte in BH

;AX = 03C6H = + 966 decimal ,MSB = 0 because positive

;AX = F98Ch = - 1652 decimal, MSB = 1 because negative

AAM Instruction - ASCII adjust after Multiplication

AAM Instruction - AAM converts the result of the multiplication of two valid unpacked BCD digits into a valid 2-digit unpacked BCD number and takes AX as an implicit operand. To give a valid result the digits that have been multiplied must be in the range of 0 9 and the result should have been placed in the AX register. Because both operands of multiply are required to be 9 or less, the result must be less than 81 and thus is completely contained in AL. AAM unpacks the result by dividing AX by 10, placing the quotient (MSD) in AH and the remainder (LSD) in AL. Example: MOV AL, 5 MOV BL, 7 MUL BL AAM

;Multiply AL by BL , result in AX ;After AAM, AX =0305h (BCD 35)

DIV Instruction - Unsigned divide-Div source

When a double word is divided by a word, the most significant word of the double word must be in DX and the least significant word of the double word must be in AX. After the 21

division AX will contain the 16 bit result (quotient ) and DX will contain a 16 bit remainder. Again , if an attempt is made to divide by zero or quotient is too large to fit in AX ( greater than FFFFH ) the 8086 will do a type of 0 interrupt . Example: DIV CX ; (Quotient) AX= (DX:AX)/CX ; (Reminder) DX=(DX:AX)%CX

For DIV the dividend must always be in AX or DX and AX, but the source of the divisor can be a register or a memory location specified by one of the 24 addressing modes. If you want to divide a byte by a byte, you must first put the dividend byte in AL and fill AH with all 0s . The SUB AH,AH instruction is a quick way to do. If you want to divide a word by a word, put the dividend word in AX and fill DX with all 0s. The SUB DX,DX instruction does this quickly. Example: ; AX = 37D7H = 14, 295 decimal and BH = 97H = 151 decimal ;AX / BH ; AX = Quotient = 5EH = 94 decimal and AH = Remainder =

DIV BH 65H = 101 decimal.

IDIV Instruction - Divide by signed byte or word IDIV source

This instruction is used to divide a signed word by a signed byte or to divide a signed double word by a signed word. If source is a byte value, AX is divided by register and the quotient is stored in AL and the remainder in AH. If source is a word value, DX:AX is divided by register,and the quotient is stored in AL and the remainder in DX. Example: IDIV BL

;Signed word in AX is divided by signed byte in BL

AAD Instruction - ASCII adjust before Division

ADD converts unpacked BCD digits in the AH and AL register into a single binary number in the AX register in preparation for a division operation. Before executing AAD, place the Most significant BCD digit in the AH register and Last significant in the AL register. When

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AAD is executed, the two BCD digits are combined into a single binary number by setting AL=(AH*10)+AL and clearing AH to 0. Example: MOV AX,0205h AAD ;The unpacked BCD number 25 ;After AAD , AH=0 and AL=19h (25).

After the division AL will then contain the unpacked BCD quotient and AH will contain the unpacked BCD remainder. Example: ;AX=0607 unpacked BCD for 67 decimal CH=09H. ;Adjust to binary before division AX=0043 = 43H =67

AAD decimal. DIV CH ;Divide AX by unpacked BCD in CH, AL = quotient = 07 unpacked BCD, AH = remainder = 04 unpacked BCD

CBW Instruction - Convert signed Byte to signed word

CBW converts the signed value in the AL register into an equivalent 16 bit signed value in the AX register by duplicating the sign bit to the left. This instruction copies the sign of a byte in AL to all the bits in AH. AH is then said to be the sign extension of AL. Example: ; AX = 00000000 10011011 = - 155 decimal ; Convert signed byte in AL to signed word in AX. ; Result in AX = 11111111 10011011 and = - 155 decimal CWD Instruction - Convert Signed Word to - Signed Double word

CBW

CWD converts the 16 bit signed value in the AX register into an equivalent 32 bit signed value in DX: AX register pair by duplicating the sign bit to the left. The CWD instruction sets all the bits in the DX register to the same sign bit of the AX register. The effect is to create a 32- bit signed result that has same integer value as the original 16 bit operand. Example: 23

Assume AX contains C435h. If the CWD instruction is executed, DX will contain FFFFh since bit 15 (MSB) of AX was 1. Both the original value of AX (C435h) and resulting value of DX : AX (FFFFC435h) represents the same signed number. Example: ;DX = 00000000 00000000 and AX = 11110000 11000111 = - 3897 decimal CWD -3897 decimal. 3)LOGICAL INSTRUCTIONS

;Convert signed word in AX to signed double word in DX:AX ;Result DX = 11111111 11111111 and AX = 11110000 11000111 =

AND Instruction - AND corresponding bits of two operands

This Performs a bitwise Logical AND of two operands. The result of the operation is stored in the op1 and used to set the flags. AND op1, op2 To perform a bitwise AND of the two operands, each bit of the result is set to 1 if and only if the corresponding bit in both of the operands is 1, otherwise the bit in the result I cleared to 0 . Example : AND BH, CL AND BX,00FFh leave lower unchanged AND CX,[SI] AND BX,00FFh ; AND word at offset [SI] in data segment with word in CX register ;Mask out upper 8 bits of BX. ;Result BX = 00000000 01011110 . Result in CX register and BX = 10110011 01011110 and CF =0 , OF = 0, PF = 0, SF = 0 ,ZF = 0.

;AND byte in CL with byte in BH ;result in BH ;AND word in BX with immediate 00FFH. Mask upper byte,

OR Instruction - Logically OR corresponding of two operands

OR Instruction - OR instruction perform the bit wise logical OR of two operands .Each bit of the result is cleared to 0 if and only if both corresponding bits in each operand are 0, other wise the bit in the result is set to 1.

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Syntax- OR destination, source. Examples : OR AH, CL OR CX,FF00h 10100101 ;Upper byte are all 1s lower bytes are unchanged. NOT Instruction - Invert each bit of operand ;CL is ORed with AH, result in AH. ;CX = 00111110 10100101 ;OR CX with immediate FF00h result in CX = 11111111

NOT perform the bitwise complement of operand and stores the result back into operand itself. SyntaxNOT destination Example : NOT BX NOT DX

;Complement contents of BX register. - DX =F038h ;after the instruction DX = 0FC7h

XOR Instruction - Exclusive XOR destination, source

XOR Instruction - XOR performs a bit wise logical XOR of the operands specified by op1 and op2. The result of the operand is stored in op1 and is used to set the flag. Syntax- XOR destination, source. Example : ( Numerical ) ; BX = 00111101 01101001 and CX = 00000000 11111111 XOR BX, CX 10010110

;Exclusive OR CX with BX and Result BX = 00111101

TEST Instruction AND operand to update flags

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TEST Instruction - This instruction ANDs the contents of a source byte or word with the contents of specified destination word. Flags are updated but neither operand is changed . TEST instruction is often used to set flags before a condition jump instruction Examples: TEST AL, BH ;AND BH with AL. no result is stored . Update PF, SF, ZF ;no result is stored, Update PF,SF Example : ;AL = 01010001 TEST Al, 80H 0 , SF = 0, ;ZF = 1 because ANDing produced is 00 4) SHIFT and ROTATE INSTRUCTIONS SAL/SHL Instruction - Shift operand bits left, put zero in LSB(s) SAL instruction shifts the bits in the operand specified by op1 to its left by the count specified in op2. As a bit is shifted out of LSB position a 0 is kept in LSB position. CF will contain MSB bit. Syntax - SAL/AHL destination, count Example: ;CF = 0, BX = 11100101 11010011 SAL BX, 1 ;Shift BX register contents by 1 bit position towards left ;CF = 1, BX = 11001011 1010011

TEST CX, 0001H ;AND CX with immediate number

;AND immediate 80H with AL to test f MSB of AL is 1 or 0 ;ZF = 1 if MSB of AL = 0 and AL = 01010001 (unchanged),PF =

SHR Instruction - Shift operand bits right, put zero in MSB

SHR instruction shifts the bits in op1 to right by the number of times specified by op2 . Example:( 1 )

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SHR BP, 1 MSB Example:( 2 ) MOV CL, 03H SHR BYTE PYR[BX] and keep 3 0s in MSB Example:( 3 )

; Shift word in BP by 1 bit position to right and 0 is kept to

;Load desired number of shifts into CL ;Shift bytes in DS at offset BX and rotate 3 bits to right

;SI = 10010011 10101101 , CF = 0 SHR SI, 1 ZF = 0

; Result: SI = 01001001 11010110 and CF = 1, OF = 1, SF = 0,

SAR Instruction - Shift operand bits right, new MAB = old MSB

SAR instruction shifts the bits in the operand specified by op1 towards right by count specified in op2.As bit is shifted out a copy of old MSB is taken in MSB. MSB position and LSB is shifted to CF. Syntax - SAR destination, count. Example: ( 1 ) ; AL = 00011101 = +29 decimal, CF = 0 SAR AL, 1 Example: ( 2 ) ;BH = 11110011 = - 13 decimal, CF = 1 SAR BH, 1 decimal, CF = 1. ROL Instruction - Rotate all bits of operand left, MSB to LSB ROL instruction rotates the bits in the operand specified by oper1 towards left by the count specified in oper2. ROL moves each bit in the operand to next higher bit position. The higher order bit is moved to lower order position. Last bit rotated is copied into carry flag. 27 ;Shifted signed byte in BH to right and BH = 11111001 = - 7 ;Shift signed byte in AL towards right ( divide by 2 ) ;AL = 00001110 = + 14 decimal, CF = 1

Syntax - ROL destination, count. Example: ( 1 ) ROL AX, 1 ROL BH, 1 Example : ( 2 ) ;BX = 01011100 11010011 and CL = 8 bits to rotate ROL BH, CL 01011100

;Word in AX is moved to left by 1 bit and MSB bit is to LSB, and ;Result: CF ,Of =1 , BH = 01011101

CF and CF =0 ,BH =10101110

;Rotate BX 8 bits towards left and CF =0, BX =11010011

ROR Instruction - Rotate all bits of operand right, LSB to MSB

ROR instruction rotates the bits in the operand oper1 to wards right by count specified in op2. The last bit rotated is copied into CF. Syntax - ROR destination, count Example:( 1 ) ROR BL, 1 ;Rotate all bits in BL towards right by 1 bit position, LSB bit is

moved to MSB and CF has last rotated bit. Example:( 2 ) ;CF =0, BX = 00111011 01110101 ROR BX, 1 ;Rotate all bits of BX of 1 bit position towards right and CF =1, BX = 10011101 10111010 Example ( 3 ) ;CF = 0, AL = 10110011, MOVE CL, 04H ROR AL, CL 00111011 ; Load CL ;Rotate all bits of AL towards right by 4 bits, CF = 0 ,AL =

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RCL Instruction - Rotate operand around to the left through CF

RCL instruction rotates the bits in the operand specified by oper1 towards left by the count specified in oper2.The operation is circular, the MSB of operand is rotated into a carry flag and the bit in the CF is rotated around into the LSB of operand. Syntax - RCL destination, source. Example(1): CLC RCL AX, 1 RCL DX, 1 ADC AX, 0 Example (2): RCL DX, 1 RCL BH, 1 MOV CL, 2 RCL AX, CL

;put 0 in CF ;save higher-order bit of AX in CF ;save higher-order bit of DX in CF ; set lower order bit if needed.

;Word in DX of 1 bit is moved to left, and MSB of word is given to ;Result : BH =01100110 CF = 1, OF = 1 because MSB changed CF ;Load CL for rotating 2 bit position ;Result: CF =0, OF undefined AX = 01111110 10100110

CF and CF to LSB CF=0, BH = 10110011 =1,AX =00011111 10101001

RCR Instruction - Rotate operand around to the right through CF

RCR Instruction - RCR instruction rotates the bits in the operand specified by operand1 towards right by the count specified in operand2. Syntax - RCR destination, count Example:(1) RCR BX, 1 ;Word in BX is rotated by 1 bit towards right and CF will contain

MSB bit and LSB contain CF bit . Example:(2)

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;CF = 1, BL = 00111000 RCR BL, 1 ;Result: BL = 10011100, CF =0 OF = 1 because MSB is changed to 1.

5) String Instructions A string is a series of the same type of data items in sequential memory locations. We can do many operations on this string directly by using the following nemonics. MOVSB This instruction copies a byte from a location in the data segment to a location in the extra segment. The offset of the source byte in the data segment must be in the SI register. The offset of the destination in the extra segment must be contained in the DI register.For multiple byte moves, the number of bytes to be moved is put in the CX register so that it can function as a counter. After a byte is moved the SI and DI is automatically incremented or decremented by 1 according to the direction flag DI. Example: to move the first two bytes of string1 to string2 , we execute the following instruction: LEA SI, String1 LEA DI, String2 CLD MOVSB MOVSB String1 H E L L O 0 1 2 3 Before MOVSB 5 6 7 8 4 String2 9

String1 After MOVSB 0 1 5 6 7 8 2 3 String2 9 4

H E L L o

H E L L O After MOVSB 0 1 2 3 4 30

H E 5 6 7 8 9

MOVSW This instruction is used to copies a word from a location in the data segment to a location in the extra segment. The offset of the source word in the data segment must be in the SI register. The offset of the destination in the extra segment must be contained in the DI register.For multiple word moves, the number of words to be moved is put in the CX register so that it can function as a counter. After a word is moved the SI and DI is automatically incremented or decremented by 2 according to the direction flag DI.

CMPSB The CMPSB instruction can be used to compare a byte in one string with a byte in another string. SI is used to hold the offset of a byte in the source string and DI is used to hold the offset of a byte in the other string. The comparison is done by subtracting the byte pointed by DI from the byte pointed by SI. The AF,CF,OF,PF,SF,and ZF are affected by the comparison. After a byte is compared the SI and DI is automatically incremented or decremented by 1 according to the direction flag DI. Example: Let String1 db ACD String db ABC The following instructions compare the first two bytes of the preceding strings: CLD LEA SI,String1 LEA DI,String2 CMPSB CMPSB

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Before CMPSB

SI A B C 0 1 2 DI A C D

String1 String2 3

4 5 After CMPSB SI A C D 1 2 DI A B C 4 5 SI A C D 2 DI A B C 4 5 0 1 0 String1 String2 3

After CMPSB String1 String2 3

CMPSW The CMPSB instruction can be used to compare a word in one string with a word in another string. SI is used to hold the offset of a word in the source string and DI is used to hold the offset of a word in the other string. The comparison is done by subtracting the word pointed by DI from the word pointed by SI. The AF,CF,OF,PF,SF,and ZF are affected by the comparison. After a word is compared the SI and DI is automatically incremented or decremented by 1 according to the direction flag DI.

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LODSB This instrucsion is used to load string byte. It moves the byte addressed by DI:SI into AL. SI is then incremented if DF=0 or decremented if DF=1. The LODSB instruction has no effect on the flags. The word form is: LODSB Example: The follwing code loads the first and second bytes of String1 into AL LEA SI,String1 CLD LODSB LODSB SI A B C 0 1 Here, AL contains nothing After LODSB SI A B C 1 2 Here AL contains A After LODSB SI A B C 1 2 String1 0 2

Before LODSB String1

String1

0 Here AL contains B

LODSW This instruction is used to load string words. It moves the word addressed by DI:SI into AL. SI is then incremented if DF=0 or decremented if DF=1. The LODSW instruction has no effect on the flags. The word form is: LODSW

SCASB This instruction scans string byte. It can be used to examine a string for a target byte. The target is contained in AL. SCASB subtracts the string byte pointed by ES:DI from the content of AL and uses the result to set the flags. The result is not stored.

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Afterward, DI is incremented if DF =0 or decremented if DF=1. All the status flags are affected by SCASB. The word form is: SCASB Example: Let, String db ABC The following instructions examine the first two bytes of String1, looking for B LEA SI,String1 CLD MOV AL,B SCASB SCASB DI A B C 0 Here, AL contains B After SCASB 1 DI A B C 1 2 Here AL contains B After LODSB DI A B C 1 2 String1 0 2 Before SCASB String1

String1

0 Here AL contains B

SCASW This instruction scan string word. It can be used to examine a string for a target byte. The target is contained in AX. SCASW subtracts the string word pointed by ES:DI from the content of AX and uses the result to set the flags. The result is not stored. Afterward, DI is incremented by 2 if DF =0 or decremented if DF=1. All the status flags are affected by SCASW. The word form is: SCASW

STOSB This instruction stores string byte. It moves the contents of the AL register to the byte addressed by ES:DI. DI is automatically incremented or decremented. If DF=0 then it is incremented and if DF=1 then decremented. STOSB has no effect on the flags.The word form is: STOSB 34

STOSW This instruction stores string word. It moves the contents of the AX register to the word addressed by ES:DI. DI is automatically incremented or decremented by 2. If DF=0 then it is incremented and if DF=1 then decremented. STOSB has no effect on the flags.The word form is: STOSW Repeat Prefixes

REP REP is a prefix which is written before one of the string instructions. It will cause the CX register to be decremented and the string instruction to be repeated until CX=0. The instruction REP MOVSB, for example, will continue to copy string bytes until the number of bytes loaded into CX has been copied.

REPE/REPZ REPE and REPZ are two mnemonics for the same prefix. They stand for Repeat if Equal and Repeat if Zero, respectively. REPE and REPZ is often used with the Compare String instruction or with the scan String instruction. These will cause the string instruction to be repeated as long as the compare bytes or words are equal (ZF=1) and CX is not yet counted down to zero. Example: REPE CMPSB compare string bytes until end of string or until string byte not equal.

REPNE/REPNZ REPNE and REPNZ are also two mnemonics for the same prefix. They stand for Repeat if Not Equal and Repeat if Not Zero, respectively. These are often used with the Scan String instruction. REPNE or REPNZ will cause the string instruction to be repeated until the compared bytes or words are equal(ZF=1) or until CX=0(end of string). Example: REPNE SCASW scan a string of words until a word in the string matches the word in AX or until all of the string has been scaned.

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6) Control Transfer Instructions The 8086 provides both conditional and unconditional control transfer instructions to direct the flow of execution. Conditional control transfers depend on the results of operations that affect the flag register. Unconditional control transfers are always executed. 6.a) Unconditional Transfers CALL, RET, JMP, INT and IRET instructions transfer control from one code segment location to another. These locations can be within the same code segment (near control transfers) or in different code segments (far control transfers).

CALL
The CALL instruction causes the procedure named in the operand to be executed. When the procedure is complete (a return instruction is executed within the procedure), execution continues at the instruction that follows the CALL instruction. The actions of the different forms of the instruction are described below. The near call instruction does the following: It pushes the 16 bit offset of the next instruction following the call onto the stack. It copies the 16 bit effective address into the ip register. Since the call instruction allows the same addressing modes as jmp, call can obtain the target address using a relative, memory, or register addressing mode. Execution continues at the first instruction of the subroutine. This first instruction is the opcode at the target address computed in the previous step. The far call instruction does the following: It pushes the cs register onto the stack. It pushes the 16 bit offset of the next instruction following the call onto the stack. It copies the 32 bit effective address into the cs:ip registers. Since the call instruction allows the same addressing modes as jmp, call can obtain the target address using a relative, memory, or register addressing mode. Execution continues at the first instruction of the subroutine. This first instruction is the opcode at the target address computed in the previous step. Affected Flags: All flags are affected if a task switch occurs; no flags are affected if a task switch does not occur.

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 RET
RET (Return From Procedure) terminates the execution of a procedure and transfers control through a back-link on the stack to the program that originally invoked the procedure. RET restores the value of EIP that was saved on the stack by the previous CALL instruction. RET instructions may optionally specify an immediate operand. By adding this constant to the new top-of-stack pointer, RET effectively removes any arguments that the calling program pushed on the stack before the execution of the CALL instruction. Intrasegment (near) returns pop a 16 bit return address off the stack into the ip register. An intersegment (far) return pops a 16 bit offset into the ip register and then a 16 bit segment value into the cs register. These instructions are effectively equal to the following: retn: retf: pop popd ip cs:ip

The assembler allow to type ret without the "f" or "n" suffix. Affected Flags: None.

JMP
JMP (Jump) unconditionally transfers control to the target location. JMP is a one-way transfer of execution; it does not save a return address on the stack. The JMP instruction always performs the same basic function of transferring control from the current location to a new location. Its implementation varies depending on whether the address is specified directly within the instruction or indirectly through a register or memory. A direct JMP instruction includes the destination address as part of the instruction. An indirect JMP instruction obtains the destination address indirectly through a register or a pointer variable. These instructions generally use the same syntax, it is jmp target

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 INT
The INT instruction generates via software a call to an interrupt handler. The immediate operand, from 0 to 255, gives the index number into the Interrupt Descriptor Table (IDT) of the interrupt routine to be called. The instruction is the form as: int nn (where "nn" is a value between 0 and 255). It allows calling one of 256 different interrupt routines. This form of the int instruction is two bytes long. The first byte is the int opcode. The second byte is immediate data containing the interrupt number. For example, to terminate a program and return control to MS-DOS, it normally called to load ah with 4Ch and call DOS with the int 21h instruction: mov ah, 4ch ; DOS terminate opcode. int 21h ; DOS call Whatever INT instruction executes, the following sequence of events follows: The 8086 pushes the flags register onto the stack; The 8086 pushes cs and then ip onto the stack; The 8086 uses the interrupt times four as an index into the interrupt vector table and copies the double word at that point in the table into cs:ip.

IRET
Interrupt procedures return via the IRET instruction, which pops the flags and return address from the stack. Since int pushes the flags onto the stack it is must to use a special return instruction, IRET (interrupt return), to return from a routine called via the int instructions. When return from an interrupt procedure using the ret instruction, the flags will be left on the stack upon returning to the caller. The iret instruction is equivalent to the two instruction sequence: ret, popf (assuming, of course, that you execute popf before returning control to the address pointed at by the double word on the top of the stack). Flags Affected : All; the flags register is popped from stack

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6.b. Conditional Transfers The conditional jumps test one or more flags in the flags register to see if they match some particular pattern. If the pattern matches, control transfers to the target location. If the match fails, the CPU ignores the conditional jump and execution continues with the next instruction. Some instructions, for example, test the conditions of the sign, carry, overflow, and zero flags.

JA - Jump if above
It means that, if the result of the comparison is above, then jump to a label. This instruction is same as JNBE (Jump if not below or equal). Condition: Carry=0, Zero=0

JAE - Jump if above or equal

It means that, if the result of the comparison is above or equal, then jump to a label. This instruction is same as JNB (Jump if not below). Condition: Carry=0

JB - Jump if below
It means that, if the result of the comparison is below, then jump to a label. This instruction is same as JNAE (Jump if not above or equal). Condition: Carry = 1

JBE - Jump if below or equal

It means that, if the result of the comparison is below or equal, then jump to a label. This instruction is same as JNA (Jump if not above). Condition: Carry = 1 or Zero = 1

JE - Jump if equal
It means that, if the result of the comparison is equal (Zero), then jump to a label. This instruction is same as JZ (Jump Zero). Condition: Zero = 1

JG - Jump if greater
It means that, if the result of the comparison is greater, then jump to a label. This instruction is same as JNLE (Jump if not less or equal).

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 Condition: Sign = Overflow or Zero=0

JL - Jump if less
It means that, if the result of the comparison is less, then jump to a label. This instruction is same as JNGE (Jump if not not greater nor equal). Condition: Sign Overflow

JCXZ - Jump if CX equals zero

It means that, if the CX is zero, then jump to a label. This instruction is same as JNGE (Jump if not not greater nor equal). Condition: None

Loop
LOOP decrements the count register without changing any of the flags. Conditions are then checked for the form of LOOP being used. If the conditions are met, a short jump is made to the label given by the operand to LOOP. If the address-size attribute is 16 bits, the CX register is used as the count register; otherwise the ECX register is used. The operand of LOOP must be in the range from 128 (decimal) bytes before the instruction to 127 bytes ahead of the instruction. The LOOP instructions provide iteration control and combine loop index management with conditional branching. Use the LOOP instruction by loading an unsigned iteration count into the count register, then code the LOOP at the end of a series of instructions to be iterated. The destination of LOOP is a label that points to the beginning of the iteration. Example of Loop: mov cx, 255 ArrayLp: mov Array[cx], cl loop ArrayLp Flags Affected: No Flag affected. Only CX decrement.

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 LOOPNE/LOOPNZ This instruction is just like the loope/loopz instruction in the previous section except loopne/loopnz (loop while not equal/not zero) repeats while cx is not zero and the zero flag is clear. The algorithm is
cx := cx - 1 if ZeroFlag = 0 and cx 0, goto target It can determine if the loopne instruction terminated because cx was zero or if the zero flag was set by testing the zero flag immediately after the loopne instruction. If the zero flag is clear at that point, the loopne instruction fell through because it decremented cx to zero. Otherwise it fell through because the zero flag was set. Flags Affected: No Flag affected. Only CX decrement. 7) Flag Manipulation Instructions The flag control instructions provide a method for directly changing the state of bits in the flag register.

CLC - Clear Carry Flag

CLC sets the carry flag to zero. It does not affect other flags or registers. The carry flag instructions are useful in conjunction with rotate-with-carry instructions RCL and RCR. They can initialize the carry flag, CF, to a known state before execution of a rotate that moves the carry bit into one end of the rotated operand. Flags Affected: CF = 0

CMC - Compliment Carry Flag

CMC reverses the setting of the carry flag. No other flags are affected. Flags Affected: CF as described above. No others.

STC - Set Carry Flag

STC sets the carry flag to 1. Flags Affected: CF = 1

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 CLD - Set Clear Direction Flag

CLD clears the direction flag. No other flags or registers are affected. After CLD is executed, string operations will increment the index registers (SI and/or DI) that they use. Flags Affected: DF = 0

STD - Set Direction Flag

STD sets the direction flag to 1, causing all subsequent string operations to decrement the index registers, (E)SI and/or (E)DI, on which they operate. Flags Affected: DF = 1

STI - Set Interrupt Enable Flags

STI sets the interrupt flag to 1. The 8086 then responds to external interrupts after executing the next instruction if the next instruction allows the interrupt flag to remain enabled. Flags Affected: IF = 1 8) Machine Control Instructions

HLT - Halt processor

HALT stops instruction execution and places the 80386 in a HALT state. An enabled interrupt, NMI, or a reset will resume execution. If an interrupt (including NMI) is used to resume execution after HLT, the saved CS:IP (or CS:EIP) value points to the instruction following HLT. Flags Affected: None

LOCK - Lock Bus

This instruction is a prefix that causes the CPU assert bus lock signal during the execution of the next instruction. It used to avoid two processors from updating the same data location. This should only be used to lock the bus prior to XCHG, MOV, IN and OUT instructions. Flags Affected: None

NOP - No operation
NOP performs no operation. NOP is a one-byte instruction that takes up space but affects none of the machine context except (E)IP.

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NOP is an alias mnemonic for the XCHG (E)AX, (E)AX instruction. Flags Affected: None

WAIT - Wait until BUSY

CPU enters wait state until the coprocessor signals it has finished its operation. This instruction is used to prevent the CPU from accessing memory that may be temporarily in use by the coprocessor. Flags Affected: None

ESC
Provides access to the data bus for other resident processors. The CPU treats it as a NOP but places memory operand on bus. Flags Affected: None

ASSEMBLER DIRECTIVES AND OPERATORS

The words defined in this section are directions to the assembler, not instructions for the 8086. The assembler directives described here are those for the Intel 8086 macro-assembler (ASM86), the Borland Turbo Assembler (TASM), and the IBM macro assembler (MASM). If we are using some other assembler, consult the manual for it to find the corresponding directives. ASSUME The ASSUME directive is used to tell the assembler the name of the logical segment it should use for a specified segment. The statement ASSUME CS: CODE, for example, tells the assembler that the instructions for a program are in a logical segment named CODE. The statement ASSUME DS: DATA tells the assembler that for any program instruction, which refers to the data segment, it should use the logical segment called DATA. If, for example, the assembler reads the statement MOV AX,[BX] after it reads this ASSUME, it will know that the memory location referred to by [BX] is in the logical segment DATA. We must tell the assembler what to assume for any segment we use in a program. If we use a stack in our program, we must tell the assembler the name of the logical segment we have set up as a stack with a statement such as ASSUME SS: STACK_HERE. For a program with string Instructions which use DI, the

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assembler must be told what to assume for the extra segment with a statement such as ASSUME ES: STRING_DESTINATION. DB--Define Byte The DB directive is used to declare a byte-type variable, or to set aside one or more storage locations of type byte in memory. The statement CURRENT_TEMPERATURE DB 42H, for example, tells the assembler to reserve1 byte of memory for a variable named CURRENT_TEMPERATURE and to put the value 42H in that memory location when the program is loaded into RAM to be run. Here are a few more examples of DB statements. PRICES DB 49H, 98H, 29H Declare array of 3 bytes named-PRICES and initialize 3 bytes as shown. NAME_HERE DB 'YOHANNAS' ; Declare array of 6 bytes and initialize with ASCII codes for letters in YOHANNAS.TEMPERATURE-STORAGE DB 100 DUP(?) ; Set aside 100 bytes of storage in memory and give it the name TEMPERATURE_STORAGE, but leave the 100bytes uninitialized. Program instructions will load values into these locations. PRESSURE_STORAGE DB 20H DUP(0) ; Set aside 20H bytes of storage in memory, give it the name PRESSURE_STORAGE, and put 0 in a 20H locations. DDDefine Double word The DD directive is used to declare a variable of type double word or to, reserve memory locations, which can be accessed as type double word. The statement ARRAY_POINTER DD 25629261H, for example, will define a double word named ARRAY_POINTER and initialize the double word with the specified value when the pro- gram is loaded into memory to be run. The low word, 9261H, will be put in memory at a lower address than the high word. A declaration of this type is often used with the LES or LDS instruction. The Instruction LES DI, ARRAY_POINTER, for example, will copy the low word of this double word, 9261H, into the DI register and the high word of the double word, 2562H, into the extra segment register.

DQdefine Quad word This directive is used to tell the assembler to declare a variable 4 words in length or to reserve 4 words of storage in memory. The statement BIG NUMBER DQ 243598740192A92BH, for example, will declare a variable named BIG_NUMBER and initialize the 4 words set aside with the specified number when the program is loaded into memory to be run. The statement STORAGE DQ 100 DUP (0) reserves 100 quad words of storage and initializes them all to 0 when the program is loaded into memory to be run.

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DTDefine Ten Bytes DT is used to tell the assembler to define a variable, which is 10 bytes in length, or to reserve 10 bytes of storage in memory. The statement PACKED_BCD DT 11223344556677889900 will declare an array named PACKED_BCD, which is 10 bytes in length. It will initialize the 10bytes with the values 11223344556677889900 when the program is loaded into memory to be run. This directive is often used when declaring data arrays for the8087 math coprocessor. The statement RESULTS DT 20H DUP (0) will declare an array of 20H blocks of 10 bytes each and initialize all 320 bytes to 00 when the program is loaded into memory to be run.

DW Define Word The DW directive is used to tell the assembler to define a variable of type word or to reserve storage locations of type word in memory. The statement MULTIPLIER DW 437AH, for example, declares a variable of type word named MULTIPLIER. The statement also tells the assembler that the variable MULTIPLIER should be initialized with the value 437AH when the program is loaded into memory to be run. Few more examples of DW statements.

THREE_LITFLE_WORDS DW 1234H,3456H,5678H initialize with specified values.

;Declare array of 3 word sand

STORAGE DW 100 DUP(0) ; Reserve an array of 100 words of memory and initialize all100 words with 0000. Array is named STORAGE.STORAGEDW 100 DUP(?) ; Reserve 100 words of storage in memory an d give it the name STORAGE, but leave the words uninitialized.

ENDEnd Program The END directive is put after the last statement of a program to tell the assembler that this is the end of the program module. The assembler will ignore any statements after an END directive, so we should make sure to use only one END directive at the very end of our program module. A carriage return is required after the END directive. ENDPEnd Procedure

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This directive is used along with the name of the procedure to indicate the end of a procedure to the assembler. This directive, together with the procedure directive, PROC, is used to "bracket" a procedure. Here's an example. SQUARE-ROOT PROC Start of procedure //Procedure instruction statements SQUARE-ROOT ENDP End of procedure. ENDSEnd Segment This directive is used with the name of a segment to indicate the end of that logical segment. ENDS is used with the SEGMENT directive to "bracket" a logical segment containing instructions or data. Here's an example.

CODE SEGMENT Start of logical segment containing code //Instruction statements CODE ENDS End of segment named CODE

EQUEquate EQU is used to give a name to some value or symbol. Each, time the assembler finds the given name in the program, it will replace the name with the value or symbol we equated with that name. Suppose, for example, we write the statement CORRECTION_FACTOR EQU 03H at the start of our program, and later in the program we write the instruction statement

ADD AL, CORRECTION_ACTOR. When it codes this instruction statement, the assembler will code it as if we had written the instruction ADD AL, 03H. The advantage of using EQU in this manner is that if CORRFCTION_FACTOR is used 27 times in a program, and we want to change the value, all we have to do is change the EQU statement and reassemble the program. The assembler will automatically put in the new value each time it finds the name CORRECTION_FACTOR. If we had used 03H Instead of the EQU approach, then we would have had to try to find all 27 instructions and change them our self. Here are some more examples. 46

CONTROL_WORD EQU 11001001 Replacement MOV AL, CONTROL_WORD DECIMAL_ADJUST EQU DAA ADD AL, BL DECIMAL_ADJUST STRING_START EQU [BX] assignment Create clearer mnemonic for DAA Add BCD numbers Keep result in BCD format Give name to [BX]

EVEN-Align on Even Memory Address As the assembler assembles a section of data declarations or instruction statements, it uses a location counter to keep track of how many bytes it is from the start of a segment at any time. The EVEN directive tells the assembler to increment the location counter to the next even address if it is not already at an even address. The 8086 can read a word from memory in one bus cycle if the word is at an even address. If the word starts at an odd address, the 8086 must do two bus cycles to get the 2 bytes of the word. Therefore, a series of words can be read much more quickly if they are at even addresses. When EVEN is used in a data segment, the location counter will simply be incremented to the next even address if necessary. When EVEN is used in a code segment, the location counter will be incremented to the next even address if necessary. A NOP instruction will be inserted in the location incremented over. Other Assembler Directives (Details of these will be discussed in the class.) EXTRN is used to tell the assembler that the names or labels following the directive are in some other assembly module. GLOBAL This directive can be used in place of PUBLIC directive or in place of an EXTRN directive. The GOLBAL directive is used to make the symbol available to other modules. GROUP This is used to tell the assembler to group the logical segments named after the directive into one logical group segment.

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INCLUDE Include Source Code from File: This is used to tell the assembler to insert a block of source code from the named file in to the current source module. LENGTH Is an operator, which tells the assembler to determine the number of elements in some named data item, such as a string of an array. When the assembler reads the statement MOV CX, LENGTH STRING1 , example it will determine the number of elements in STRING1. NAME -- This directive is used to give a specific name to each assembly module when programs consisting of several modules are written. OFFSET Is an operator which tells the assembler to determine the offset or the displacement of a named data item (variable) or procedure from start of the segment which contains it. This operator is used to load the offset of a variable into a register so that the variable can be accessed with one of the indexed addressing modes. ORG This directives allows we to set the location counter to a desired value at any point in the program. The statement ORG 100H tells the assembler to set the location counter to 0100H.A $ is of tern used to symbolically represent the current value of the location counter. The $ actually represents the next available byte location where the assembler can put a data or code byte.ORG $ +100 tells the assembler to increment the value of the location counter by 100 from its current value. A statement such as this can be used in a data segment to leave 100 bytes of space for future use.

PROC Is used to identify the start of a procedure. PTR

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It is used to assign a specific type to a variable or to a label. It is necessary to do this in any instruction where the type of the operand is not clear.INC BYTE PTR[BX]INC WORD PTR[BX]MOV AL,BYTE PTR WORDS. PUBLIC directive is used to tell the assembler that a specified name or label will be accessed from other modules. SEGMENT It is used to indicate the start of a logical segment. Preceding the SEGMENT directive is the name we want to give the segment. SHORT This operator is used to tell the assembler that only a 1-bytedisplacement is needed to code a Jump instruction. The destination must be in the range of 128 to +127 bytes from the address of the instruction after jump. JMP SHORT NEARBY_LABEL TYPE This operator tells the assembler to determine the type of a specified variable. The assembler actually determines the number of bytes in the type of the variable. For a bytetype variable, the assembler will give a value of 1. For a word type variable, the assembler will give a value of 2 etc. The TYPE operator can be used in an instruction such as ADD BX, TYPE WORD_ARRAY, where we want to increment BX to point to the next word in an array of words.

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References a) BOOKS 1. Microprocessors an Interfacing, Programming and Hardware, 68000 version, Mc Graw Hill, 2nd Ed., 1993, by D.V. Hall and A.L. Rood Glencoe, 2. Assembly Language Programming and Organization of IBM PC, International Edition, McGraw-Hill Inc, 1992 by Ytha Yu and Charles Marut 3. Microprocessors Theory and Applications: Intel and Motorola, Revised Edition by M.Rafiquzzaman. 4.

b) WEB LINKS 1. 2. 3. 4. 5. 6. 7. www.google.com www.en.wikipedia.org http://home.comcast.net/~fbui/intel.html www.emu8086.com/assembly_language_tutorial_assembler_reference www.et.byu.edu/groups/ece425web/stable/labs/8086InstructionSet.html www.du.edu/~etuttle/math/8086.htm http://kvkmai.uw.hu/documents/tantargy/8086-instruction-set-overview.pdf

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