EL 511 VLSI Design

Instructor: Mazad S. Zaveri Faculty Block 4, Room 4206 Email: E il mazad_zaveri@daiict.ac.in d i@d ii t i http://intranet.daiict.ac.in/~mazad_zaveri/

EL 511 VLSI Design

Announcement
We will have a Quiz-1 today. (10 minutes)

Homework-1 has been posted

Hint for homework Gate-length 45 nm Year Generation 2009
x

32 nm = 45*0.7 nm 2011
Next after x

22 nm = 45*0.7*0.7 nm 2013

next after (next after x)

EL 511 VLSI Design

Quiz 1 Quiz-1
1. A software has 500 lines of code. Of these, these 400 lines can run in parallel and parallel, 100 lines can run only sequentially.
What i th Wh t is the maximum speed-up Smax i d How many processors are needed to achieve a speed up of 0.9xSmax speed-up 0 9xS

2. What is the reason behind using high-k gate-oxide i newer generation of I t l t id in ti f Intel processors? Briefly explain, atleast two reasons.
EL 511 VLSI Design

Conceptual Energy Band Model

Electron Energy (E) E

Ec Ev

When silicon atoms come together to form a crystal

New electron energy band model is created We will use the simplified version of the band model
EL 511 VLSI Design

Simplified Energy Band Model

Ec = Conduction Band (starting) level Ev = Valence Band (ending) level ( di ) l l EG = Energy band gap
Forbidden gap
No Allowed states EG = Ec Ev
Electron Energy (E) Conduction B d C d ti Band

Ec
Band Gap

Ev
Valence Band

E = Electron energy
Unit is electron-volt (eV)

EL 511 VLSI Design

Types of Carriers- Electron & Hole

When no bonds in the (lattice) or bonding model are broken, there are no carriers (In terms of energy band model) No carriers are present Valence band is completely filled with electrons; and Conduction band is devoid of any electrons When Si-Si bond breaks, the associated electron is free to wander i th l tti i f t d in the lattice, th released the l d electron is a carrier (In terms of energy band model) Excitation of valence electron into the conduction band creates carrier Electrons in conduction band are carriers When Si-Si bond breaks, in addition to electron release, we have a missing bond (void in the lattice). Nearby electrons may jump to fill this bond, creating a void in a new place. This void is called Hole (In terms of energy band model) Flow of void in the valence band, due to motion of electrons in the valence band 6
EL 511 VLSI Design

Material Classification based on Band Gap

Types of materials
Insulator Semiconductor Metal
Bad conductor large energy band gap (EG) C d t only when excitation/energy i provided it EG Conducts l h it ti / is id d its between the EG of metal and insulator Good conductor Very narrow EG

Electron-volt (eV) is an unit of energy equal to 1.6 x 10-19 joules Related to the charge of an electron = 1.6 x 10-19 coulomb 7

EL 511 VLSI Design

Carrier numbers in Intrinsic Semiconductor

Intrinsic semiconductor
Extremely pure semiconductor
Without any externally added impurity (dopants)

n = number of electrons/cm3 p = number of holes/cm3 In intrinsic semiconductor,

Under equilibrium conditions
Electron concentration = hole concentration
n = p = ni For silicon (at room temp), ni = 1 x 1010 / cm3

Holes and electrons are created only in pairs in intrinsic semiconductors

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EL 511 VLSI Design

Doping manipulation of carrier numbers

Doping
Means the addition of controlled amounts of specific impurity atoms
Why?
Purpose of increasing either the electron or the hole concentration

How?
Replace some Si atoms with some dopant atoms Density of Si atoms in the Si crystal is 5 x 1022 / cm3

Ad doped semiconductor i called E t i i d i d t is ll d Extrinsic semiconductor To increase electron concentration

U D Use Donors (C l (Column V elements i periodic t bl ) l t in i di table)
P (Phosphorus), As (Arsenic), Sb (Antimony)

To increase hole concentration

U A Use Acceptors (C l t (Column III elements i periodic t bl ) l t in i di table)
B (Boron), Ga (Gallium), In (Indium)
EL 511 VLSI Design

Donor (n-type material)

Column V elements
Have five valence electrons

Inside a silicon crystal we replace crystal, Si atom with a donor atom

Four out of five electrons of the donor are used in forming four bonds so tightly bound Fifth electron is loosely bound to donor site
Can be easily released at room temperature acts as a carrier If released from the donor site, leaves behind a +ve charged donor ion Donor ion cannot move around in the crystal
So cannot act as a +ve carrier
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P+

EL 511 VLSI Design

Acceptor (p-type material)

Column III elements
Have 3 valence electrons

Inside a silicon crystal, we replace Si atom with an acceptor atom t ith t t

Three electrons of the acceptor will form three out of four bonds One bond will be incomplete
Electron from other nearby Si-Si bond, will be taken or accpeted and the incomplete bond will be completed The site from which this electron was accepted accepted, will now have a missing bond, and will act as a hole The acceptor atom, accepted an electron so will be ve charged Holes can be easily formed at room temperature acts as a carrier Acceptor ion cannot move around in the crystal
ve So cannot act as a -ve carrier

EL 511 VLSI Design

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Donor and Acceptor Visualization in terms of energy band model

Donor
Weekly bound electrons are in a donor site
Need only about 0.05 to 0.1eV to excite and jump to conduction band

Donor

Acceptor
A new electronic level (EA )is introduced in the forbidden gap, above Ev
Electrons from valence band will excite/jump to this new level, creating holes

Acceptor

EL 511 VLSI Design

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Fermi Function
F Fermi f i function ti
Specifies, under equilibrium conditions, conditions the probability that an available state at an Energy E will be occupied by an electron
EF = Fermi Level or Fermi energy k = Boltzmann constant
k = 8.617 x 10-5 eV/K

f (E) =

1 1 + e( E EF ) / kT

T = Temperature in Kelvin (K)

Fermi Level (EF)

Indicates the relative concentration of electrons in conduction and valence bands
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EL 511 VLSI Design

Semiconductor classification based on Fermi-level Intrinsic Fermi level

Lies in the middle of energy band gap
Ei = (Ec + Ev )/2 EF > Ei and Ei = EF

N-type semiconductor P-type semiconductor

EF < Ei

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Carrier distributions
N-type Distribution Distribution of electrons in conduction band

gc ( E ) f ( E )
Intrinsic Distribution of holes (unfilled states) in valence band

g v ( E ) [1 f ( E ) ]

P-type

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Expressions for n and p

n = number of electrons/cm3 p = number of holes/cm3

In intrinsic semiconductor
n = p = ni

In extrinsic semiconductor
Ei EF and n p ni Use these equations to find the electron and hole concentrations
Valid only under equilibrium conditions of the semiconductor

n = ni e

( EF Ei ) / kT

p = ni e
EL 511 VLSI Design

( Ei EF ) / kT

np = ni

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Intrinsic carrier concentration as a function of temperature

As temperature increases, the number of intrinsic carriers increase
But for intrinsic carriers
n = p = ni

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Charge Neutrality Relation

Charged entities in an extrinsic semiconductor g
Electron (n) and Holes (p) +ve charged donor ions (ND) and ve charged acceptor ions (NA)

For an extrinsic semiconductor

Assuming both type of dopants (donor and acceptors)
Uniformly doped semiconductor

Assuming equilibrium conditions

No electric fields (built-in or external)

This semiconductor is charge-neutral

+ p n + ND N A = 0
Valid for T < room temp Only some dopant atoms are ionized Valid for T > room temp When all dopant atoms are ionized
EL 511 VLSI Design

p n + ND N A = 0

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Carrier concentration
The general case g
Assume both types of dopants in the semiconductor For simplicity, assume that all dopant atoms are ionized (T> room temp)
2 N D N A N D N A 2 n= + + ni 2 2 2 i 1/ 2

N A N D 2 n N A ND 2 p= = + + ni n 2 2

1/ 2

EL 511 VLSI Design

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Electron-Hole concentration from doping concentrations t ti

When

ND ND

NA ni

use

ND

ni2 p= ND
p NA

When

NA NA

ND ni

use

ni2 n= NA

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Electron-Hole concentration from doping concentrations t ti

When

ni

N A ND

use

ni

The above condition can also occur with increasing temperature. Systematically increasing the ambient temperature, causes monotonic increase in the intrinsic carrier concentration. At sufficiently high temperatures ni will eventually equal and then exceed net doping concentration All semiconductors become intrinsic at sufficiently high temperatures y g p

When

ni N A N D

use

2 N D N A N D N A 2 + n= + ni 2 2 2 i

1/ 2

2 n N A N D N A N D 2 p= = + + ni n 2 2

1/ 2

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Position o Fermi-level from dop g co ce t at o os t o of e e e o doping concentration

When

ND ND

NA ni

use

ND EF Ei = kT ln ni

When

NA NA

ND ni

use

NA Ei EF = kT ln ni

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Temperature dependence of carrier concentrations

Plot is for phosphorus ND = 1015/cm3

Systematically increasing the ambient temperature, causes monotonic increase in the intrinsic carrier concentration. At sufficiently high temperatures ni will eventually equal and then exceed net doping concentration All semiconductors become intrinsic at sufficiently high temperatures

-123C

0C 27C

C = K - 273

(= -273C)

EL 511 VLSI Design

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