A CMOS-MEMS Piezoresistive Accelerometer with Large

Proof Mass
Mohd Haris, Student Member, IEEE, Hongwei Qu, Member, IEEE

AbstractThis paper reports a low-cost, high-sensitivity
CMOS-MEMS piezoresistive accelerometer with large proof
mass. Inherent CMOS polysilicon thin film was utilized as
piezoresistive material and full Wheatstone bridge was
constructed through easy wiring allowed by three metal layers in
CMOS thin films. The device fabrication process consists of a
standard CMOS process for sensor configuration and a deep
reactive ion etching (DRIE) based post-CMOS microfabrication
for MEMS structure release. Bulk single-crystal silicon (SCS)
substrate was included in the proof mass to increase sensor
sensitivity. With a low operating power of 1.5 mW, the sensitivity
was measured as 0.077 mV/g prior to amplification. The sensor
was characterized on a magnetic shaker based dynamic test
system with a high-end commercial calibrating accelerometer as
reference.

Index TermsCMOS-MEMS, Piezoresistive, Polysilicon, Deep
Reactive Ion Etching (DRIE).
I. INTRODUCTION
number of CMOS-MEMS piezoresistive accelerometers
have been demonstrated, in most of which only CMOS
thin film micro-cantilever structures were used as proof
mass[1-4]. Although the surface micromachining process
employed for the creation of these devices are quite simple, due
to the small structure thickness, the device suffer low sensitivity
and other shortcomings. Moreover, the residual stress in CMOS
thin films often causes large structure curling. Thus, the area
and mass of the proof mass structure is also limited. DRIE based
dry bulk CMOS-MEMS technology has paved ways for
microfabrication of various devices with robust MEMS
structures and considerable device sizes [5, 6]. Compared with
wet process for SCS proof mass manufacturing [7], DRIE
method is more effective and environment-friendly.
In this work, a low cost, high sensitivity CMOS-MEMS
piezoresistive accelerometer was designed, fabricated and
tested. Compared to the reported devices, higher sensor
sensitivity and larger process tolerance are achieved by using a
maskless bulk CMOS-MEMS microfabrication to include SCS
as proof mass. Inherent CMOS SiO
2
/Aluminum bimorph layers
are employed as sensing structures. In the bimorph beams, four
poly resistors are appropriately designed to harvest the largest
piezoresistance. Using multiple CMOS metal layers, the four
poly resistors are conveniently wired to form a full sensing
Wheatstone bridge for even higher sensitivity.

Mohd Haris is currently a PhD student with the Department of Electrical and
Computer Engineering, Oakland University, Rochester, Michigan 48309 USA
(phone: 248-977-0422, fax: 248-370-6433, email: mmdkhir@oakland.edu).
Hongwei Qu is currently with the Department of Electrical and Computer
Engineering, Oakland University, Rochester, Michigan 48309 USA (phone:
248-370-2205, fax: 248-370-6433, email: qu2@oakland.edu).
II. DEVICE DESIGN AND SIMULATION
Fig. 1 shows a 3-D model of the fabricated accelerometer
with inset showing the cross-sectional view of the CMOS
bimorph beams in which sensing polycrystalline silicon
piezoresistors are embedded. Inset A and B show
cross-sections of the polysilicon resistors that are arranged in
longitudinal and transverse direction, respectively. The sensor
has a SCS proof mass of 500 m 500 m in size and
approximately 40 m of thickness. The SCS proof mass is
anchored through the four SiO
2
/Al bimorph beams that consist
of inherent CMOS thin films with a total thickness of
approximately 5 m. The dimension of each bimorph beam is
200 m 13 m. The inherent CMOS polysilicon layer, which
is used as the piezoresistive sensing material, has a thickness of
approximately 0.35 m, according to the standard AMI 0.5 m
Embedded poly resistors
A B A B
A
Proof mass
Substrate Bimorph cantilevers
Fig. 1.3D model of the piezoresistive sensor showing the
embedded polysilicon resistors in the bimorph beams.
Metal layers
Fig. 2. Schematic cross-section of the released sensor showing the
CMOS thin films and their relative locations.
polysilicon
Single Crystal Silicon
(SCS)
BPSG
Oxide
layers
309
Proceedings of the 2010 5th IEEE International
Conference on Nano/Micro Engineered and Molecular Systems
January 20-23, Xiamen, China
978-1-4244-6545-3/10/$26.00 2010 IEEE
CMOS technology used in this project. The schematic
cross-section of the CMOS thin films and their spatial locations
are illustrated in Fig. 2, and the typical CMOS layer thickness in
AMI 0.5 m technology, which was used in this project is listed
in Table I [8].
When the sensor is subject to an out-of-plane motion, the
induced stress on the longitudinal and transverse poly resistors
will result in the relative change of resistance AR/R, which is
given by
2
1.5
2
pm
polyl b
l b b
L
R m
G L a
R EW H
| | A | |
= +
| |
\ .
\ .
G

(1)
2
1.5
2
pm
polyt b
t b b
L
R mv
G L a
R EW H
| | A | |
= +
| |
\ .
\ .
G

(2)
where G
polyl
and G
polyt
are the longitudinal and transverse gauge
factor, respectively. In the AMI 0.5 m technology used in this
work, the polysilicon layer has a nominal sheet resistance of
26.1 O/ [8] which is equivalent to the resistivity of
9.14 10
-4
O.cm and a boron doping concentration of
1.42 10
19
cm
-3
. This amount of doping concentration
corresponds to the longitudinal and transverse gauge factor of
40 and -15, respectively [9]. Other parameters such as the
sensor geometric and material properties used in Eqn. (1) and
Eqn. (2) and their values are given in Table II.
Using Eqn. (1) and Eqn. (2), the longitudinal and transverse
relative change of resistance with acceleration from 1g to 10g
are estimated and the results are shown in Fig. 3 and Fig. 4. The
calculation results show that the longitudinal relative change of
the piezoresistance is +4.26 10
-4
%/g or +4.6 mO/g, while the
transverse relative change of resistance of the piezoresistance is
-0.43 10
-4
%/g or -0.46 mO/g.
TABLE I
TYPICAL CMOS LAYERS THICKNESS
Layer


Fig. 3. Piezoresistance change in longitudinal direction as a function of
out-of-plane acceleration.


Fig. 4. Piezoresistance change in transverse direction as a function of
out-of-plane acceleration.

CoventorWare, a comprehensive finite element analysis
(FEA) tool dedicated for MEMS design and simulation, was
used to validate the relative resistance change of the piezo
resistors design. From CoventorWare simulation as shown in
Fig. 5, it was found that the relative piezoresistance change in
longitudinal direction can be as high as 1.8 10
-4
%/g or
1.7 mO/g. The FEA simulation result was in good agreement
with the theoretical calculation as shown in Fig. 3.
1 2 3 4 5 6 7 8 9 10
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
x 10
-3
Acceleration [g]
R
e
l
a
t
i
v
e

C
h
a
n
g
e

o
f

R
e
s
i
s
t
a
n
c
e

[
%
]
1 2 3 4 5 6 7 8 9 10
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
x 10
-4
Acceleration [g]
R
e
l
a
t
i
v
e

C
h
a
n
g
e

o
f

R
e
s
i
s
t
a
n
c
e

[
%
]
TABLE II
SENSOR DIMENSION AND MATERIAL PROPERTIES
Symbol Description Value
E
poly
v
E
Polysilicon Youngs modulus
Silicon Poissons ratio
SiO
2
Youngs modulus
160 GPa
0.27
70 GPa
m Proof mass weight 105 g

W
b
Bimorph beam width

13 m
H
b
Bimorph beam thickness from
polysilicon layer
4.2 m
L
b
Bimorph beam length 200 m
L
pm
W
pm
Proof mass length
Proof mass width
500 m
500 m
L
poly
Length of poly resistor 49.4 m
W
poly
Width of poly resistor

1.2 m

Thickness (m)
Single Crystal Silicon (SCS)
Field Oxide under Poly
Field Oxide under Metal 1
Gate Oxide
Polysilicon
Metal
Boro-phospho-silicate- glass (BPSG)
~ 250
0.4
0.375
0.0135
0.35
0.69
0.7


310

Fig. 5. Coventorware simulation of the piezoresistance change in longitudinal
direction as a function of out-of-plane acceleration.
III. DEVICE FABRICATION
The AMI 0.5 m CMOS technology has been utilized for
CMOS fabrication of the sensor through MOSIS. The
post-CMOS process as illustrated in Fig. 6 has been used to
release the structure. The process starts with a back side
selective DRIE process that produces a thin SCS membrane of
~40 m, as illustrated in Fig. 6(a). Anisotropic SiO
2
RIE is then
performed on the front side to open patterns of the bimorphs and
proof mass, as shown in Fig. 6(b). Next, silicon DRIE process is
used to etch through the structure, as shown in Fig. 6(c).
Finally, an isotropic silicon etching undercuts the silicon
underneath the bimorphs and releases the device, as illustrated
in Fig. 6(d). During the isotropic undercut process, a small
portion of the proof mass and the substrate will also be
undercut. This problem will not have a large effect to the sensor
performance due to the large proof mass dimension. The
backside photoresist can be removed by oxygen ashing.
Fig. 7 shows a SEM photograph of the fabricated sensor with
inset showing a close-up of the bimorph. The structure curling
from Fig. 7 is due to the residual stress existing among the
CMOS thin films.
IV. DEVICE CHARACTERIZATION
The resistance of the polysilicon resistor in each beam is
measured as ~1.32 kO. With a 1 mA driving current, the sensor
demonstrates a sensitivity of ~0.077 mV/g prior to
amplification, much larger than what were reported in [2-4].
The greatly increased sensitivity is mainly due to the large proof
mass attached to the ends of bimorph cantilever beams. This
configuration is particularly enabled by the bulk CMOS-MEMS
microfabrication process we have developed, as described in
reference [6]. Its also noteworthy that due to the complete
protection of the polysilicon sensing elements in post-CMOS
process, the device structure allows considerable process
variations in microfabrication. Other sensor characterization is
performed with an external instrumentation amplifier that has a
voltage gain of 52 dB. In the dynamic test, a LMT-100 shaker
from Ling Electronics is used to provide standard acceleration.
A Kistler type 8692B50 accelerometer is used as a reference. It
is calibrated using a 394C06 hand-held shaker from PCB
Piezotronics, which generates a standard 1g acceleration at a
nominal frequency of 159.2 Hz.
Fig. 8 shows the test board on which the device under test
(DUT) is assembled with the reference accelerometer. The DUT
is packaged in a standard ceramic 16 pins DIP package. The
board is screwed to the threaded pole of the shaker.
The resonant frequency of the sensing element has been
1 2 3 4 5 6 7 8 9 10
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
x 10
-3
Acceleration [g]
R
e
l
a
t
i
v
e

C
h
a
n
g
e

o
f

R
e
s
i
s
t
a
n
c
e

[
%
]
Piezoresistive
accelerometer
in package
Kistler reference
accelerometer
Fig. 8. Test board on which the DUT and the reference
accelerometer are mounted.
LMT-100
Shaker body
Fig. 7. SEM image of the fabricated CMOS-MEMS accelerometer with
inset showing the bimorphs where piezoresistors are located.
Bimorphs
3 Metal layers
SiO
2

Photoresist
Trenches
Bimorph
Undercut
Polysilicon
SCS membrane
Proof mass
(a)
(b)
(c)
(d)
Fig. 6. Post-CMOS process flow for structure released.
311
identified as 1.34 kHz through an impulse test. The dynamic
response spectrum of the sensor is shown in Fig. 9.
Fig. 10 shows an output waveform under a 3g excitation at
160 Hz. With 52 dB amplification gain, the sensor produces an
output of 192 mV
p-p
. The testing frequency of 160 Hz is chosen
to be in consistence with the frequency at which the reference
accelerometer has been calibrated. Fig. 11 compares the output
of the fabricated sensor with the reference accelerometer output
in an acceleration range from 1g to 7g. The piezoresistive
accelerometer reported in this work demonstrates a better
linearity.
Fig. 9. Spectrum of the sensor response to an impulse excitation.
CONCLUSION
A low-cost, high-sensitivity CMOS compatible
piezoresistive accelerometer with large proof mass has been
successfully demonstrated. The accelerometer has a
0.077 mV/g mechanical sensitivity with a very low power
consumption of 1.5 mW for operation. Common issues
associated with most of the CMOS-MEMS thin film
accelerometer such as structural curling and low sensitivity
have been solved by incorporating SCS as the proof mass. The
four bimorph beams employed in the sensor has significantly
improved sensor stability by allowing sorely the out-of-plane
motion of the proof mass for larger piezoresistive effect while
minimizing in-plane motion. Multiple CMOS metal layer
permits flexible on-chip sensor element wiring for full
Wheatstone bridge configuration, which further increase sensor
sensitivity.
ACKNOWLEDGEMENT
The device microfabrication was performed at the Lurie
Nanofabrication Facility (LNF), University of Michigan. The
authors would also like to thank Dr. Kai Sun at the Electron
Microbeam Analysis Laboratory at the University of Michigan
for assistance in SEM imaging of the device.
This work
Reference accelerometer
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