Full Paper

2012 ACEEE
DOI: 01.IJRTET.7.2.
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
42
Low Cost Solution for PLC based Data Monitoring
System in Photovoltaic Plants
Atul Gupta
1
, Venu Uppuluri Srinivasa
2
, Devendra Paranjape
3
and Nikhil Kashyap
4
1,2
Santerno India Design Center, Gigaspace, Building Beta-1,
Third floor, Office No. 301, Viman Nagar, Pune, M.H, India
3, 4
BITS Pilani K.K. Birla Goa Campus, EEE Department Zuarinagar 403726, Goa, India
{
1
atulgupta2006,
2
venuuppuluri,
3
pddev4,
4
nikhilkashyap17edu}@gmail.com
AbstractThis paper discusses a real time remote monitoring
system of PV plants for acquiring diagnostic data to ensure
efficient performance of solar panels. The system proposed in
this paper is based on DSP which minimizes use of any
significant analog circuitry and information data over DC
lines totally discarding the need of separate dedicated cables,
thus reducing the overall cost of the system. In addition to
this, the DSP also assists in reducing the Power consumption
of the system which is one of the major PLC problems.
Nowadays, data acquisition is essential component for fault
diagnosis of any control system. Thus, Photovoltaic plants
which are becoming an inevitable option to meet the present
energy requirements require continuous monitoring of
diagnostic data for error analysis, detecting system failure
and smart energy management to ensure optimum efficiency.
Most of the PV plants face critical performance issues majorly
due to its vast size. For instance, the maximum peak power
point of a solar panel decreases significantly due to change in
ambient conditions like dust particles settling on panels,
impact of wind on panels temperature, sudden shadowing,
presence of clouds in some area of the plant and many more
factors. This gives rise to the need of a smart monitoring
system which can remotely provide real time reliable
information of each and every panel to the plant operators.
The simulations and prototype results provided by us confirm
that the proposed system could achieve required performance.
Index Terms PLC, DSP, FSK, PV, THD, EMI Distortion,
Smart Monitoring
I. INTRODUCTION
The Photovoltaic plants are generally very large in size
which makes it very difficult to manage and get the peak
performance out of it. For instance, the maximum peak power
point of a solar panel could decrease significantly due to
dust particles settling on panels, impact of wind on panels
temperature, sudden shadowing, presence of clouds in some
area of the plant and many more.
This often leads to significant decrease in the power
output and hence the efficiency of the PV Power plant. The
situation becomes even worse when any panels fails or stop
working. Without a smart monitoring system which is highly
expensive (in present context), it becomes very difficult for
anyone to pin point the location of the faulty panel. Therefore,
a robust and efficient monitoring system which can provide
us with values of different parameters as shown in Table I [1-
2] of each and every solar panels, string inverters, grid etc.
can vastly improve the performance of the plant. Apart from
improving the amount of power generation, precise
information of panel, inverters and grid parameters can also
help the investor to estimate the cost involved in power
generation accurately. The proposed solution focuses on
key issues like:
- Low power consumption
- Efficient B.W utilization
- Efficient transmission for higher accuracy
- Low installation and maintenance cost
This system uses a DSP for generating DC Power line
modulating signals as well as for other objectives like
implementing control algorithms for maximum power point
tracking. Apart from DSP, the other major factor which makes
this system highly compact and robust is the communication
medium/technology it uses. Three major technologies are
available today for communication systems:
- Physical dedicated links: .It provides high speed
communication but implementing this technology
on a large area like PV plants will be expensive due
to its excessive cabling cost.
- Wireless Network: Though wireless networks dont
have high cost issues they add to circuit complexity
and also face many performance issues.
- Power Line Communication: This option is a proposal
of this article. It uses the existing DC power lines as
a medium for communication. This technology does
not require any extra cabling and has fairly simple
circuitry which makes it even cheaper.
II. SYSTEM OVERVIEW
The system is designed using Texas instruments
TMS320F2802xx Piccolo Microcontroller. It has a high
efficiency 32-bit fixed point CPU which can operate up to 60
MHz clock frequency. The major peripherals which have been
used in this project include a 12 bit ADC module, Serial
Communication interface (UART) module, ePWM (Enhanced
Pulse Width Modulation) module and the GPIO (General
Purpose input output) pins. In this project a communication
between the two microcontrollers, one at the operating station
(master controller) and the other at the string inverter site
(slave controller) had established as shown in Fig. 1.
31
Full Paper
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
2012 ACEEE
DOI: 01.IJRTET.7.2.42
Figure 1. System Overview Block Diagram
The main aim of the slave controller is to constantly
monitor the solar panels so that they operate at maximum
power point all the time and update the master controller with
the values of different PV module parameters like voltage,
current, temperature etc. continuously. A C# based GUI which
communicates serially with the master controller is used to
facilitate users actions. The GUI is used to give the command
to the master controller and get the requested data serially
using SCI module of DSP.
This system implements Narrowband Power Line
Communication. Narrowband PLC works at lower frequencies
(3-500 kHz), lower data rates (up to 100s of kbps) and has
longer range (up to several kilometers). The modulation
technique used is FSK (Frequency Shift Keying) in
Narrowband range at lower data rates. The serial
communication between GUI and microcontroller follows
RS485 standard which is very suitable for working under
hard ambient and noisy conditions.
III. PLC MODEM FILTER CIRCUITRY
A. Modulation
This project uses the FSK modulation scheme for data
transmission. The reason behind choosing FSK is that it is
very simple to implement and highly flexible over a wide range
of frequencies. It offers low power dissipation and is better
than most of the other techniques when it comes to B.W.
efficiency and Error performance [3-4].
Figure 2. FSK Modulator and Coupling Circuit
Sine waves corresponding to the switching frequencies
in the range of 100 KHz will be used in the final design. How-
ever, the frequencies of 18 KHz & 21 KHz have been used for
experimental purpose considering the Q-point of the circuit
which occurs at 19.5 KHz as can be seen clearly in Fig. 4. A
Sallen-Key Low Pass Filter (shown in Fig. 2) has been used
for generation of sine waves from PWM signals as described
in Fig. 3. A number of significant factors like Electromagnetic
Interference (EMI), Total Harmonic Distortion (THD), etc.
have been taken into consideration for the generation of sine
wave. Equation (1) refers to the transfer function of the band
pass filter while (2) and (3) correspond to the cut off fre-
quency and the quality factor. An optimization of (2) and (3)
with minimum and maximum constraints attached to both the
equations have been carried out to obtain the parameters of
the FSK modulator.
(1)
(2)
(3)
Equation (4) represents the Fourier series of the PWM
signals with T as the period of the signal. The equation can
be split into the fundamental quantity and the harmonics to
obtain the THD of the wave.
Figure 3. Sine wave generation using FSK modulated PWM signals
from the MCU
32
Full Paper
2012 ACEEE
DOI: 01.IJRTET.7.2.
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
42
(4)
Figure 4. Low Pass Multi Feedback filter response in the working
frequency range
(5)
Using (4) and (5) theoretically it has been proved that the
optimum pulse width of the PWM is 33% for attaining the
minimum THD. The values obtained using the current results
as shown in Table I, verify the fact that the transfer function
of the filter shifts the pulse width for the minimum THD from
37% to 33%.
TABLE I. COMPARISON OF THD OF FSK MODULATED SIGNALS BEFORE AND
AFTER FILTERING
B. Coupling circuitry
The main purpose of the coupling circuit (shown in Fig.
2) is to superimpose the data on the DC signal and block the
DC voltage [5-6]. In .order to ensure efficient data
transmission, the circuit delivers maximum signal power.
This has been achieved through impedance matching
which occurs at a frequency of 19.5KHZ. Coupling
transformer amplifies the signal thus compensating for the
channel attenuation transformer and also provides galvanic
isolation ensuring safety of the system. Fig. 5 shows the
observed superimposed data signal on a 15V DC power line.
Figure 5. DC power line (15V) coupled with AC signal
C. Demodulation
The demodulation technique used here exploits the
multiplication property of two sine waves [7] as shown in
Fig. 6(a) and can be implemented on DSP using RTOS [8].The
received modulated signal S(n) with a bit period Te , is
multiplied with its delayed form S(n-k). If the time samples
n and n-k belong to the same bit period, say corresponding
to the frequency F
0
and delay k is smaller than the number
of samples in a bit, then the product v(n) will be as follows
). ) (
0
2 sin( )
0
2 sin( ) ( ) (
e
T k n F A
e
nT F A k n s n s =
(6)
( ) ( ) | |. 2 4 cos 2 cos
0 0 0
2
2
) (
e e e
kT F nT F kT F
A
n v
|
|
.
|

\
|
=
(7)
In (7), the first term is a function of k only and hence, it
is constant as long as n and n-k belongs to the same bit.
The second term contains some harmonics which can be
removed by filtering v(n) using a low pass filter. Thus, we
get:

) 2 cos(
2
2
0 e
kT F
A

|
|
.
|

\
|
for 0

) cos(
2
2
1
2
e
kT F
A

|
|
.
|

\
|
for 1.
The filter output is then passed to a comparator to get the
demodulated output. To get optimum results, (8) should be
the maximum.
. )
1
2 cos( )
0
2 cos( ) (
e
kT F
e
kT F k d = (8)
33
Full Paper
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
2012 ACEEE
DOI: 01.IJRTET.7.2.42
Figure 6. (a) Block diagram of Demodulator circuit
(b) Code flow of Demodulation algorithm
The whole algorithm is executed inside the Microcontroller
avoiding the use of any physical hardware as shown in Fig.
6(b). An IIR Low pass Butterworth filter has been designed
using Digital Filter library supported by TMS320F28027
Piccolo Microcontroller. The whole process is executed inside
an Interrupt Service Routine at a frequency of 100 KHz.
D. Decoding Logic
The decoding algorithm comprises of 3 ISRs namely the
PWM ISR, CPU Timer ISR and the Falling Edge ISR as
described in Fig. 8. PWM ISR is called at 100 KHz and the
falling edge ISR occurs on a high to low transition from an
external source. The CPU Timer ISR is executed after every
5ms which is the bit period itself. The Falling Edge ISR
ensures the synchronization of the output data with the CPU
Timer ISR. The Falling Edge ISR enables the CPU timer ISR
after 4 consecutive falling edges where the value of the bit
is evaluated. The aim of the external interrupt routine is to
synchronize the comparator output of the micro controller
with the CPU timer. The CPU timer has a period equal to the
bit period of the data. Thus, the value of each data bit is
updated in the PWM ISR at a frequency of 100 KHz for the
entire bit period. Then, the CPU timer stores the value in the
data array.
IV. NOISE CHARACTERISITICS
PLC real time channel characteristics are one of the
most important considerations while designing a PLC based
communication system. The PLC channel used for the purpose
of electrical power transmission has unique transfer function
and noise characteristics pertaining to every channel [9].Thus,
while designing the PLC modem one must take into account
this aspect to ensure that it does affect the throughput of the
channel. Although a thorough analysis has to be carried out
for each channel. The signal to noise ratio gives an idea of the
effect of the noise on data transmission.
In Power Line Communication the channel topology, the
associated noise sources and the transformer related noise
generated at the coupling instances are the sources of the
noise channel [10]. They can be classified into 4 principle
types based upon the noise sources as shown in Fig. 7 .The
narrow band PLC noise, colored noise, synchronous
impulsive noise and asynchronous impulsive noise. The first
two types (narrow band, colored) are frequency localized
while the impulse noise which is the worst of all of them is
time variant [11-12]. The noise characteristics are also
dependent on the cable length, and the channel load i.e. its
nature and value. In addition to this, the coupling loss which
occurs on account of impedance mismatch has a severe
attenuation on the data signals.
Figure 7. Noise model for DC Power line channel
The model proposed in this paper makes use of the filter,
comparators and amplifiers to compensate for this loss. Thus,
the use of sine wave (single frequency wave) helps to filter
out the noise at the receiver end considering the fact that the
noise is completely spread over the entire frequency
spectrum. It is also very beneficial because the noise sources
at the receiving side significantly affect the throughput as
compared to the noise generated at the transmitting side.
The model also uses impedance matching which occurs at a
frequency of 19.5 KHz.
34
Full Paper
2012 ACEEE
DOI: 01.IJRTET.7.2.
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
42
Figure 8. Data Frame and Decoding Logic Algorithm
V. SYSTEM SPECIFICATIONS AND RESULTS
The Q point of Band pass filter occurs at 19.5KHz.Thus
the mark & space frequencies are chosen symmetrically
around the Q point, i.e. F
0
= 18 KHz & F
1
= 21 KHz. The
Sampling frequency, F
S
=100 KHz and bit period, is 2.5 ms
which gives the data rate of 400 bps. Here, delay = 1 sample
which gives d(k) = 1.976 and the low pass filter is a simple IIR
digital filter with a cutoff frequency of around 2 KHz. The
observed input and output signals using the above
parameters observed on CRO are shown in Fig. 9. Fig. 10
shows the performance of the Santerno Electronics PV plant
at Chandigarh, India. The days performance is being
continuously monitored using the PLC system mentioned in
this paper. The accuracy of the system can be inferred from
the figure. The performance of the plant is maximum at 12
noon as expected.
Figure 9. The graph shows (Top to Bottom) FSK modulated sine
waves, Demodulated Filtered signal and Comparator o/p
35
Full Paper
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
2012 ACEEE
DOI: 01.IJRTET.7.2.42
Figure 10. Various Parameters of PV Plant acquired using PLC system (Dated: 14
th
June 2012
CONCLUSIONS
After a thorough research PLC has been successfully
chosen as method of communications in control and
command applications .One of the major advantages of the
system is that it will use the available DC power lines for
communication purposes. Thus, the PLC based solution
reduces cost by combining power and communication lines
into a single entity. The paper offers a DSP based Power Line
Communication system to transmit diagnostic data over
existing DC power lines. The solution follows the standards
set by IEC 61344, ANSI/EIA 709.1, .2, UPB with the frequency
range of 100km and data rate between 0-10 Kbps. The
standard is particularly suitable to the control and command
application discussed in this paper. The solution addresses
key PLC problems of contamination of communication signals
and power consumption losses. The salient features of the
system is its efficient conductive coupling, over voltage
protection, use of single frequency waves for communication
modem and impedance matching for delivering maximum
signal power.
The main advantages of the solution are:
- Low cost system as it implements modulation/
Demodulation/decoding inside MCU itself avoiding
the need for external hardware. A number of other
options were available to implement this Modem over
wireless or Ethernet communication. However, they
involve extra setup cost and it also adds to the
complexity of the solution. As compared to this the
PLC Modem does not require any new setup and
consequently
reduces the cost and is very easy to implement.
- Use of DSPs for generating FSK communication
signals as well as for other objectives like reading
sensors values and performing control functions
like MPPT. This is one of the most interesting
advantages of the system design. This multi-
objective approach helps to reduce the power
consumption as well as make the solution cost-
effective.
- High Q Active Multi Feedback filter improves SNR,
thus compensating for capacitive coupling losses.
- System can be optimized as per the companys
requirements.
- Conductive coupling, over voltage protection, and
impedance matching for delivering maximum signal
power.
- The overall power consumption is minimal with
minimum hardware and low power consumption
devices used mainly TMS320F28027 DSP.
However, it would be worth mentioning the improvements
which can be added to the current solution. One of the critical
improvements to the system would be the modulation
technique. The use of OFDM which is the preferred DSP
technique in PLC pertaining to the most obvious advantages
like extra robust coding mechanisms used and be able to deal
with asymmetric interference generated on account of the
transformers. The system has also got a scope of improvement
in the error correction algorithms being currently used.
36
Full Paper
2012 ACEEE
DOI: 01.IJRTET.7.2.
Int. J. on Recent Trends in Engineering and Technology, Vol. 7, No. 2, July 2012
42
REFERENCES
[1] F.J. Snchez-Pacheco, P.J. Sotorrio-Ruiz, J.R. Heredia-
Larrubia, F. Prez-Hidalgo and M. Sidrach-de-Cardona, Low
cost DC lines PLC based Photovoltaic plants parameters smart
monitoring communications and control module, IEEE, May
2011.
[2] JunChang Guo, ShiPing Su and Chuanzong Fu, Research on
Power Quality Monitoring System based on low-voltage PLC
Technology. APAP, IEEE, 16-20 Oct. 2011.
[3] Chia-Hung WANG, Chia-Yu CHEN and Tai-Ping
SUN,Circuit Implementation of OOK Modulation for Low-
Speed Power Line Communication Using X10 Standard.
ICACT, IEEE, 13-16 Feb. 2011".
[4] Ko-Chi Kuo, Jia-Wei Guo and Yu-Hao Ou, A Fully Digital
Modulator/Demodulator for Power Line Communication
(PLC). APCCAS, IEEE 6-9 Dec.(2010).
[5] Chong-Yeun Park, Kwang-Hyun Jung and Won-Ho Choi,
Coupling Circuitary for Impedance Adaptation in Power Line
Communications using VCGIC.ISPLC , IEEE , 3-4 April 2008.
[6] Rodolfo Araneo and Salvatore Celozzi Giampiero
Lovat,Design of Impedance Matching Couplers for Power
Line Communications. EMC, IEEE, 17-21 Aug. 2009.
[7] G. Baudoin, F.Virolleau, O.Venard and P. Jardin. Teaching
DSP through the Practical Case Study of an FSK Modem.
ESIEE, Paris, September 1996.
[8] A. Gupta., V.S. Uppuluri, RTOS: A New Approach in Design
and Organization of High-Speed Power Control Applications
Springer, 2011.
[9] V. Guillet, G. Lamarque, P. Ravier and C. Leger, Improving
the power line communication signal noise ratio during a
resistive load commutation, IEEE, 2 March 2009.
[10] Katayama, Masaaki, Power Line Communications and Its
Applications, 2007. ISPLC 07. IEEE International
Symposium on, ISPLC, IEEE, 2007.
[11] Zhenchao Wang; Huiran Hou; Yutao Gan , Feature Extraction
of the Noise in L-PLC , IEEE , 2007
[12] Jianming Liu, Bingzhen Zhao, Jiye Wang, Yi Zhu.Application
of power line communication in smart power Consumption.
ISPLC, IEEE, 28-31 March 2010"
BIOGRAPHIES
Atul Gupta received B.E. degree in
Electronics and Telecom Engineering
from Army Institute of Technology,
affiliated to Pune University, MH, In-
dia, in 2002 and M.Tech. degree in in-
strumentation from School Of Instru-
mentation, affiliated to DAVV Univer-
sity, Indore, MP, India. From 2004 to
2007, he was with the Research Divi-
sion, TVS Electronics, Bangalore, In
dia, where he worked on development of On-Line uninterruptible
power system, sine wave inverters and low-power dcdc convert-
ers. He also worked at Emerson Network Power as Champion R&D
in at thane, MH, India. Since Sept 2007, he is with Santerno India
Design Center, Pune, working on grid connected advance solar in-
verter design. His research interest includes power conditioning,
Solar Energy, Hybrid Energy, Grid Interconnection of Renewable
Energy sources. He has published many research papers in reputed
international journals.
Venu Uppuluri Srinivasa, holds
Masters degree in Mechanical from
Osmania University, Hyderabad, A.P,
India. He also holds Masters degree in
management & Post graduate diploma
in Financial Management discipline.
Has over 20 years of experience as an
IT / ITes Technologist with both estab-
lished public companies and Venture
funded startups. Held senior executive
roles in product marketing, strategy, product development and
business development. Currently working as General Manager and
Head for Carraro Technologies India Limited (an Italian Company)
since 6 years representing Board as an authorized signatory. Also
signed as board of director for Santerno India Private Limited. Served
in the capacity of Engineering Director for Emerson Electric Co.
(USA), Group Manager for Tecumseh Products India Limited etc.
Devendra Paranjape is pursuing his
B.E (Hons) degree in Electrical and Elec-
tronics Engineering from the BITS
PIlani, currently in his final year (2012)
and will be graduating in the same year.
He was with Divgi-Warner Pvt.Ltd in
2010 for a period of 2 months. Since
January 2012, he has been associated
with Santerno India Engineering Design
Center, Pune, India, working on design and development of Power
Line Communication Systems Solar Power Plants. His research
interests include Digital Signal Processing, and Embedded System
Design. He has also contributed to other fields like Public Speak-
ing, and Debates on International issues.
Nikhil Kashyap is currently pursuing
his B.E (Hons) degree in Electrical and
Electronics Engineering from BITS
Pilani (Goa Campus), India and will be
graduating in August 2012. He is a re-
cipient of the prestigious NTSE schol-
arship in 2005, a National level scholar-
ship program organized by NCERT,
Govt. of India. He was with Rourkela
Steel Plant (SAIL India) in 2010 for a period of 2 months as a
Summer Intern where he worked on Efficient Energy systems. Since
January 2012, he has been associated with Santerno India Engi-
neering Design Center, Pune, India, working on design and devel-
opment of Power Line Communication Systems for data monitor-
ing in PV Plants. His research interests include Communication
Systems, Clean & Hybrid Energy Systems, Signal Processing, Bio-
medical Instrumentation, Neuroscience and Artificial Intelligence.
37