INTRODUCTION TO SPICE

SPICE (Simulation Program for Integrated Circuits Emphasis) is an analog circuit simulator developed at Berkeley. Many different versions of SPICE are available from many different vendors. Common SPICEs include HSPICE, PSPICE, and B2SPICE. SPICE takes a circuit netlist and performs mathematical simulation of the circuit's behavior. A netlist describes the components in the circuit and how they are connected. SPICE can simulate DC operating point, AC response, transient response, and other useful simulations. SPICE (Simulation Program with Integrated Circuit Emphasis) is a general purpose analog circuit simulator. It is a powerful program that is used in IC and board-level design to check the integrity of circuit designs and to predict circuit behavior. This is of particular importance for integrated circuits. The SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975), as its name implies SPICE can do several types of circuit analyses. Here are the most important ones: Non-linear DC analysis: calculates the DC transfer curve. Non-linear transient analysis: calculates the voltage and current as a function of time when a large signal is applied. Linear AC Analysis: calculates the output as a function of frequency. A bode plot is generated. Noise analysis Sensitivity analysis Distortion analysis Fourier analysis: calculates and plots the frequency spectrum. In addition, Spice has analog and digital libraries of standard components (such as NAND, NOR, flip-flops, and other digital gates, op amps, etc). This makes it a useful tool for a wide range of analog and digital applications. All analyses can be done at different temperatures. The default temperature is 300K. The circuit can contain the following components: Independent and dependent voltage and current sources Resistors Capacitors Inductors Mutual inductors Transmission lines Switches Diodes Bipolar Transistors MOS Transistors JFET

Operational amplifiers Digital gates About B2 Spice A/D V4

MESFET

B2 Spice A/D V4 contains a mixed mode simulator is based partly on the Berkeley SPICE simulator and partly on the Georgia Tech Xspice simulator. This means that you are getting industrial strength accuracy. B2 Spice A/D V4 is a 32-bit Windows application. B2 Spice A/D V4 is intended to help you design analog, digital, and mixed mode circuits. Rather than working on your circuit design with physical components, which require expensive test equipment and a lab, B2 Spice A/D V4 allows you to perform realistic simulations on your circuit without clipping wires or splashing solder. With B2 Spice A/D V4, editing and simulating circuits is a quick, easy, even enjoyable process. B2 Spice A/D V4 supports the full Spice 3F5 set of commands, options, and models. This includes simulations such as DC Sweep, AC Sweep, Transient, Sensitivity, Pole-Zero, Fourier, Distortion analysis, and more. Models include no less than six distinct MOSFET models, models for switches, several transmission line models, and much more. B2 Spice A/D V4 is an application with two separate subprograms: the Workshop, and the Database Editor. The Workshop is most frequently used. Youll use it to create and edit your circuits, to set up the simulations, to run the simulations, and to view the results. The Database Editor is used for defining new parts or modifying those already in the parts bin. Each subprogram is covered in its own chapter. The program features a large database of devices that should be sufficient for most circuits, and can be customized to meet your design needs. The Database Editor will explain how you can add more devices into the database. B2 Spice A/D v4 comes in three flavors, professional, standard, and student. The professional version includes features not in the standard, and the standard contains features not in the student version. These differences will be discussed in the user manual. B2 Spice A/D V4 allows you to enter a circuit design in the schematic editor, run simulations on the circuit, and view simulation results. B2 Spice A/D V4 has two distinct and incompatible simulators. Each of the two simulators has its own schematic mode. The mixed mode simulator simulates analog and mixed analog/digital circuits. Use the mixed mode schematic and simulator if your circuit is analog or mixed mode. If your circuit is a pure digital circuit, then use a pure digital schematic and simulator. The program can also be used to run simulations from netlists and to graph arbitrary data sets.

CIRCUIT DIAGRAM (SINGLE STAGE CE AMPLIFIER):

V1
12

R1
100K

R3
1K

C2

1u

C1
1u 0

Q1 R2
10K

beta= 122

IVm1 R4
470

C3
47u

V2

TABULAR COLUMN ( SINGLE STAGE CE AMPLIFIER):

S.No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Frequency in Hz 10 21.54 46.42 100 215.44 464.16 1.00k +2.15k +4.64k +10.00k +21.54k +46.42k +100.00k +215.44k +464.16k +1.00Meg +2.15Meg +4.64Meg +10.00Meg +21.54Meg +46.42Meg +100.00Meg +215.44Meg +464.16Meg +1.00G

V in (volts)
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

V0 (volts) 1.41 3.78 8.69 16.65 24.49 28.23 29.28 29.52 29.57 29.58 29.59 29.59 29.59 29.59 29.59 29.58 29.57 29.52 29.29 28.27 24.63 16.95 9.19 4.58 2.41

Gain in dB 2.95 11.54 18.78 24.43 27.78 29.01 29.33 29.4 29.42 29.42 29.42 29.42 29.42 29.42 29.42 29.42 29.42 29.4 29.33 29.03 27.83 24.58 19.27 13.22 7.63

FREQUENCY RESPONSE OF SINGLE STAGE CE AMPLIFIER

Expt.No.1 Date: AIM

To construct and obtain the frequency response of single stage CE amplifier by using B2 SPICE.

NET LIST:
***** main circuit Q1 2 1 3 qbf469 R1 4 2 1K R2 3 0 470 R3 4 1 100k R4 1 0 10k C1 5 1 1u V1 5 0 DC 0 AC 1 0 C2 3 0 47u C3 2 7 1u IVm1 7 0 0 V2 4 0 DC 12 .AC Dec 3 10 1000meg .END

C E A m p - S m a l l S i g n a l A C - FG r e r qa( uHp ezhn) c y

1 . 1 1 1 1 1 1 1 1 1. 1 1k . G A IN ( d b ) 1. 1 1 1 1 . 1 1 k1 1 1 1 1 1 1. 1 1M e g 1 . 1 1 M1 e g1 .1 1 M 1e g 1. 1 1G . k 1

1. 1 1 1

1. 1 1 1

1. 1 1 1

1. 1 1 1

1. 1 1

F R E Q 1 .1 1 1D1 B (1v ( 1V. 1 m 1 1 G)1) A I N 1 . 1 1 1 D1 ( F R E1 . Q )1 1 D1 ( G A I1N. 1 1 I 1 )

PROCEDURE:
1. Regup the circuit as shown in figure by choosing appropriate devices from the menu titled devices 2. Choose the wire drawing tool from the tool bag and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 1V amplitude, variable frequency is applied as input signal by editing the voltage source. 5. Then choose set up simulation from simulation menu. 6. Choose the option of AC frequency analysis and give starting and ending frequency ranges. 7. Select the option of view table and view graph . 8. Now choose run simulation. 9. Observe the output frequency response graph and take the maximum gain and 3 dB frequencies. 10. Note down the tabular column.

Graph: A graph should be drawn by taking frequency on x-axis and gain in dB on y-axis.

RESULT:
A single stage CE amplifier was constructed & the frequency response of the single stage CE amplifier was obtained by using B2 SPICE. Maximum Gain = _______ dB f1 = __________ HZ f2 = __________ HZ Bandwidth =

CIRCUIT DIAGRAM ( TWO STAGE RC COUPLED AMPLIFIER):

V2
12

R3
100k

R1
1K

R5
100K

R7
1K

C3 C1
1u 0

1u

Q2

C4 1u
beta= 122

Q1

beta= 122

C2 R4
10k 47u

IVm 1 R6
10K

V1

R2
470

R8
470

C5
47U

TABULAR COLUMN:
S.No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Frequency in Hz 10 21.54 46.42 100 215.44 464.16 +1.00k +2.15k +4.64k +10.00k +21.54k +46.42k +100.00k +215.44k +464.16k +1.00Meg +2.15Meg +4.64Meg +10.00Meg +21.54Meg +46.42Meg +100.00Meg V in (volts) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V0 (volts) 1.93 13.55 69.38 240 481.3 613.92 652.81 661.85 663.83 664.25 664.27 663.96 662.44 655.5 625.92 527.21 343.99 179.59 85.64 39.56 17.5 6.79 Gain in dB 5.71 22.64 36.82 47.6 53.65 55.76 56.3 56.42 56.44 56.45 56.45 56.44 56.42 56.33 55.93 54.44 50.73 45.09 38.65 31.95 24.86 16.64

FREQUENCY RESPONSE OF TWO STAGE RC COUPLED AMPLIFIER

Expt.No.2 Date: AIM
To construct and obtain the frequency response of two stage RC coupled amplifier by using B2 SPICE.

NET LIST:
***** main circuit R5 5 11 100K R1 5 4 1K R2 3 0 470 Q2 15 11 16 qbf469 R4 9 0 10k C1 10 9 1u V1 10 0 DC 0 SIN( 0 1 1meg 0 0) AC 1 0 Q1 4 9 3 qbf469 C2 3 0 47u R3 9 5 100k C3 4 11 1u V2 5 0 DC 12 R6 11 0 10K R7 5 15 1K R8 16 0 470 C4 15 12 1u C5 16 0 47U IVm1 12 0 0 .AC Dec 3 10 100meg .END

T w o S t a g e R C C o u p l e d A m p - S mF ar e l ql (uSH e izng ) cn ya l A
1 0 .0 0 G a in 5 5 .0 0 5 0 .0 0 4 5 .0 0 4 0 .0 0 3 5 .0 0 3 0 .0 0 2 5 .0 0 2 0 .0 0 1 5 .0 0 1 0 .0 0 5 .0 0 1 0 0 .0 0 1 .0 0 k 1 0 .0 0 k 1 0 0 .0 0 k 1 .0 0 M e g 1 0 .0 0 M e g1 0 0 .0 0 M e

F R E Q - 1 . 0 0 0D B ( v ( I -V1 m0 20 )0g a i n . )

- 1 . 0 0 0D ( F R E - Q . )0 0 0D ( g a i n - )1 . 0 0 0 1

PROCEDURE:
1. Regup the circuit as shown in figure by choosing appropriate devices from the menu titled devices 2. Choose the wire drawing tool from the tool bag and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 1V amplitude, variable frequency is applied as input signal by editing the voltage source. 5. Then choose set up simulation from simulation menu. 6. Choose the option of AC frequency analysis and give starting and ending frequency ranges. 7. Select the option of view table and view graph . 8. Now choose run simulation. 9. Observe the output frequency response graph and take the maximum gain and 3 dB frequencies. 10. Note down the tabular column. Graph: A graph should be drawn by taking frequency on x-axis and gain in dB on y-axis.

RESULT:
A two stage RC coupled amplifier was constructed & the frequency response of the two stage RC coupled amplifier was obtained by using B2 SPICE. Maximum Gain = _______ dB f1 = __________ HZ f2 = __________ HZ Bandwidth =

CIRCUIT DIAGRAM ( CLASS A POWER AMPLIFIER ):

V1
12

R1
22K

R3
1K

C1
22u 0

Q1
beta= 122

IVm1 R2
10K

R4
470

C3
47u

V2

TABULAR COLUMN:
S.No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Frequency in Hz 10 17.78 31.62 56.23 100 177.83 316.23 562.34 +1.00k +1.78k +3.16k +5.62k +10.00k +17.78k +31.62k +56.23k +100.00k +177.83k +316.23k +562.34k +1.00Meg +1.78Meg +3.16Meg +5.62Meg +10.00Meg +17.78Meg +31.62Meg +56.23Meg +100.00Meg V IN (volts) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V0 (volts) 6.18 10.63 18.64 32.71 56.37 92.04 133.84 166.34 182.83 189.16 191.3 191.99 192.22 192.29 192.31 192.31 192.31 192.3 192.26 192.13 191.72 190.45 186.6 175.8 151 111.63 71.53 42.23 24.06 Gain in dB 15.82 20.53 25.41 30.29 35.02 39.28 42.53 44.42 45.24 45.54 45.63 45.67 45.68 45.68 45.68 45.68 45.68 45.68 45.68 45.67 45.65 45.6 45.42 44.9 43.58 40.96 37.09 32.51 27.63

CLASS A POWER AMPLIFIER

Expt.No.3 Date: AIM
To construct and obtain the frequency response of class A power amplifier by using B2 SPICE.

NET LIST:
***** main circuit R1 1 2 22K R2 2 0 10K R3 1 3 1K R4 4 0 470 Q1 3 2 4 qbf469 C1 5 2 22u C3 4 0 47u V1 1 0 DC 12 V2 5 0 DC 0 AC 1 0 IVm1 3 0 0 .AC Dec 3 10 1000meg .END

C L A S S A a m p - S m a l l S i g n a l AF Cr e -q G(uH er zan ) cp yh
1 0 .0 0 1 0 0 .0 0 G a in (d b ) 4 5 .0 0 1 .0 0 k 1 0 . 0 0 k 1 0 0 . 0 0 k 1 . 0 0 M e g1 0 . 0 0 M e 1 g 0 0 . 0 0 M e 1 g . 0 0 G

4 0 .0 0

3 5 .0 0

3 0 .0 0

2 5 .0 0

2 0 .0 0

1 5 .0 0

1 0 .0 0

5 .0 0

F R E Q 3 3 0 . 1 D 9B ( v ( I4V 2 m. 7 2 1 ) g4) a i n 7

4 2 . 7 1 D ( F R E 0 Q. 0 ) 4

D ( g a i n0 ) . 0

PROCEDURE:
1. Regup the circuit as shown in figure by choosing appropriate devices from the menu titled devices 2. Choose the wire drawing tool from the tool bag and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 1V amplitude, variable frequency is applied as input signal by editing the voltage source. 5. Then choose set up simulation from simulation menu. 6. Choose the option of AC frequency analysis and give starting and ending frequency ranges. 7. Select the option of view table and view graph . 8. Now choose run simulation. 9. Observe the output frequency response graph and take the maximum gain and 3 dB frequencies. 10. Note down the tabular column. Graph: A graph should be drawn by taking frequency on x-axis and gain in dB on y-axis.

RESULT:
The class A power amplifier was constructed & the frequency response was obtained by using B2 SPICE. Maximum Gain = _______ dB f1 = __________ HZ f2 = __________ HZ Bandwidth =

CIRCUIT DIAGRAM ( CASCADE AMPLIFIER ):

V2
12

R2
100k

R6
4k

R1
4k 0

C1
1u

Q1
beta= 122

C3 1u Q2
beta= 122

R7
4k

IVm1

R3
100k

R4

V1

4.3k

R5
3.6k

C2
47u

TABULAR COLUMN:
S.No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Frequency in Hz 10 17.78 31.62 56.23 100 177.83 316.23 562.34 +1.00k +1.78k +3.16k +5.62k +10.00k +17.78k +31.62k +56.23k +100.00k +177.83k +316.23k +562.34k +1.00Meg +1.78Meg +3.16Meg +5.62Meg +10.00Meg V IN (volts) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V OUT (volts) 2.24 6.05 13.48 25.23 40.24 53.86 61.85 65.19 66.36 66.74 66.86 66.9 66.92 66.92 66.93 66.94 66.98 67.11 67.52 68.85 73.23 88.17 83.93 21.62 6 Gain in dB 7.02 15.63 22.6 28.04 32.09 34.62 35.83 36.28 36.44 36.49 36.5 36.51 36.51 36.51 36.51 36.51 36.52 36.54 36.59 36.76 37.29 38.91 38.48 26.7 15.56

CASCADE AMPLIFIER

Expt.No.4 Date: AIM

To construct and obtain the frequency response of CASCADE amplifier by using B2 SPICE.

NET LIST:
***** main circuit Q1 22 1 3 qbf469 Q2 13 3 6 qbf469 R1 7 8 4k R2 22 1 100k R3 1 0 100k R4 3 0 4.3k R5 6 0 3.6k R6 22 13 4k R7 24 0 4k C1 8 1 1u C2 6 0 47u C3 13 24 1u V1 7 0 DC 0 AC 1 0 V2 22 0 DC 12 IVm1 24 0 0 .AC Dec 20 10 10meg .END

C A S C A D E a m p - S m a l l S i g n a lF rAe qC u( H- eGzn ) rc ay p h
1 0 .0 0 g a in 4 0 .0 0 1 0 0 .0 0 1 .0 0 k 1 0 .0 0 k 1 0 0 .0 0 k 1 .0 0 M e g 1 0 .0 0 M e g

3 5 .0 0

3 0 .0 0

2 5 .0 0

2 0 .0 0

1 5 .0 0

1 0 .0 0

5 .0 0 F R E Q 9 6 9 . 0 8D 9 B ( v ( I V 6m . 41 3) )3g a i n 3 3 6 . 4 3 3D ( F R E 0Q . 0) D ( g a i n 0) . 0

PROCEDURE:
1. Regup the circuit as shown in figure by choosing appropriate devices from the menu titled devices 2. Choose the wire drawing tool from the tool bag and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 1V amplitude, variable frequency is applied as input signal by editing the voltage source. 5. Then choose set up simulation from simulation menu. 6. Choose the option of AC frequency analysis and give starting and ending frequency ranges. 7. Select the option of view table and view graph . 8. Now choose run simulation. 9. Observe the output frequency response graph and take the maximum gain and 3 dB frequencies. 10. Note down the tabular column. Graph: A graph should be drawn by taking frequency on x-axis and gain in dB on y-axis.

RESULT:
The CASCADE amplifier was constructed & the frequency response was obtained by using B2 SPICE. Maximum Gain = _______ dB f1 = __________ HZ f2 = __________ HZ Bandwidth =

CIRCUIT DIAGRAM ( WEIN BRIDGE OSCILLATOR ):

R1
10K

R2
20K

V1
12

Vout X1

Vf R4
15916

C2

R3
15915

V2
12

C1
0.1u

0.1u

OUTPUT:
W E IN B R ID G E - T r a n s ie n t - G r a p h
1 0 .0 0 m (V ) 4 .0 0 m 2 .0 0 m 0 .0 - 2 .0 0 m - 4 .0 0 m - 6 .0 0 m - 8 .0 0 m - 1 0 .0 0 m - 1 2 .0 0 m - 1 4 .0 0 m - 1 6 .0 0 m - 1 8 .0 0 m T IM E - 1 .0 0 0 2 0 .0 0 m 3 0 .0 0 m 4 0 .0 0 m 5 0 .0 0 m 6 0 .0 0 m 7 0 .0 0 m 8 0 .0 0 m T i m (es ) 9 0 .0 0 m 1 0 0 .0 0 m

v ( V o u t )- 1 . 0 0 0

D (T IM E - )1 .0 0 0

D ( v ( V o -1 t.0) 0 0 u )

WEIN BRIDGE OSCILLATOR

Expt.No.5 Date: AIM
To construct and verify the operation of WEIN BRIDGE oscillator by using B2 SPICE.

NET LIST:
************************ * B2 Spice ************************ * B2 Spice default format (same as Berkeley Spice 3F format) ***** subcircuit definitions * Op-Amp Macromodel * based on op-amp macromodelling discussion located in * 'Macromodelling with Spice', * by Connelly & Choi, Prentice Hall publisher. * Pin # Pin Name Pin description * 1 +IN Input Node * 5 -IN Input Node * 14 OUT Output Node * 9 VCC+ + Power Supply * 11 VCC- - Power Supply ***** main circuit XX1 3 12 5 2 7 OpAmp V1 2 0 DC 12 V2 0 7 DC 12 IVout 5 0 0 R1 0 12 10K R2 12 5 20K R3 15 5 15915 R4 3 0 15916 C1 3 0 0.1u C2 3 15 0.1u IVf 3 0 0 .OPTIONS gmin = 1E-12 reltol = 1E-4 itl1 = 500 itl4 = 500 + rshunt = 1G .TRAN 100u 100m 50u 100u uic .IC .END

TABULAR COLUMN:
S.No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Time +1.05m +1.15m +1.25m +1.35m +1.45m +1.55m +1.65m +1.75m +1.85m +1.95m +2.05m +2.15m +2.25m +2.35m +2.45m +2.55m +2.65m +2.75m +2.85m +2.95m +3.05m +3.15m +3.25m +3.35m +3.45m +3.55m +3.65m +3.75m +3.85m +3.95m +4.05m +4.15m +4.25m +4.35m +4.45m +4.55m +4.65m +4.75m +4.85m +4.95m V REF -2.17m -2.38m -2.58m -2.78m -2.97m -3.15m -3.33m -3.50m -3.67m -3.82m -3.96m -4.10m -4.22m -4.34m -4.44m -4.53m -4.61m -4.67m -4.72m -4.76m -4.79m -4.80m -4.80m -4.79m -4.76m -4.72m -4.67m -4.60m -4.52m -4.43m -4.33m -4.22m -4.09m -3.96m -3.81m -3.66m -3.50m -3.33m -3.15m -2.96m V OUT -8.14m -8.76m -9.36m -9.95m -10.52m -11.08m -11.61m -12.13m -12.62m -13.08m -13.51m -13.92m -14.29m -14.63m -14.93m -15.20m -15.43m -15.63m -15.79m -15.91m -15.98m -16.02m -16.02m -15.98m -15.90m -15.78m -15.63m -15.43m -15.20m -14.92m -14.62m -14.28m -13.90m -13.50m -13.07m -12.60m -12.11m -11.60m -11.06m -10.51m S.No. 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Time +5.05m +5.15m +5.25m +5.35m +5.45m +5.55m +5.65m +5.75m +5.85m +5.95m +6.05m +6.15m +6.25m +6.35m +6.45m +6.55m +6.65m +6.75m +6.85m +6.95m +7.05m +7.15m +7.25m +7.35m +7.45m +7.55m +7.65m +7.75m +7.85m +7.95m +8.05m +8.15m +8.25m +8.35m +8.45m +8.55m +8.65m +8.75m +8.85m +8.95m V REF -2.77m -2.57m -2.37m -2.17m -1.96m -1.75m -1.54m -1.33m -1.12m -905.35u -697.49u -492.53u -291.27u -94.50u +97.00u +282.47u +461.18u +632.44u +795.55u +949.89u +1.09m +1.23m +1.35m +1.47m +1.57m +1.66m +1.74m +1.80m +1.86m +1.90m +1.92m +1.94m +1.94m +1.92m +1.90m +1.86m +1.81m +1.74m +1.66m +1.57m V OUT -9.93m -9.34m -8.74m -8.12m -7.50m -6.87m -6.24m -5.60m -4.97m -4.34m -3.72m -3.10m -2.50m -1.91m -1.33m -774.87u -238.61u +275.28u +764.77u +1.23m +1.66m +2.07m +2.44m +2.78m +3.09m +3.36m +3.59m +3.79m +3.95m +4.07m +4.15m +4.19m +4.19m +4.15m +4.07m +3.96m +3.80m +3.60m +3.37m +3.10m

PROCEDURE:

1. Connect the circuit as per the circuit diagram & give the specified values for all components. 2. Then click on SIMULATION menu & choose setup simulation 3. Then a window is displayed from that choose TRANSIENT option & set the values as given (a) start value 50u (b) stop time 100m (c) linearization setup 100u (d) step ceiling 100u 4. Select linearise result & then click ok. 5. After click on ok button & then choose RUNNOW option from SIMULATION window & hen graph will be displayed 6. Then choose NET LIST option from the file menu & note down the net list 7. Then note down time period for one cycle & calculate the frequency theoretical as well as practical. Graph: A graph should be drawn by taking frequency on x-axis and Vout on y-axis.

RESULT:
The WEIN BRIDGE oscillator was constructed and its operation was verified by using B2 SPICE.

CIRCUIT DIAGRAM (SMALL SIGNAL ANALYSIS OF CE AMPLIFIER)

R 15 0 0
1

VAm 1 R4
3

R2 R3 V1 0
10K 100K 0

1 .1 K

R5 R6 h re h fe
40K 1K

SMALL SIGNAL ANALYSIS OF CE AMPLIFIER

Expt.No.6 Date: AIM

To determine the input impedance, output impedance and transfer function of a small signal analysis of CE amplifier by using B2 SPICE.

NET LIST:
***** main circuit V1 1 0 DC 0 SIN( 0 1 1k 0 0) AC 1 0 R1 1 2 500 R2 2 0 10K R3 2 0 100K VAm1 2 3 0 R4 3 4 1.1K Ehre 4 0 5 0 -0.25m Fhfe 5 0 VAm1 50 R5 5 0 40K R6 5 0 1K .TF V(5) V1 .END

OBSERVATIONS ( OUTPUT): Input Impedance: 1.491k

Output Impedance: 968.108 Transfer Function: -29.151

PROCEDURE:

1. Rig up the circuit by appropriate devices from the menu titled devices. 2. Choose the wire drawing tool from the tool bar and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 1V amplitude, at a frequency of 1kHz is applied as the input. 5. Choose the show node names from the VIEW menu. 6. Give appropriate gain, controlling voltage nodes for VCVS and gain for CCCS. 7. Then choose set up simulation from simulation menu. 8. Select the Transfer function analysis. 9. Give input source and output voltage nodes in Transfer function dialog box. 10. Now run the simulation. 11. Note the values of input impedance, output impedance and transfer function. RESULT: Small signal analysis of CE amplifier was done and values of input impedance, output impedance and the transfer function were noted. Input Impedance: 1.491k Output Impedance: 968.108 Transfer Function: -29.151

CIRCUIT DIAGRAM ( HIGH FREQUENCY ANALYSIS OF CE AMPLIFIER )

R 44 M e g

R1
40

R2
100

C2 R3
1 .3 K

IV m 1 C1
100p 3p

R5
80K

G1

V1

TABULAR COLUMN:
S.No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Frequency in Hz 10 21.54 46.42 100 215.44 464.16 1.00k +2.15k +4.64k +10.00k +21.54k +46.42k +100.00k +215.44k +464.16k +1.00Meg +2.15Meg +4.64Meg +10.00Meg +21.54Meg +46.42Meg +100.00Meg +215.44Meg +464.16Meg +1.00G

V in (volts)
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

V0 (volts) 101.952 101.952 101.952 101.952 101.952 101.952 101.952 101.952 101.95 101.941 101.901 101.712 100.853 97.131 84.025 57.07 30.52 14.728 6.943 3.26 1.521 +707.098m +328.318m +152.403m +70.740m

Gain in dB 40.168 40.168 40.168 40.168 40.168 40.168 40.168 40.168 40.168 40.167 40.164 40.147 40.074 39.747 38.488 35.128 29.692 23.363 16.831 10.264 3.643 -3.01 -9.674 -16.34 -23.007

HIGH FREQUENCY ANALYSIS OF CE AMPLIFIER

Expt.No.7 Date: AIM

To determine the high frequency analysis of CE amplifier by using B2 SPICE.

NET LIST:
************************ * B2 Spice ************************ * B2 Spice default format (same as Berkeley Spice 3F format)

***** main circuit R1 1 2 40 R2 2 3 100 R3 3 0 1.3K C1 3 0 100p V1 1 0 DC 0 SIN( 0 1 1k 0 0) AC 26m 0 C2 3 4 3p R4 3 4 4Meg R5 4 0 80K G1 4 0 1 0 50m IVm1 4 0 0

.OPTIONS gmin = 1E-12 reltol = 1E-4 itl1 = 500 itl4 = 500 + rshunt = 1G .AC Dec 2 10 1000meg .END

F h i g h f r e q C E a m p - S m a l l S r ie gq un(e Hna czly) A C - 0 - G r a 1 0 . 0 0 0 1 0 0 . 0 0 0 1 .0 0 0 k 1 0 . 0 0 0 k 1 0 0 .0 0 0 k .0 0 0 M e1 g0 . 0 0 0 M 1 e0 g . 0 0 0 M 1e.0 0 0 G 1 0 g (db-V ) 40.000

30.000

20.000

10.000

0 .0

- 1 0 .0 0 0

- 2 0 .0 0 0

FR EQ

7 5 . 4 7 1 k D B ( v ( I V m 01. )0) 9 4 D ( F R E Q0 ). 0 4

D ( D B ( v (0I V0 m 1 ) ) ) .

PROCEDURE: 1. Regup the circuit as shown in figure by choosing appropriate devices from the menu titled devices 2. Choose the wire drawing tool from the tool bag and draw the lines. 3. Give the appropriate names and values for all elements present in the circuit. 4. An AC voltage source of 0 phase, 26mV amplitude, variable frequency is applied as input signal by editing the voltage source. 5. Give the appropriate gain for VCCS is 50m and control input voltage nodes. 6. Then choose set up simulation from simulation menu. 7. Choose the option of AC frequency analysis and give starting and ending frequency ranges. 8. Select the option of view table and view graph. 9. Now choose run simulation. 10. Observe the output frequency response graph and take the maximum gain and fT and f beta. 11. Note down the tabular column. Graph: A graph should be drawn by taking frequency on x-axis and gain in dB on y-axis. RESULT: The high frequency analysis of CE amplifier was done and frequency values were obtained. Maximum Gain = _______ dB f T ( Frequency at 1 dB Gain) = f beta ( Frequency at -3dB Gain) =