VLSI Trained Engineer

LOHITHA BOMMAREDDY
TECHNINICAL SKILLS

Xilinx ISE, Modelsim, Questa Sim. Electronic Design Packages Programming Languages Microcontrollers / FPGA Familiar Protocols Familiar OS C, Verilog, System Verilog. Xilinx FPGAs (Spartan6) FIFO, SPI ,AMBA. Windows 7

PROJECT WORK : PDC

#1 Design of a Five Stage Pipelined Mini- RSIC processor using Verilog HDL: Have designed and simulated the following Blocks and implemented it on Spartan 3E Starter Kit a. b. c. d. e. f. RAM 16bit wide 256 Locations ROM 16bit wide 256 Location ALU General Purpose Registers Program Counter Pipelining Registers

Tool Used: Xilinx ISE Language: Verilog HDL #2 Class Based Verification of four-bit Arbiter: Responsibilities: Developing a System Verilog based verification environment for a four-bit arbiter. Class based stimulus generator , BFM , scoreboard and monitor are developed for randomizing the test cases applied to DUT A reference model is developed in system verilog and same test cases are applied for DUT and Reference model .The results are compared in checker. Code coverage is applied and if there is any uncovered portion of code separate test cases are applied for achieving 100% coverage. Tool Used: Questa Sim Language: Systemverilog

Academic Projects:
Main Project: Title Team Size Software Hardware Interface Description : Security system using Voice Recognition. :4 : Embedded C.Keil, Proload programmer. : Voice module, LCD, D.C motor, buzzer, A.C devices. : Provide a secured and reliable environment to the user by providing

a unique identity to every user using the Voice Recognition. It is developed by integrating features of all the hardware components used presence of every module has been reasoned out and placed carefully thus contributing to the best working of the unit. Using highly advanced ICs and with the help of growing technology. Applications : Offices, Educational institutions, bus stations, railway stations.

Term paper Project Name Team Size Description : Steganography :4 : provide more security for the key information with the combination of

image compression and data encryption. Image steganography techniques of image domain (lossless) and Transform domain (lossy) are used to hide messages with more robust. In this compression plays an important role. Encrypt the message through the public or private key then place the key information in the compressed image, send it through internet to the destination, finally decompress image and extract key information. Applications : Banknotes, entertainment Industry, military etc.

PROFESSIONAL COURSES
Professional Development program on VLSI Design and Verification from Sandeepani School of VLSI Design, Bangalore

EDUCATION
Name of course /degree B.Tech University/Board S.V.V.S.N Engg Specialization Year Pass Out Electronics and 2011 Communication Engineering MPC 2007 Aggregate 73.4%

Affiliated to ANU, Guntur

10+2 Board Intermediate, Vijayawada Board of Education

75.5%

SSC

2005

78.5%

PERSONAL DETAILS
FATHERS NAME DOB CURRENT ADDRESS : B.Subba Reddy : 12-03-1988 : SaiRamaPG,1staevenue,2ndcross,Teachers Colony, HSR Layout 1st Block Koramangala, Bangalore, House no:#89 Karnataka, IND- 560034 : lohithanithyagmail.com : +91-8867562918

Email ID Contact No

DECLARATION
I do here by declare that all the above statements are true to the best of my knowledge and belief.
Place - Bangalore Date Signature of the candidate (LOHITHA BOMMAREDDY)