Sie sind auf Seite 1von 4

Abstract Modified inductance-capacitance voltage

controlled oscillator (LC-VCO) topology is presented in


this paper. NMOS only varactor has been used instead of
variable capacitance. The frequency of oscillation of the
VCO is 7.68GHz with a power dissipation of 5.68mW. The
designed oscillator is characterized by a tuning range of
26.73%.The design is verified using SPICE simulations.

Index Terms Inductance Capacitance-Voltage
Controlled Oscillator, Ultra-wideband frequency, VCO.

I. INTRODUCTION
Wave generators and voltage controlled oscillators (VCOs)
play a vital role in the field of electronics and communication
engineering. These have been used to generate signals from a
few hertz to several gigahertz. High frequency VCOs are an
integral part of various communication applications viz.
biomedical implant communication, mobile, satellite and
broadband communication etc [i]. Several researchers have
proposed high frequency VCOs. A 1.4GHz CMOS LC low
phase noise VCO using tapped bond wire inductances is
proposed by Ahrens and Lee [ii]. An optimized analytical
design of a 2.5GHz CMOS VCO is reported by Dehghani and
Atarodi [iii]. Wu and Jian [iv] have presented a CMOS LC-
VCO with novel negative impedance for wide-band operation.
Graphically optimized design of a 4GHz CMOS LC-VCO is
given by Issa et al [v].
Design of low power VCOs has also been reported in
literature. Linten [vi] has designed low-power VCOs in
standard CMOS technology. High quality thin lm post
processed inductors have been used in this design. Low power
low phase noise differentially tuned quadrature VCO is
designed in standard CMOS by Tiebout [vii]. Long et al [viii]
have proposed a 2.4GHz low power low phase noise CMOS
LC-VCO. A one volt ultra low power CMOS LC-VCO for
UHF quadrature signal generation is reported by Wang et al
[ix].
Even though significant amount of research work related to
VCO design has been carried out, VCO is still a challenging
component amongst radio frequency (RF) complementary
metal oxide semiconductor (CMOS) very large scale
integration (VLSI) designers [i,x]. The major issue in recent
VCO research is to achieve monolithic integration of VCO
with low-power consumption at higher frequencies [vii].
There are more stringent requirements imposed on VCOs as
the need for wireless communications like global system for
mobile telecommunication (GSM) and code division multiple
access (CDMA) is increasing and new applications are coming
into wireless market at higher frequencies [iii, vi]. The ultra
wideband (UWB) communication devices need to operate at
low power in GHz range. There is a need to reduce power for
operations in gigahertz frequency range, for developing
portable electronics and high frequency communication
gadgets. This has been a source of research and hence the
present work is a step in this direction.
An oscillator is a circuit consists of an amplifier and a
resonant element, as well as a feedback circuit. An amplifier is
an electrical circuit with a defined input and output impedance
which increases the level of the input signal to a
predetermined value at the output. The energy required for this
is taken from the DC power supply connected to the amplifier.
If in a negative-feedback system, the open-loop gain has a
total phase shift of 180
0
at some frequency w
0
, the system will
oscillate provided that frequency provided the open-loop gain
is unity. If the gain is less than unity at the frequency where
A 6.1-7.68 GHZ CMOS LC-Voltage Controlled
Oscillators (VCO)
D. Solanki, R. Chandel, T. Alam, A. Nishad and P. Sharma
Electronics & Communication Department, National Institute of Technology Hamirpur (H.P.)-India
mr.dhrubsolanki@gmail.com,rchandel@nitham.ac.in,talam.nith@gmail.com,atulnishad@hotmail.com, purnimasharma.1412@gmail.com


the phase shift is 180
0
, the system will be stable, whereas if
the gain is greater than unity, the system will be unstable. This
statement is not correct for some complicated systems, but it is
correct for those transfer functions normally encountered in
oscillator design. The conditions for stability are also known
as the Barkhausen criterion, which states that if the closed-
loop transfer function is as

0
1

i
V
V
(1)
where is the forward voltage gain and is the feedback
voltage gain, the system will oscillate provided that =1.
Design of LC-voltage controlled oscillators has posed
many challenges to radio frequency (RF) designers. The
design constraints are imposed on tuning range, start-up
condition, power consumption and phase noise. So it is
important to understand the specifications of the VCO
II. SPECIFICATIONS OF OSCILLATORS AND VCOS
The properties of an oscillator can be described in a set of
parameters. The following are the important and relevant
parameters as they needed to design an oscillatory circuit.
These parameter will be used for designing of the oscillator
circuit. In order to improve functionality of the oscillator these
specification will be decided accordingly. In order to design
an optimized design these parameter has to be satisfied.
Start-up Condition- The start-up condition constraint is to
guarantee enough of negative resistance generated by the
cross coupled pair transistors NMOS and PMOS to
compensate the tank resistance given by following relation as
follows as

tan
>
mn l k
g g (2)
Center Frequency - The output frequency of a VCO can vary
over a wide range. The center frequency is determined by the
architecture of the oscillator. A standard VCO has a center
frequency range typically the range of few MHz to GHz.

1
f

=
(3)
Power Consumption - The DC power, usually specified in
mille-watts and sometimes qualified by operating voltage,
required by the oscillator to function properly.

=
bias dd
P I V
(4)
Tuning Characteristic - This specification shows the
relationship between the VCO operating frequency and the
tuning voltage applied. Ideally correspondence between
operating frequency and tuning voltage is linear.
tan tan ,min 2
max
1
k k
L C
w
s (5)
tan tan ,max 2
max
1
k k
L C
w
> (6)

Output Power as a Function of Temperature - All active
circuits vary in performance as temperature range should vary
less than a specified value as a function of temperature.
Phase Noise - Unfortunately, oscillators do not generate
perfect signals. The various noise sources in and outside of the
transistor modulate the VCO, resulting in energy or spectral
distribution on both sides of the carrier. This occurs via
modulation and frequency conversion. The noise is expressed
as the ratio of output power divided by the noise power
relative to 1Hz bandwidth measured at an offset of the carrier.

2
0 2
( ) 10 log
2 sig
kT f
L f
P Q f
A =
A
(
| |
(
|
\ . (

(7)


III. RESULT AND DISCUSSIONS
The complementary -g
m
oscillator consists of PEMOS and
NEMOS cross-coupled transistors in parallel to generate the
negative resistance. Fig. 1 shows the complementary LC-VCO
circuit using varactor [v]. In this technique instead of using the
NEMOS and PEMOS directly a varactor is used which is
capable of reducing parasitic significantly. Here the negative
compensating resistance is implemented by the cross coupled
arrangement of NEMOS M1, M2 and PEMOS M3 and M4
[viii]. The transistors M5, M6, M7 and M8 are arranged in
order to function as varactor. It can be seen in Fig. 1 that
instead of using NEMOS as current source directly (as in case
of VCO circuit in Fig. 1 NEMOS M3), an independent current


source (Ibias) is used in order to have exact values of negative
resistance [v]. The transistors M1, M2, M3 and M4 are
connected in cross coupled fashion in order to further reduce
parasitic present in the circuit due to use of inductors L1 and
L2.














The modified VCO considered in this work has been
simulated and its performance is analyzed. SPICE simulations
are carried out for 180nm technology node for supply voltage
1.8V [xv-xvi].
The phase noise of the LC-VCO has been analyzed. Phase
noise is the frequency domain representation of rapid, short-
term, random fluctuations in the phase of a waveform, caused
by time domain instabilities. For this linear time varying
(LTV) noise model has been used to calculated noise [ii].
2
0 2
( ) 10log
2 sig
kT f
L f
P Q f
A =
A
(
| |
(
|
\ . (



Fig. 2 shows LTI phase noise using eq.(7). The offset
frequency f
o
been varied from 1Hz to 1kHz. The phase noise
can be approximated at an offset of 1kHz as -175 dBc/Hz.






















Figure of merit (FOM) takes all important VCO parameters
like power, phase noise and oscillation frequency into account.
FOM is given as [v]:


0 20 log( / ) ( ) 10 log FOM f f L f P = A A

(8)

Using eq.(8) in order to decide the roll-off between various
improvement constraints the FOM factor has been evaluated
for frequency of oscillation of 7.68GHz with a power
dissipation of 5.68mW and a phase noise of -175 dBc/Hz at
1kHz offset. FOM is found out to be 185.



















Fig. 1. Modified LC-VCO Schematic
Vbias1
Vbias1
Vbias2
M12
NMOS
M11
NMOS
VDD
L1 L2
Out
M4
NMOS
M3
NMOS
M1
NMOS
M2
NMOS
Vtune
Out1
M5
NMOS
M7
NMOS
M9
NMOS
M10
NMOS
M8
NMOS
M6
NMOS
VDD
Fig. 3. Tuning Range of LC-VCO
6
6.4
6.8
7.2
7.6
8
0.3 0.6 0.9 1.2 1.5 1.8
F
r
e
q
u
e
n
c
y

(
G
H
z
)
Control Voltage (V)
VCO Tuning Range
Frequency


Fig. 2. Phase Noise of the Proposed LC-VCO


The tuning range of nearly 26.73% in the frequency of
oscillation with control voltage varying from 0.5V to 1.8V
[xvii] of LC-VCO is obtained as seen in Fig. 3.
IV. CONCLUSION
The modified VCO presented in this work is implemented in
CMOS TSMC 0.18m process and is designed using a
negative-resistance accompanied by NMOS-only varactor to
increase the tuning range. In addition to the reduced supply
voltage and achieving low power consumption, the proposed
technique also improves the phase noise. The phase noise is -
175 dBc/Hz at 1kHz offset, the tuning range is
6.06GHz~7.68GHz (26.73%) and the power consumption is
5.68 mW for 1.8V supply voltage.
REFERENCES

[i] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits.
Cambridge, U.K.: Cambridge Univ. Press, 1998.
[ii] T.I. Ahrens, and T.H. Lee, A 1.4GHz, 3mW CMOS LC low phase noise
VCO using tapped bond wire inductances, in Proc. of Int. Sym. on Low
Power Electronics and Design- ISLPED, pp. 16-19, Aug. 1998.
[iii] R. Dehghani and S.M. Atarodi, Optimised analytic designed 2.5GHz
CMOS VCO, Electronic Letters, vol.39, no.16, pp. 1160-1162, Aug.
2003.
[iv] C.H. Wu, and G.X Jian, A CMOS LC VCO with Novel Negative
Impedance Design for Wide-Band Operation, IEEE Radio Frequency
Integrated Circuits Symposium (RFIC), pp. 537 540, 2010.
[v] D.B. Issa, S. Akacha, A. Kachouri and M. Samet, Graphical
Optimization of 4GHz CMOS LC-VCO, Design & Technology of
Integrated Systems in Nanoscale Era 2009, pp. 33-37, May 2009.
[vi] D. Linten, et al., Low-power voltage-controlled oscillators in 90-nm
CMOS using high-quality thin-lm post processed inductors, IEEE
Journal of Solid State Circuits (JSSC), vol 40, no.9, pp.19221931, Sep.
2005.
[vii] M. Tiebout, Low-power low-phase-noise differentially tuned
quadrature VCO design in standard CMOS, IEEE J.Solid-State Circuits,
vol.36, no.7, pp.1018-1024, July 2001.
[viii] J. Long, J.Y. Foo and R.J. Weber, A 2.4GHz Low-Power Low-Phase-
Noise CMOS LC VCO, IEEE Computer Society Annual Symposium on
VLSI Emerging Trends in VLSI Systems Design (ISVLSI04), pp. 213
214, Feb. 2004.
[ix] Z. Wang, H.S. Savci, N.S. Dogan, 1-V Ultra-Low-Power CMOS LC
VCO for UHF Quadrature Signal Generation, IEEE International
Symposium on Circuits and Systems, pp. 4022-4025, Sep. 2006.
[x] K. Kundert, Introduction to RF simulation and its application,
Bipolar/BiCMOS Circuits and Technology Meeting, pp. 67-78, Sep.
1998.
[xi] S.M. Kang, and Y. Leblebici, CMOS Digital Integrated Circuits -
Analysis and Design, Third ed., TMH, 2003.
[xii] J.M. Rabaey, and M. Pedram, Low Power Design Methodologies, Fifth
ed., Kluwer Academic Publishers, 2002.
[xiii] R. Chandel, S. Sarkar, and R.P. Agarwal, Delay and Power
Management of Voltage-Scaled Repeaters for Long Interconnects,
International Journal of Modelling & Simulation, ACTA Press, Canada,
vol. 27, no. 4, pp. 333-339, 2007.
[xiv] S. Naik, and R. Chandel, Design of A Low Power Flip-Flop Using
CMOS Deep Submicron Technology, IEEE Conf. on Recent Trends in
Information, Telecommunication and Computing (ITC), 253 256, Mar.
2010.
[xv] F. Assaderaghi, et al., A Dynamic Threshold Voltage MOSFET
(DTMOS) for Ultra-Low Voltage Operation, IEDM Technical Digest,
pp. 809-812, Dec. 1994.
[xvi] F. Assaderaghi, et al., Dynamic Threshold Voltage MOSFET
(DTMOS) for Ultra-Low Voltage VLSI, IEEE Transactions on Electron
Devices, vol. 44, no. 3, pp. 414-422, March 1997.
[xvii] MOSIS Service for HSPICE models. Online: http://www.mosis.org
[xviii] EDA tool used. Online: http://www.tanner.com