Part-B 1. Design a 4-bit adder circuit using full adders and explain its function. (8) 2.

What are the special registers in a typical computer? Explain their purposes in detail.(8) 3. Design a 4-bit fast adder and explain its function in detail. (8) 4. Describe the different classes of instruction format with example.(16) 5. Write notes on Instruction formats. (8)/(16) 6. Explain about Instruction types& Instruction Sequencing? (16) 7. Describe Von Neumann Architecture (IAS Computer) in detail.(16) 8. Explain in detail about the first generation of computer.(8) 9. Explain the different types of Addressing modes with suitable examples.(8) 10. Registers R1 and R2 of a computer contains the decimal values 1200 and 2400 respectively. What is the effective address of the memory operand in each of the following instructions? a. Load 20(R1), R5 b. Add (R2) , R5 c. Move #3000, R5 d. Sub (R1)+, R5 (10)

11. With a neat block diagram explain in detail about typical CPU.(8) 12. With a neat block diagram explain the Accumulator based CPU.(10) 13. What are the different ways system can be designed? Explain in detail.(16) 14. Design a combinational circuit with suitable example.(12) 15. Design a 4-bit subtracter circuit using full adders and explain its function.(16) 16. For the given expression design a gate level circuit realization using AND and OR logic gates S0=(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1) + ( x0,y0,c-1)+( x0,y0,c-1) (16)

17. For the given expression design a gate level circuit realization using NAND and NOR and NOT logic gates S0=(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1)+(x0,y0,c-1) + ( x0,y0,c-1)+( x0,y0,c-1) (16) (16)

18. Write short notes on multiplexers,counters,decoders with neat diagram.

19. Write the structural and behavioral description for full adder. 20. Identify and write the special features of FPGA with design. (8)

(16)

PART B 1. Illustrate Booth Algorithm with an example. (16)

2. Design a 4-bit Carry-Look ahead Adder and explain its operation with an example. (10) 3. Draw the diagram of a carry look ahead adder and explain the carry look ahead adder principle. (8) (8)

4. Design a 4-bit binary adder and explain its functions.

5. Give the algorithm for multiplication of signed 2s complement numbers and illustrate with an example. (16)

6. Write the algorithm for division of floating point numbers and illustrate with an example. Explain the working of a floating point adder and subtractor.Explain how floating point addition and subtraction is performed. (16) (8) (10)

7. Give the IEEE standard double precision floating point format. 8. Explain the representation of floating point numbers in detail.

9. Design a 4-stage instruction pipeline and show how its performance is improved over sequential execution. (10) 10. Explain Booth multiplication (2s complement)algorithm and using this algorithm

perform the multiplication on the following 6-bit unsigned integer 110011 * 101100. (8) 11. Explain Robertson algorithm and using this algorithm perform the multiplication on the following 8-bit unsigned integer 10101010 * 11001110. (16)

12. Using Booth algorithm perform the multiplication on the following 8-bit unsigned integer 10110011 * 11010101 (16)

13. Using Robertson algorithm perform the multiplication on the following 8-bit unsigned integer 10110011 * 11010101 (16)

14. Explain non restoring division algorithm and using this algorithm perform the division on the following 4-bit unsigned integer 1111 / 0011. (8)

15. With a neat block diagram explain in detail about Combinational, sequential ALU and the expansion of ALU. (16)

16. With a neat block diagram explain in detail about the coprocessor. (10) 17. Explain modified Booth algorithm with an example. 18. Multiply the following pair of signed 2's (12) complement numbers using

the Booth algorithm : A = 010111 (Multiplicand) B = 110110 (Multiplier) (16)

19. How a 4-bit adder can be converted into 16-bit adder ,give the design with explanation and necessary equations. (8) (8) (8)

20. Write short notes on pipelined multipliers.

21. List the difficulties of floating point arithmetic.

22. Design a n-bit parallel adder which could perform Z=X+Y and Z=X-Y, give explanation. (8) PART B (16 MARKS)

1. Explain the Organization of Hardwired control in detail. 2. Explain the Organization of Micro programmed control unit in detail. 3. List the differences between hardwired control and micro programmed control? 4. Explain Microprogrammed Control Unit. What are the advantages and

disadvantages of it? 5. a)Explain about Superscalar Operation. b) Write short notes on Nanoprogramming 6. Explain the performance of pipelining. 7. Explain about Multiplier control unit. 8. Explain about CPU control unit. 9. Explain pipeline control in detail along with performance issues. 10. Illustrate with suitable example how far instruction pipeline is efficient than sequential execution. 11. Compare sequential,pipelined and super scalar processor execution. 12. How do you optimize a pipeline performance what are the control schemes used. 13. Write short notes on dynamic scheduling of instructions.

14. a)Write notes on emulator.(8) b)Write detailed notes on sequencer. (8) 15. Write the problems encountered in branch instructions and how it is overcome. 16. Write notes on the hazards/dependencies in pipeline and how they are overcome. 17. Write the different factors that influence the performance of pipeline and explain each in detail. 18. Compare pipeline performance with the Power PC/Super scalar processor. PART-B (16 MARKS)

1. Discuss the various mapping techniques used in cache memories. 2. Explain the concept of virtual memory with any one virtual memory management technique. 3. Give the basic cell of an associative memory and explain its operation. Show how associative memories can be constructed using this basic cell. 4. Give the structure of semiconductor RAM memories. Explain the read and write operations in detail. 5. a)Explain the organization of magnetic disks in detail. (8) b)Write a short note on PCI. (8) 6. a)Explain the concept of memory hierarchy. (6) b)Explain about the secondary storage devices. (10) 7. Describe the performance consideration of cache memory.(8) 8. Explain the virtual memory address translation and TLB with necessary diagram. 9. Explain the basic concepts of memory system.(8) 10. Write note on: a) ROM technologies. (6)

b) Set associative mapping of cache. (10) 11. a)Explain the performance factors in RAM memory.(8) b) Write about semiconductor memories. (8)

12. Discuss the organization of RAM in detail. 13. a)Write notes on fast RAM interfaces. (8)

b) Write short notes on preemptive memory allocation. (8) 14. a)Explain the organization of serial access memories. (10) (6)

b)Explain magnetic surface recording mechanism in detail.

15. Write notes on magnetic tape memories and magnetic disk memories. 16. a)In detail explain optical memories and their advantages. b)List the general characteristics of multilevel memories. (10) (6)

17. a)How is the cost and performance of multilevel memories measured.(8) b)Write about associative memory. (8)

18. Write detailed notes on memory allocation. 19. With suitable example explain FIFO, LRU and optimal page replacement policies. 20. Explain cache and virtual memory. 21. Consider the following page-address trace with a capacity of three pages. Which of the following page-replacement policies FIFO or LRU or optimal is more suitable in this case? Show your calculation and give the justification for your answer. 1 6 4 5 1 4 3 2 1 2 1 4 6 7 4 1 3 1 7 PART-B
1. Explain how DMA transfer is accomplished with a neat diagram. 2. Illustrate with timing diagrams the working of synchronous and asynchronous

data transfer for READ and WRITE in a bus.

3. Write about the transistor circuit technology used for bus interfacing. 4. Compare the three mechanisms of bus arbitration. 5. Write about PCI and its standard signals. 6. With a neat timing diagram give the data transfer transaction for memory read

through a PCI bus.

7. Explain the various IO control methods. 8. Draw the typical block diagram of a DMA controller and explain how it is used

for direct data transfer between memory and peripherals.

9. Explain the use of vectored interrupts in processors. Why is priority handling

desired in interrupt controllers? How do the different priority schemes work?

10. Write short notes on: i) DMA. ii)Bus Arbitration 11. Write about PCI and pipeline interrupts. 12. Explain different mechanisms used for bus arbitration. 13. Write short notes on IOP. 14. Explain the condition mutual exclusion and deadlock in operating system. 15. Discuss various techniques used for fault tolerance. 16. What are the different ways in which redundancy can be made use of provide

fault tolerance?
17. Write short notes on Programmed I/O. 18. Compare CISC and RISC.