SPICE Tutorial The HSPICE reference manual is on the tutorials webpage This manual should not be needed for

class assignments, but is available if you are interested in using advanced HSPICE simulation options. HSPICE simulations are run by typing hspice inverter.cir > inverter.out, where i nverter.cir is the name of the SPICE stack file and the output is redirected to a file called inverter.out. SPICE Stack A sample SPICE stack containing the description of a CMOS inverter in a 250n m TSMC process is given below: CMOS Inverter .lib 'models25.txt' TT mn1 VSS IN OUT VSS nmos l=0.24u w=0.72u mp1 VDD IN OUT VDD pmos l=0.24u w=0.72u cLoad OUT VSS 50fF vVDD VDD 0 2.5 vVSS VSS 0 0 vIN IN 0 pulse( 0 2.5 100ps 100ps 100ps 2ns 4ns ) .dc vIN start=0 stop=2.5 step=0.01 .tran 1ps 8ns .option post .end The same SPICE stack for a 180nm TSMC CMOS process is given below: CMOS Inverter .lib 'models18.txt' MOS mn1 VSS IN OUT VSS nmos l=0.18u w=0.27u mp1 VDD IN OUT VDD pmos l=0.18u w=0.36u cLoad OUT VSS 50fF vVDD VDD 0 1.8 vVSS VSS 0 0 vIN IN 0 pulse( 0 1.8 100ps 100ps 100ps 2ns 4ns ) .dc vIN start=0 stop=1.8 step=0.01 .tran 1ps 8ns .option post .end

The first line of the SPICE stack is always a comment line. Therefore any st atements on this line will be ignored. The .include line includes the file models.txt, which is assumed to be in th e current directory. The next two lines are an nmos and a pmos transistor. After the transistor n ame (which must begin with m), the source, gate, drain, and bulk nodes are given . Next is the model. The length and width are specified. For a 0.25um process, t he minimum gate length is 0.24um. For a 0.18um process, the minimum length if 0. 18um. Source and drain perimeters and areas can also be specified here. A capacitor of 50fF from node OUT to node VSS is given on the next line. The two supply nets are defined next. A pulse voltage source is defined from 0 to VDD with 100ps delay, 100ps rise time, 100ps fall time, 2n pulse width, and 4ns repetition period. .tran indicates a transient analysis with a plot interval of 1ps and simulat ion duration of 8ns .dc indicates a dc sweep of a certain parameter. Here the input voltage is s wept to give a voltage transfer curve (VTC). .option post instructs HSPICE to write an output file ending in .tr0 contain ing the simulation waveforms. .end signifies the end of the SPICE stack. Several files are created by HSPICE: inverter.ic: Text file containing the circuit initial conditions inverter.st0: Text file containing a summary of the simulation inverter.sw0: Binary file containing dc sweep waveforms (Open this file from cscope to get the VTC) inverter.tr0: Binary file containing transient analysis waveforms The waveforms can be viewed using CosmosScope. Type cscope to load the resul ts. The following window will appear. Click on File > Open > Plotfiles. Click on inverter.tr0, the file that conta ins the transient analysis. The inverter Plot File window will open up. In the inverter Plot File window, plot v(in) by double clicking v(in), or by selecting v(in) and clicking Graph The input waveform to the inverter will open up. To open v(out) in the same graph as the v(in) signal, select v(out) from the inverter Plot File window, and then double-click in the graph window. You can a lso do this by selecting v(out), right-clicking in the graph window and selectin g Plot Zoom in to 2u and 4u by moving the cursor to the x-axis, clicking 2u, and dr agging it to 4u