Beruflich Dokumente
Kultur Dokumente
A phase-locked loop (PLL) is an electronic circuit that controls an oscillator so that it maintains a constant phase angle relative to a reference signal. In communications, the oscillator is usually at the receiver, and the reference signal is extracted from the signal received from the remote transmitter. Phase-locked loops are widely used in space communications for coherent carrier tracking and threshold extension, bit synchronization, and symbol synchronization.
When a signal is first received, the regenerated clock and the received signal will not be aligned. (This happens at the start of an Ethernet frame, since the receiver has no knowledge of which transmitter sent the frame, and therefore the frequency and phase of the received clock signal). The loop starts to track the received signal, and eventually locks-in to the required signal, allowing it to find the center of each received data bit, and reliably decode the received information. Knowing that this process takes time, many systems (including Ethernet) employ a preamble which contains a well-known and
simple data pattern which increases the speed at which the DPLL gains lock of the clock signal.
Preamble
When data are sent in frames and a DPLL used to regenerate timing (e.g. in Ethernet), the DPLL needs to acquire lock before the start of the first data bit within a frame. To acquire lock, requires the DPLL to receive bits, the start of each frame is therefore often prefixed by a set of bits designed to ensure the locking of the DPLL, this is called the "preamble". In Ethernet, the rpeamble consist of 8 bytes, the last of which has a special sequence, known as the Start of Frame Delimiter (SFD) which indicates that actual information follows this.