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Eq. 1 4' & R[ 6 is defined in the weak inversion regime, as the variation of gate voltage necessary for producing 1 decade change in the drain current, as in Eq.2. Eq. 2 6 = 9* = N7 ln(10) 1 1 4' log , T & ' 2; 6 The modelling of 6 thus relies on the calculation of the YDULDWLRQ of depletion charge respective to the variation of surface potential. As 6 is defined in the weak inversion regime, 4' will be evaluated for 6 varying from ) to ).
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As shown in [5], it is sufficient to solve the Poisson Equation only along the locus of minima of potential, replacing the real doping by the equivalent doping 1 [ Eq. 3 2 T 1 * ( [) = 2 [ where 1 [ is defined as: 2 2 9 * Eq. 4 1 * ([ ) = 1 ([ ) 6L 2 = 1 ( [ ) 6L '6 T \ T/2 ([ ) when supposing \ to be parabolic, that also leads to: * Eq. 5 9'6 = 9 '6 + 2 (9EL )+ 2 (9EL )(9'6 + 9EL ) /[ corresponds to the length of electrical field line field, as represented in Figure 1. In order to solve analytically the problems, the first assumption is to approximate /[ by: Eq. 6 /([ ) = /HII for [ ; M
VL

The understanding of the behaviour of the threshold voltage Vth and the subthreshold slope S with technological parameters is of first importance. Indeed, the leakage current Ioff mainly depends on both. It is also quite clear that the Vth should be controlled through the optimisation of channel doping and/or through the use of shallow junctions. Nevertheless, although extensively studied [1][2][3][4] and intuitively accepted, the link between the degradation of S and the device architecture (channel length and junction depth) has never been analytically modelled.



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Our analysis is based on the Voltage Doping Transformation (VDT) [5], a quasi-2D approach which already succeed in the explanation and interpretation of various phenomena, such as bulk punchthrough [6]. It was also successfully applied to the modelling of Vth, for various architectures like pockets and retrograde channels [7]. The basic idea of this model is to replace the 2D solving of Poisson Equation by a 1D solution, enabled by the replacement of the 2[\ term by an equivalent reduction in channel doping [5].

/([ ) = for [ > ; M

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The Vth is usually determined by the total depletion charge 4' when the surface potential 6 reachs ):

The second assumption is to consider that the dependence of 9 '6 on the potential [ in the channel is weak. Consequently, 9 '6 will be supposed constant in the layer comprised between [  and ;M. It will be expressed as a function of the surface potential S, pondered by a factor that will account for the averaged equivalent doping in the whole layer: * 9 '6 ( 6) = 9'6 + 2( 9EL 6 ) Eq. 7 + 2 ( 9EL 6 )(9 '6 + 9EL 6 ) Finally, for [;M, 1 [ is approximated by 1 F for 6 ) and by 1 F for 6 ), using Eq. 4, Eq. 6 and

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T (1F 1 *F1 ) ;M 2 + 2 ) VL 1F T ; (1 *F 1 *F ) M 1 2 T 1F It should be noticed that 4 is a variation of DQ HTXLYDOHQW GHSOHWLRQ FKDUJH 1 [, rather than that of the real depletion charge 1 in the channel of transistor. Moreover, 9WK can be directly obtained from Eq. 1, introducing the depletion charge 4 (evaluated for 6  2)), as done in [6].
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Finally, according to Eq. 1, 9WK becomes: Eq. 11 4 97 = 06 + 2 ) + 2 & R[ where 06 is adjusted to fit on long channel 9WK. In a similar way, 6 is obtained from Eq. 2:
6 = N7 ln(10) 1 1 4 T &2; )

Figure 1: schematic of the simulated and modelled structure.

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Now, Eq. 3 can be analytically solved in order to calculate the depletion widths (respectively Z and Z) and depletion charges (resp. 4G and 4G) corresponding to the respectively surface potentials 6 ) and 6 2),. It should be noticed that the junction depth is clearly taken into account in the calculation, leading to 3 cases: -FDVH  :the depletion widths Z and Z are smaller than the junction depth ;M: Eq. 8 2 ) VL 4 ) VL
T 1 *F1 < ; M, T 1 *F2 < ;M

Eq. 12

where accounts for the discrepancy between simulation and model (for example the electrical 7R[ or the inversion layer width).



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then Z1 =

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6 VL 2 ) VL , Z2 = * T 1 F1 T 1 *F2 -FDVH : Z is smaller than ;M, Z is larger than ;M: Eq. 9 2 ) VL 4 ) VL

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; M,

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As set of simulations was performed in order to validate this model, using the electrical solver DESSIS from ISE. The structure simulated is a NMOSFET defined with the parameters reported in the Figure 1, with 1F=5.1023at/m3, ;M varying from 20 to 200nm, /HII varying from 0.1 to 0.4m, 7R[=4.0nm, 9GG=1.8V. The extracted parameters are the subthreshold slope 6 and the threshold voltage 9WK for a constant current level of 0.1A/m, both at 9G=1.8V.

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The 9WK results are plotted in Figure 2, showing a very good agreement between simulation and model. Eq. 10
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- FDVH  Z and Z are both larger than ;M:

if 2 ) VL 4 ) VL ; M, ;M T 1 *F1 T 1 *F2

then Z1 = Z2 =

T 1F 1 *F1 ; M + 2 ) VL
2

T 1F T 1F 1 *F2 ; M + 2 2 ) VL
2

T 1F

The variation of the depletion charge 4 4G4G is then calculated, for the 3 above-defined cases:
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2) 4 = T

T (1F 1 *F2 ) ; M 2 + 2 2) VL * 1 F2 T 1F
T ;M
* 2

) (1F 1 F ) T 2T 1 F VL 1 F
* * 1 1

Figure 2: comparison for Vth between model (lines) and simulation (dots). MS=-0.93V, =0.55. As shown in [6], the decrease of 9WK with shorter /HII is well explained by the reduction of the equivalent doping 1 F shown in Figure 3.

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The global behaviour of 6 as a function of /HII and ;M is well explained. Moreover, there is only one significant fitting parameter , the same for 9WK and 6. The correction factor (for the slope) nearly equals to 1, is also a good indicator of the validity of our approach. Contrary to Vth, the behaviour of 6 is quite complex, (Figure 5). For sufficiently deep junction, 6 exhibits an initial improvement, before the classical degradation for very short lengths. On the other hand, shallow junctions lead to a monotonic increase in 6 when channel length decreases.
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Figure 3: evolution of the equivalent doping N* with gate length (model), =0.55. Moreover, it should be noticed (see Figure 3) that the transformed doping 1 F (corresponding to a surface potential 6 )) is always lower that the transformed doping 1 F (corresponding to 6 )), which will be of a great importance for explaining the sub-threshold slope behaviour.
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Figure 6: evolution of Q for different Xj. According to Eq. 12, the whole evolution of S is directly linked to the variation of 4 with Leff. The nonmonotonic behaviour of 4 (Figure 6) comes from the evolution of equivalent doping 1 F and 1 F (Figure 3) associated to the evolution of the depletion widths Z and Z (Figure 7).
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Figure 4: evolution of depletion width w2 (S=2F) for different junction depth Xj. Moreover, Figure 4 shows that a deeper junction means a wider layer with reduced doping. The corresponding decrease of the total depletion charge 4 explains the increase of Short Channel Effects (SCE).

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The results for 6 are reported in Figure 5, exhibiting a good agreement between simulation and model, in spite of the very rough approximation used for the equivalent doping.
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Figure 5: comparison for S between model (lines) and simulation (dots), =0.97, =0.55.

Figure 7: evolution of depletion width w1 (S=F) and w2 (S=2F) for different Xj. In order to explain the 6 behaviour, we will consider 4 cases, corresponding to a medium length (/HII=0.35m, Figure 8) and to a short length (/HII=0.14m, Figure 9) transistor, for two junction depths ;M. For medium or long transistors when 6 rises from ) to ), the increment of depletion charge 4 emerges mainly in depth (far from interface, see Figure 8), corresponding to the classical understanding. Moreover, depending on ;M; the depletion width extends beyond (deep junction) or above (shallow junction) the junction depth. For long transistors, the transformed dopings 1 F and 1 F are nearly equal to the initial doping 1F (whatever ;M) thus leading to similar slope 6 for both ;M. (44). For shorter transistors, Figure 9 shows that the increase 4 is shared between an increase at the depletion edge and an increase in depletion charge near the interface.

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consisting in replacing the real doping by an equivalent one including the SCE, is validated by 2D electrical simulations. It is shown that the degradation of the 6 for short gate lengths can be interpreted as the increase of the equivalent 4 controlled by the gate. We hope that in the further step, this physical model will be simplified and implemented into CAD models.
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(b) Figure 8: Q variation between S=F and S=2F, for Leff=0.35m. This second term is due to the difference between 1 F and 1 F. Thus the continuous degradation of 6 for shallow junction is due to the additional depletion charge (resulting from the increase of equivalent doping 1 F when 6 increases from ) to ), see Figure 9-a). The total depletion charge increases (4>4), since the slightly decreases of depletion charge at the depletion edge is compensated by a larger increases of depletion charge at the surface (due to 1 F>>1 F). For deep junction (see Figure 9-b), the improvement in 6 is due to the compensation of the increase of equivalent doping near the interface by the decrease of equivalent charge at the depletion edge (4<4, mainly due to the lowering of the doping level 1 F, compare Figure 8-b and Figure 9-b). The final degradation of 6 indicates that the first term (worsening 6) prevails over the second term (improving 6) for very short transistors. This means that 4>>4 (see Figure 9-c).

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The limitations of the model are mainly due to the rough approximation used for the 1 [ and thus for the calculation of the depletion width. Indeed, as shown in Figure 7, Z and Z increase for deeper junction. For ;M=100nm (diamond symbols), and /HII lower than 0.12m, Z becomes lower than Z, which is physical meaningless. For further development, this limitation can be bypassed using a better approximation for in the channel.



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We have proposed a full physical understanding of 6 behaviour (and also that of 9WK), taking into account the impact of junction depth. Our analytical approach,

[1] B.Eitan HW DO., IEEE TED, Vol. 29, No 2, Feb. 1982, pp. 254-265 [2] K-Y.Fu HW DO., IEEE TED, Vol. 44, No 5, May 1997, pp. 847-855 [3] J.S.Fu., IEEE TED, Vol. 31, No 4, April 1984, pp. 440-447 [4 ] E.P.Vandamme HW DO, IEEE EDL, Vol. 18, No 6, August 1997, pp.369-371 [5] T.Skotnicki HW DO, IEEE TED, Vol. 35, No 7, July 1988, pp. 1076-1086 [6] T.Skotnicki HW DO, IEEE EDL, Vol. 9, No 3, March 1988, pp. 109-112 [7] R.Gwoziecki HW DO, IEEE TED, Vol. 46, No 7, July 1999, pp.1551-1561

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