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GOKARAJURANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

QUESTION & ANSWERS FOR MICROCONTROLLERS AND ITS APPLICATIONS BTECH IV-I SEMESTER (ECE A & B)

N SWETHA Asst. Professor ECE Dept.

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UNIT II INSTRUCTION SET OF 8051

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INTRODUCTION
Here is a list of the operands and their meanings:

A - accumulator; Rn - is one of working registers (R0-R7) in the currently active RAM memory bank; Direct - is any 8-bit address register of RAM. It can be any general-purpose register or a SFR (I/O port, control register etc.); @Ri - is indirect internal or external RAM location addressed by register R0 or R1; #data - is an 8-bit constant included in instruction (0-255); #data16 - is a 16-bit constant included as bytes 2 and 3 in instruction (0-65535); addr16 - is a 16-bit address. May be anywhere within 64KB of program memory; addr11 - is an 11-bit address. May be within the same 2KB page of program memory as the first byte of the following instruction; rel - is the address of a close memory location (from -128 to +127 relative to the first byte of the following instruction). On the basis of it, assembler computes the value to add or subtract from the number currently stored in the program counter; bit - is any bit-addressable I/O pin, control or status bit; and C - is carry flag of the status register (register PSW).

Q. Classify the instruction set of 8051 and list out the instructions in each type. Sol: Depending on operation they perform, all instructions are divided in several groups:

Arithmetic Instructions Branch Instructions Data Transfer Instructions Logic Instructions Bit-oriented Instructions

The first part of each instruction, called MNEMONIC refers to the operation an instruction performs (copy, addition, logic operation etc.). Mnemonics are abbreviations of the name of operation being executed. For example:

INC R1 - Means: Increment register R1 (increment register R1); LJMP LAB5 - Means: Long Jump LAB5 (long jump to the address marked as LAB5); JNZ LOOP - Means: Jump if Not Zero LOOP (if the number in the accumulator is not 0, jump to the address marked as LOOP);

The other part of instruction, called OPERAND is separated from mnemonic by at least one whitespace and defines data being processed by instructions. Some of the instructions have no operand, while some of them have one, two or three. If there is more than one operand in an instruction, they are separated by a comma. For example:

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RET - return from a subroutine; JZ TEMP - if the number in the accumulator is not 0, jump to the address marked as TEMP; ADD A,R3 - add R3 and accumulator; CJNE A,#20,LOOP - compare accumulator with 20. If they are not equal, jump to the address marked as LOOP;

Arithmetic instructions Arithmetic instructions perform several basic operations such as addition, subtraction, division, multiplication etc. After execution, the result is stored in the first operand. For example: ADD A,R1 - The result of addition (A+R1) will be stored in the accumulator. Arithmetic Instructions Mnemonic ADD A,Rn Description Adds the register to the accumulator

ADD A,direct Adds the direct byte to the accumulator ADD A,@Ri Adds the indirect RAM to the accumulator ADD A,#data Adds the immediate data to the accumulator

ADDC A,Rn Adds the register to the accumulator with a carry flag ADDC A,direct ADDC A,@Ri ADDC A,#data SUBB A,Rn SUBB A,direct SUBB A,@Ri SUBB A,#data INC A INC Rn Adds the direct byte to the accumulator with a carry flag Adds the indirect RAM to the accumulator with a carry flag Adds the immediate data to the accumulator with a carry flag Subtracts the register from the accumulator with a borrow Subtracts the direct byte from the accumulator with a borrow Subtracts the indirect RAM from the accumulator with a borrow Subtracts the immediate data from the accumulator with a borrow Increments the accumulator by 1 Increments the register by 1

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INC Rx INC @Ri DEC A DEC Rn DEC Rx DEC @Ri INC DPTR MUL AB DIV AB DA A

Increments the direct byte by 1 Increments the indirect RAM by 1 Decrements the accumulator by 1 Decrements the register by 1 Decrements the direct byte by 1 Decrements the indirect RAM by 1 Increments the Data Pointer by 1 Multiplies A and B Divides A by B Decimal adjustment of the accumulator according to BCD code

Branch Instructions There are two kinds of branch instructions: Unconditional jump instructions: upon their execution a jump to a new location from where the program continues execution is executed. Conditional jump instructions: a jump to a new program location is executed only if a specified condition is met. Otherwise, the program normally proceeds with the next instruction. Mnemonic ACALL addr11 LCALL addr16 RET RETI AJMP addr11 Description Absolute subroutine call Long subroutine call

Returns from subroutine Returns from interrupt subroutine Absolute jump

LJMP addr16 Long jump SJMP rel Short jump (from 128 to +127 locations relative to the following instruction)

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JC rel JNC rel JB bit,rel JBC bit,rel

Jump if carry flag is set. Short jump. Jump if carry flag is not set. Short jump. Jump if direct bit is set. Short jump. Jump if direct bit is set and clears bit. Short jump. Jump indirect relative to the DPTR

JMP @A+DPTR JZ rel JNZ rel CJNE A,direct,rel jump. CJNE A,#data,rel

Jump if the accumulator is zero. Short jump. Jump if the accumulator is not zero. Short jump. Compares direct byte to the accumulator and jumps if not equal. Short

Compares immediate data to the accumulator and jumps if not equal. Shortjump.

CJNE Rn,#data,rel Compares immediate data to the register and jumps if not equal. Short jump. CJNE @Ri,#data,rel Compares immediate data to indirect register and jumps if not equal. Short jump. DJNZ Rn,rel DJNZ Rx,rel NOP Decrements register and jumps if not 0. Short jump. Decrements direct byte and jump if not 0. Short jump. No operation

Data Transfer Instructions Data transfer instructions move the content of one register to another. The register the content of which is moved remains unchanged. If they have the suffix X (MOVX), the data is exchanged with external memory. Mnemonic MOV A,Rn MOV A,direct Description Moves the register to the accumulator Moves the direct byte to the accumulator Byte Cycle 1 2 1 2

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MOV A,@Ri MOV A,#data MOV Rn,A MOV Rn,direct MOV Rn,#data MOV direct,A MOV direct,Rn

Moves the indirect RAM to the accumulator Moves the immediate data to the accumulator Moves the accumulator to the register Moves the direct byte to the register Moves the immediate data to the register Moves the accumulator to the direct byte Moves the register to the direct byte

1 2 1 2 2 2 2 3 2 3 1 2 2 3

2 2 2 4 2 3 3 4 4 3 3 5 3 3 3

MOV direct,direct Moves the direct byte to the direct byte MOV direct,@Ri MOV direct,#data MOV @Ri,A MOV @Ri,direct MOV @Ri,#data Moves the indirect RAM to the direct byte Moves the immediate data to the direct byte Moves the accumulator to the indirect RAM Moves the direct byte to the indirect RAM Moves the immediate data to the indirect RAM

MOV DPTR,#data Moves a 16-bit data to the data pointer MOVC A,@A+DPTR MOVC A,@A+PC MOVX A,@Ri

Moves the code byte relative to the DPTR to the accumulator 1 (address=A+DPTR) Moves the code byte relative to the PC to the accumulator 1 (address=A+PC) Moves the external RAM (8-bit address) to the accumulator 1 1 1 1 2

3 3-10 3-10 4-11 4-11 4

MOVX A,@DPTR Moves the external RAM (16-bit address) to the accumulator MOVX @Ri,A Moves the accumulator to the external RAM (8-bit address)

MOVX @DPTR,A Moves the accumulator to the external RAM (16-bit address) PUSH direct Pushes the direct byte onto the stack

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POP direct XCH A,Rn XCH A,direct XCH A,@Ri XCHD A,@Ri

Pops the direct byte from the stack/td> Exchanges the register with the accumulator Exchanges the direct byte with the accumulator Exchanges the indirect RAM with the accumulator

2 1 2 1

3 2 3 3 3

Exchanges the low-order nibble indirect RAM with the 1 accumulator

Logic Instructions Logic instructions perform logic operations upon corresponding bits of two registers. After execution, the result is stored in the first operand. Mnemonic ANL A,Rn ANL A,direct ANL A,@Ri ANL A,#data ANL direct,A Description AND register to accumulator AND direct byte to accumulator AND indirect RAM to accumulator AND immediate data to accumulator AND accumulator to direct byte Byte Cycle 1 2 1 2 2 3 1 2 1 2 3 1 1 2 2 2 3 4 1 2 2 3 4 1

ANL direct,#data AND immediae data to direct register ORL A,Rn ORL A,direct ORL A,@Ri ORL direct,A OR register to accumulator OR direct byte to accumulator OR indirect RAM to accumulator OR accumulator to direct byte

ORL direct,#data OR immediate data to direct byte XRL A,Rn Exclusive OR register to accumulator

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XRL A,direct XRL A,@Ri XRL A,#data XRL direct,A

Exclusive OR direct byte to accumulator Exclusive OR indirect RAM to accumulator Exclusive OR immediate data to accumulator Exclusive OR accumulator to direct byte

2 1 2 2 3 1 1 1 1

2 2 2 3 4 1 1 1 1 1 1 1

XORL direct,#data Exclusive OR immediate data to direct byte CLR A CPL A SWAP A RL A RLC A RR A RRC A Clears the accumulator Complements the accumulator (1=0, 0=1) Swaps nibbles within the accumulator Rotates bits in the accumulator left

Rotates bits in the accumulator left through carry 1 Rotates bits in the accumulator right 1

Rotates bits in the accumulator right through carry 1

Bit-oriented Instructions Similar to logic instructions, bit-oriented instructions perform logic operations. The difference is that these are performed upon single bits. Mnemonic Description CLR C CLR bit SETB C SETB bit CPL C CPL bit Clears the carry flag Clears the direct bit Sets the carry flag Sets the direct bit Complements the carry flag Complements the direct bit Byte Cycle 1 2 1 2 1 2 1 3 1 3 1 3

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ANL C,bit AND direct bit to the carry flag

2 2 2 2 2 3

ANL C,/bit AND complements of direct bit to the carry flag 2 ORL C,bit OR direct bit to the carry flag ORL C,/bit OR complements of direct bit to the carry flag MOV C,bit Moves the direct bit to the carry flag MOV bit,C Moves the carry flag to the direct bit 2 2 2 2

Q. Give any four examples for program control flow instructions and explain. Sol: There are two kinds of program control flow instructions: Unconditional jump instructions: upon their execution a jump to a new location from where the program continues execution is executed. Conditional jump instructions: a jump to a new program location is executed only if a specified condition is met. Otherwise, the program normally proceeds with the next instruction. 1. ACALL addr11 Absolute subroutine call

The ACALL instruction calls a subroutine located at the specified address. The PC is incremented twice to obtain the address of the following instruction. The 16-bit PC is then stored on the stack (low-order byte first) and the stack pointer is incremented twice. No flags are affected. The address of the subroutine is calculated by combining the 5 high-order bits of the incremented PC (for A15-A11), the 3 high-order bits of the ACALL instruction opcode (for A10-A8), and the second byte of the instruction (for A7-A0). The subroutine that is called must be located in the same 2KByte block of program memory as the opcode following the ACALL instruction.

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2. LCALL addr16

Long subroutine call

The LCALL instruction calls a subroutine located at the specified address. This instruction first adds 3 to the PC to generate the address of the next instruction. This result is pushed onto the stack low-byte first and the stack pointer is incremented by 2. The high-order and low-order bytes of the PC are loaded from the second and third bytes of the instruction respectively. Program execution is transferred to the subroutine at this address. No flags are affected by this instruction.

3. RET

Returns from subroutine

The RET instruction pops the high-order and low-order bytes of the PC from the stack (and decrements the stack pointer by 2). Program execution resumes from the resulting address which is typically the instruction following an ACALL or LCALL instruction. No flags are affected by this instruction.

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4. RETI

Returns from interrupt subroutine

The RETI instruction is used to end an interrupt service routine. This instruction pops the high-order and low-order bytes of the PC (and decrements the stack pointer by 2) and restores the interrput logic to accept additional interrupts. No other registers are affected by this instruction. The RETI instruction does not restore the PSW to its value before the interrupt. The interrupt service routine must save and restore the PSW. Execution returns to the instruction immediately after the point at which the interrupt was detected. If another interrupt was pending when the RETI instruction is executed, one instruction at the return address is executed before the pending interrupt is processed. RETI Bytes Cycles Encoding 1 2 00110010 RETI PC15-8 = (SP) SP = SP - 1 PC7-0 = (SP) SP = SP - 1 RETI

Operation

Example

Q. Write in detail about the instruction SJMP.

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Sol: The SJMP instruction encodes the destination address as a relative offset. The instruction is 2 bytes long, consisting of the opcode and relative offset byte. SJMP rel Short jump (from 128 to +127 locations relative to the following instruction)

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