Section J8c: FET High Frequency Response

Just like for the BJT, we could use the original small signal model for low frequency analysis the only difference was that external capacitances had to be kept in the circuit. Also just like the BJT, for high frequency operation, the internal capacitances between each of the devices terminals can no longer be ignored and the small signal model must be modified. Recall that for high frequency operation, were stating that external capacitances are so large (in relation to the internal capacitances) that they may be considered short circuits. High-Frequency FET Model The high frequency equivalent circuit for an FET is obtained by adding internal capacitors between each pair of transistor terminals as shown in the figure to the right (based on Figure 10.16a of your text). The FET capacitances shown on data sheets are given as the equivalent input capacitance (Ciss), the forward transfer capacitance (Cfs), the reverse capacitance (Crss) and the output capacitance (Cos), where C iss = C gs + C gd C fs = C gd C rss = C gd C os = C gd + C ds The capacitors in the figure above may be related to data sheet information by . (Equation 10.58)

transfer

C gd = C rss C gs = C iss C rss . C ds = C os C rss

We may simplify the circuit above by making the following observations: (Equation 10.59, Modified)

rgs may be considered as an open circuit. The input resistance is usually around 1 to 10 M for JFETs and even larger for MOSFETs, so it may be ignored. Cds is very small, so the impedance contribution of this capacitance may be considered to be an open circuit and may be ignored. Millers theorem may be used to replace the series capacitance, Cgd, with shunt capacitances in the input and output circuit as follows:
C M1 = C gd (1 Av ) (input circuit )

. 1 (output circuit ) C M 2 = C gd 1 Av

(Equation 10.61)

The simplified equivalent circuit for the highfrequency response of an FET is shown to the right and is based on Figure 10.16b of your text. Often this circuit may be further simplified by ignoring the output resistance, rds, since it is usually larger than any resistance connected to the drain terminal. The definition of time constants and pole frequencies in Section H5, for the CB BJT amplifier, also hold for the common-gate amplifier configuration, where Cbe is replaced with Cgs, re is replaced with 1/gm, Cbc is replaced with Cgd, and appropriate changes are made to external component notation. The definition of time constants and pole frequencies in Section H5, for the CC (EF) BJT amplifier, also hold for the common-drain, or sourcefollower, amplifier configuration, where Cbe is replaced with Cgs, Cbc is replaced with Cgd, and appropriate changes are made to external component notation. High Frequency Response of the CS Amplifier The JFET implementation of the common-source amplifier is given to the left below, and the small signal circuit incorporating the high frequency FET model is given to the right below (based on Figures 10.19a and 10.19b of your text). As stated above, the external coupling and bypass capacitors are large enough that we can model them as short circuits for high frequencies.

We may simplify the small signal approximations and observations:

circuit

by

making

the

following

rds is usually larger than RD||RL, so that the parallel combination is dominated by RD||RL and rds may be neglected. If this is not the case, a single equivalent resistance, rds||RD||RL may be defined. The Miller effect transforms Cgd into separate capacitances seen in the input and output circuits as
C M1 = C gd (1 Av ) (input circuit )

. 1 (output circuit ) C M 2 = C gd 1 Av The parallel capacitances in the input circuit, Cgs and CM1, may be combined to a single equivalent capacitance of value
C in = C gs + C M1 = C gs + C gd (1 Av ) .

(Equation 10.66)

Similarly, the parallel capacitances in the output circuit, Cds and CM2, may be combined to a single equivalent capacitance of value
1 , C out = C ds + C M 2 = C ds + C gd 1 Av

(Equation 10.67)

where Av=-gm(RD||RL) for a common-source amplifier. With the above simplifications, the small signal circuit may be

simplified as presented to the right (a corrected version of Figure 10.20 in your text). Setting the input source, vS, equal to zero allows us to define the equivalent resistances seen by Cin and Cout (the Method of Open Circuit Time Constants). Note that, with vS=0, the dependent current source also goes to zero (opens) and the input and output circuits are separated. Cin: Setting Cpit and CS equal to zero (open circuit), the equivalent resistance seen by Cin is RCin = R || RG . Cout: Letting the impedance of Cin be equal to infinity, the equivalent resistance seen by Cout is RCout = RD || RL . The high frequency time constants for the CS amplifier are therefore defined by

Cin = C in RCin ;

Cout = C out RCout ,

and the upper corner frequency is approximated by

H =
1 1 1 = 1 1 1 . = = + Cout CinRC in + Cout RC out Cin(R || RG ) + Cout (RD || RL )

Cin

Cout

Cin

Generally, the input is going to provide the dominant pole, so the high frequency cutoff is given by
H =
1 ; C in (R || RG ) fH =

H 1 . = 2 2C in (R || RG )

(Equation 10.68)

Finally, the same considerations for high frequency design as presented in Section H6 for BJT amplifiers also hold for FETs.