U

Department of Electrical Engineering

ECE529: Session 44

An Overview of HVDC Transmission Systems

ECE 529 Spring 2009

HVDC Transmission Systems

1/24

Department of Electrical Engineering

ECE529: Session 44

Steady-State HVDC Converter Representation Steady state equivalent circuit

I dc
R dc

Inverter

V dcr

V dci

Rectifier

f ( ,Idc , |V |) ac

Have fast, direct control over (ring delay angle) Vdc = Vdo cos (ring delay angle) where Vdo = const |VLL| Some control of |Vac| with tap changing transformer DC current indirectly controlled by changing
HVDC Transmission Systems 2/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter Based on line commutated, current source converter Thyristors used as devices Converter with stiff current source on dc side Stiff voltage source on ac side (turns off thyristors) Basic 6-pulse bridge:
Smoothing Reactor
A +

Ls

dc

ean (t)
+ C -

Xc

5
+ -

ebn (t)
+ B

ecn (t)

V 4 6 2

dc

Transformer Inductance

HVDC Transmission Systems

3/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter Initially assume: 1) Ideal ac sources, 2) ideal switches, 3) Xc = 0, and 4) Ls source) AC side of converter has an ideal voltage source, dc side of converter has an ideal current source Apply Kirchhoffs Current Law: i1 + i3 + i5 = Idc (one switch always closed) i2 + i4 + i6 = Idc Apply Kirchhoffs Voltage Law: ean + ebn + ecn = 0 (balanced 3 phase set) Since Xc = 0, only one switch in (1,3,5) can be closed with a switch in (2,4,6)

HVDC Transmission Systems

4/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter (cont.) Allowable combinations: 1 with (2 or 6) (4 shorts dc bus) 3 with (2 or 4) 5 with (4 or 6) 2 with (1 or 5) 4 with (1 or 3) 6 with (3 or 5) Need to determine a switching sequence Start from assumption of positive phase sequence Typical current waveforms: ia | | | | ib | | ic
HVDC Transmission Systems 5/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter (cont.) Possible sequences: Top three switches: 1-3-5-1 or 1-5-3-1 Bottom three switches: 4-6-2-4 or 4-2-6-4
+ Assume: Vdc = Vdc - Vdc + Switch # Vdc Switch # Vdc 1 ean(t) 4 ean(t) 6 ebn(t) 3 ebn(t) 2 ecn(t) 5 ecn(t)

HVDC Transmission Systems

6/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter (cont.) Positive sequence ( = 0, 1-3-5-1 and 4-6-2-4)

6.00 Voltage (V) -10.00
0.0

-6.00

-2.00

2.00

10.00

6.67

13.33 Time (mS)

20.00

26.66

33.33

Negative sequence ( = 0, 1-5-3-1 and 4-2-6-4)

6.00 Voltage (V) -10.00
0.0

-6.00

-2.00

2.00

10.00

6.67

13.33 Time (mS)

20.00

26.66

33.33

HVDC Transmission Systems

7/24

Department of Electrical Engineering

ECE529: Session 44

Basic Six-Pulse Converter (cont.)

5 6 1 2 3 4 5

I dc I dc

Phase currents:

Switch Combination 1-6 1-2 3-2 3-4 5-4 5-6

+ Vdc=Vdc - Vdc

Look at the line voltages:

eab= ean - ebn = Vdc eac= ean - ecn ebc= ebn - ecn eba = ebn - ean eca= ecn - ean ecb= ecn - ebn

If = 0, then Vdc =
HVDC Transmission Systems

3 2 |VLL |

= 1.35|VLL| We dene this as Vdo

8/24

Department of Electrical Engineering

ECE529: Session 44

Controlled Firing of Thyristors Now add a ring delay () for the thyristors. Same delay for all 6 switches
6.00 Voltage (V) -10.00
0.0

-6.00

-2.00

2.00

10.00

6.67

13.33 Time (mS)

20.00

26.66

33.33

HVDC Transmission Systems

9/24

Department of Electrical Engineering

ECE529: Session 44

Vdc =

2|VLL |cos()d + 6 3 2 Then Vdc = |VLL |cos 3 2 Dene Vdo = |VLL|

3

+ 6

Controlled Firing of Thyristors =

+ 3 2 6 |VLL |sin() | + 6

Therefore Vdc = Vdo cos = 0 diode bridge Vdc = Vdo 0 < 90 rectier Vdc > 0 = 90 P =0 Vdc = 0 90 < 180 inverter Vdc < 0 Current does not reverse

HVDC Transmission Systems

10/24

Department of Electrical Engineering

ECE529: Session 44

Commutation Overlap Now add source inductance (Lc = 0)

Ls

I
+

dc

Lc

V 4 6 2

dc r -

dc i

+ -

HVDC Transmission Systems

11/24

Department of Electrical Engineering

ECE529: Session 44

Current Transfer Between Switches Current does not fall to zero immediately in ac side inductance Temporarily create line to line short
Ls

1 Xc

3 Xc

ean (t)

ebn (t) ecn (t)

Xc

3
0

I dc

Ls

HVDC Transmission Systems

12/24

Department of Electrical Engineering

ECE529: Session 44

Current Transfer Between Switches (cont.) What happens if gets to big (i.e. 180)? I dc
1 1
0

This is called a commutation failure

Thyristor 3 fails to turn on and thyristor 1 fails to turn off This is more common if Lc is large, which is the case looking into a weaker ac system Normally corrects during next interval, although often have a second failure when thyristor 5 turns on, double commutation failure

HVDC Transmission Systems

13/24

Department of Electrical Engineering

ECE529: Session 44

Output Voltage During Commutation

+ Switch 1 contribution: Vdc1 = ean - Lc di1 dt + Switch 3 contribution: Vdc3 = ebn - Lc di3 dt + + During overlap we see the average between Vdc1 &Vdc3 + So Vdc
+ + Vdc1 +Vdc3 2

= ean+ebn 2 =0

Lc 2

di1 dt

+ di3 dt =
di1 dt

i1 + i3 = Idc, so

di1 +di3 dt

But since its a linear network:

di1 +di3 dt

+ di3 = 0 dt

+ So: Vdc = Vdc ecn = ean+ebn ecn = 2

eac+ebc 2

HVDC Transmission Systems

14/24

Department of Electrical Engineering

ECE529: Session 44

Recall: Vdo = = = where Em is peak line to neutral voltage Then we nd: 3 Vdc =
+ 3

3 2 |VLL |

Average DC Voltage with Overlap

3 6 |V | 3 3 |Em |

Emcosd +

+ 3 +

3|Em|cos( )d 6

Leading to: Vdc =

3 3 E [cos + cos( + )] 2 m

do Or Vdc = V2 [cos + cos( + )]

HVDC Transmission Systems

15/24

Department of Electrical Engineering

ECE529: Session 44

Average DC Current Start out with Lc = 0 and = 0 for now

120

Fundamental Current Component

210 0 30 150 180

330 360

Firing delay simply adds a phase shift to the current (always lagging), and cos = cos
E 30 I
a an

E 90 Ia

an

Fundamental Component 2 2 2 iacos()d = Idc i1pk = 2 |I1RMS| =

6 Idc

2 3 Idc cos()d = 3
3

HVDC Transmission Systems

16/24

Department of Electrical Engineering

ECE529: Session 44

Then i1(t) =

2 3 Idccos(t

Average DC Current )

Also: P = 3I1RMSVPcos = VdcIdc 3 6 So: 3I1RMSVPcos = VPcosIdc So: |Ia1RMS| =

6 I dc

as expected
3Em 2Lc eLL = 2Xc

During overlap: Idc = Ic =

i3(t) = Ic(cos cost) with t + where t = + at the end of the commutation interval So average current is: Idc = Ic(cos cos( + )) Also: Ic =
3Em 2Lc

3 |Vp | 2 Xc

|VLL = 2X|

HVDC Transmission Systems

17/24

Department of Electrical Engineering

ECE529: Session 44

Average DC Circuit Equations We have the following equations: Vdo Vdc = [cos + cos( + )] 2 Idc = Ic(cos cos( + )) 3 2 |VLL| Vdo = |VLL| Vdo Ic = = 6Xc 2Xc Substitute for the cos( + ) in the Vdc equation Then Vdc = Vdo cos Vdo Idc 2Ic Where Vdo = 2Ic
Vdo 2 6X c

Vdo

3 = Xc = Rc (called the commutating resistance)

So Vdc = Vdo cos IdcRc

HVDC Transmission Systems 18/24

Department of Electrical Engineering

ECE529: Session 44

Average DC circuit Rc represents a current dependent voltage drop due to overlap Rc does not represent any energy dissipation! So using Vdc = Vdo cos IdcRc we get:
R line Rc Rc

V cos
do

V cos do

RECTIFIER

INVERTER

HVDC Transmission Systems

19/24

Department of Electrical Engineering

ECE529: Session 44

Inverter Operation + + = Covers positive half cycle of voltage is dened as the extinction angle o is minimum extinction angle for proper turn-off Typical values: 15 20 So + 180 o gives limits for control settings Replace with 180 in averaged equations * note: cos(180 ) = cos()

HVDC Transmission Systems

20/24

Department of Electrical Engineering

ECE529: Session 44

Inverter Operation (cont.) Generate equations in terms on instead of Vdc = Vdc = Vdc = Idc = Idc = Vdo [cos + cos( + )] 2 Vdo [cos(180 ) + cos(180 )] 2 Vdo [cos( + ) + cos()] 2 Ic(cos cos( + )) Ic(cos cos( + ))

Sign reversal in voltage equation expected for inverter

HVDC Transmission Systems

21/24

Department of Electrical Engineering

ECE529: Session 44

Effect of Overlap on Power Transfer Pac = 3I1RMSVp cos Pdc = Idc Vdo cos+cos(+) 2 I1RMS = Idc 6 =
3 6Vp Idc

cos+cos(+) 2

Vdc Then cos = cos+cos(+) = Vdo 2

Note: overlap equations change if > 60, covered in Kimbark, Direct Current Transmission: Volume I. Wiley, 1971.

HVDC Transmission Systems

22/24

Department of Electrical Engineering

ECE529: Session 44

Transformer Loading
DC System AC system

x (p.u.)

Xc = Lc where X 12 20%
B ZB = VB I 2 3VB X 3VB IB 2 VLL

Xc = ZBX = Xc =
2 VBL X MVAB3

VB X IB

, this is

MVA3B

IB = I1RMS =

6 I dcB

So MVAB3 = 3VBIB = 3VB

HVDC Transmission Systems

6 IdcB

R = Vdo IdcB

23/24

Department of Electrical Engineering

ECE529: Session 44

Transformer Loading (cont.) Need to use true RMS (transformers sees all harmonic components) IRMS =
1 3 2 I d o dc

= Idc

2 3

R So MVAB3 = 3IRMSV = Vdo IdcB 3

Then Xc =

2 VBL MVAB3 X

with Vdo =

3 2 VBL

Vdo Then ZB = 6IdcB 3 Then from Vdc = Vdo cos Idc Xc we get 3 Vdc = Vdo cos Idc (ZBX ) dc Vdc = Vdo cos Vdo X IIdcB 2

Leading to a per unit expression:

Vdc Vdo

= cos X Idc 2

HVDC Transmission Systems

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