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Date: Sat, 15-Oct-2005 Section: Synopsys

Synopsys Nanosim is a fast-Spice simulator. It provides near-Spice accuracy at much faster simulation speed. It can be used for full-chip simulation or for functional verification of custom-digital blocks. It also includes dynamic power analysis, a feature previously provided by Synopsys PowerMill. To the best of my knowledge, Nanosim replaces both PowerMill and TimeMill

This tutorial will demonstrate simulation, functional verification and dynamic power analysis. The example circuit is a simple 8-bit adder. The following files are part of this tutorial: adder.sp: The Spice netlist adder.vec: Digital input vectors adder.cfg:Nanosim configuration file

Digital Input Vectors

Nanosim uses the ".vec" file format to provide digital input vectors. This method is far superior to using Spice "pwl" sources. In addition, Nanosim supports both input and output vectos. The input vectors are used to drive the circuit, while the output vectors are used to check the circuit. The header of "adder.vec" is
rdx14 4 4 ai 4 4 4 i o ii i o i i o vaecna[:]b[:]s[:] nm i _70 _70 _70

We have 3 input vectors (cin, a and b) and 1 output vector, s. Note that the signals in the Spice netlist are called "a_0", "a_1" etc. Nanosim allows us to group those to a bus using the "[ ]" notation. The "radix" line specifies that "cin" is a 1-bit signal, while all the other ones contain two 4-bit parts, or 8-bit. The "io" line defines which are input and which are output. A typical excerpt from a ".vec" file looks like this:
40 00 60 00 1 1 4 4 5 5 4 4 5 5 2 1 8 9

The first column is the simulation time, in this case 4ns and 6ns. Then comes the list of vectors as defined in the header of the ".vec" file. The values for the input vectors will drive the circuit. The last column, which is for "s", is used to check if the circuit outputs the correct value. For example, at time 4ns we add 1+44+44=89, all in hex. So by the time we get to 6ns, the circuit should output "89". As a result, the 1/4


values in the sum column are always 1 row lower than the input operands.

Functional Verification
We run Nanosim on the command line:
nnsm- adrs - adrcg-vcadrvc aoi n de.p c de.f ne de.e

The window after the run will look like this:

Note that Nanosim reports that no error was found, so the circuit behaves as expected and all outputs have the right value. Now lets force an in-correct value by changing the expected value in the "adder.vec" file. Change the line
100 00 1 7 7 1 1 C D

100 00 1 7 7 1 1 C C

We now changed the value of "s_0" from "1" to "0". Now run Nanosim again. The window should look like this:

We can see that Nanosim detected one bad output. To see more detail about the errors detected in the circuit, we use the command
veerr- nnsmer iwro i aoi.r

This should output the following:



Nanosim reports that at time 10ns it noticed that "s_0" was "1", but it expected to see "0". So Nanosim correctly identified the "false" error we constructed. If this had been an actual error, we could do the following: First, simualate the exact same vector in the golden model, for example RTL Verilog. That way we can tell if something went wrong durig implementation or if had this error all along. Use "probe" statements in Nanosim to output waveforms. That could help to track back the error to its source Finally, we could apply the input vector using pulse sources to a Spice simulator. That would provide the most detail for tracking down the error.

Dynamic Power Analysis

Nanosim also provides dynamic power analysis in a custom digital flow. In a standard-cell based flow we would probably use Synopsys PrimePower or Cadence Encounter for this. The simulation input vectors come again from the "adder.vec" file. In addition, we use the following command in the "adder.cfg" file:
rpr_lc_oe m_w X0* eotbokpwr ypr I.

(Note that in "adder.cfg" we use a longer line with more options) This tells Nanosim to compute the dynamic power of instance "XI0". This is the instance name that was used for the instance of our adder in "adder.sp":
X0A7A6..ADR_1 I _ _ . DE8G

The results from power analysis are written to the "nanosim.log" file. In a text editor this would look like this:



Nanosim reports that the RMS power of this block is 121uW. Note that this value is only based on 5 vectors, since our "adder.vec" file is so small. Typically we would use 1000 or more vectors, to get a good time average of power consumption.

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