RAJALAKSHMI ENGINEERING COLLEGE, THANDALAM DEPARTMENT OF ECE LESSON PLAN FACULTY NAME: Ms. R.

Harini SUBJECT: DIGITAL PRINCIPLES & SYSTEM DESIGN AIM Design of digital circuits and the use of Hardware Description Language in digital system To provide an in-depth knowledge of the design. OBJECTIVES To understand different methods used for the simplification of Boolean functions To design and implement combinational circuits To design and implement synchronous sequential circuits To design and implement asynchronous sequential circuits To study the fundamentals of VHDL / Verilog HDL BOOLEAN ALGEBRA AND LOGIC GATES 8 CLASS: II Year CSE B CODE: 141302

UNIT I

Review of binary number systems - Binary arithmetic Binary codes Boolean algebra and theorems - Boolean functions Simplifications of Boolean functions using Karnaugh map and tabulation methods Implementation of Boolean functions using logic gates. UNIT II COMBINATIONAL LOGIC 9

Combinational circuits Analysis and design procedures - Circuits for arithmetic operations - Code conversion Introduction to Hardware Description Language (HDL) UNIT III DESIGN WITH MSI DEVICES 8

Decoders and encoders - Multiplexers and demultiplexers - Memory and programmable logic - HDL for combinational circuits UNIT IV SYNCHRONOUS SEQUENTIAL LOGIC 10

Sequential circuits Flip flops Analysis and design procedures - State reduction and state assignment - Shift registers Counters HDL for Sequential Circuits.

UNIT V

ASYNCHRONOUS SEQUENTIAL LOGIC

10

Analysis and design of asynchronous sequential circuits - Reduction of state and flow tables Race-free state assignment Hazards. ASM Chart. TUTORIAL TEXT BOOKS 1. M.Morris Mano, Digital Design, 3rd edition, Pearson Education, 2007. REFERENCES 1. Charles H.Roth, Jr. Fundamentals of Logic Design, 4th Edition, Jaico Publishing House, Cengage Earning, 5th ed, 2005. 2. Donald D.Givone, Digital Principles and Design, Tata McGraw-Hill, 2007. No of Periods required 1 -do1 1 1 1 2 1 -do2 & 2 BOOK & Pa ge no. T1-1 T1-15 T1-28 T1-45 T1-52 T1-76 T1 2nd ed T1-66 T1-123 = 15 TOTAL : 60

Sl.No

DATE

HOUR

TOPIC

UNI T I ,, ,, ,, ,, ,, ,, ,, ,, ,, II

1. 2. 3. 4. 5. 6. 7. 8. 9. 10 . 11 .

Review of binary number system, Binary Arithmetic Binary Codes Tutorial Boolean Algebra & Theorems Boolean functions Simplification of Boolean functions using Karnaughs map Tabulation methods Logic gates Tutorial Combinational circuits-analysis design procedure

12 . 13 . 14 . 15 . 16 . 17 . 18 . 19 . 20 . 21 . 22 . 23 . 24 . 25 . 26 .

Circuits for arithmetic operations Tutorial Code conversion Introduction to HDL Tutorial Decoders Encoders Multiplexers Demultiplexers Memory Programmable logic devices HDL for combinational circuits Tutorial Sequential circuits Flip flops

3 1 2 2 2 1 -do1 -do2 2 2 3 1 2

,, ,, ,, ,, ,, III ,, ,, ,, ,, ,, ,, ,, IV ,,

T1-131 ,, T1-128 T1-111 T1-146 T1-151 T1-153 T1-149 T1-267 T1-288 T1-159 T1-179 T1-184

27 . 28 . 29 . 30 . 31 . 32 . 33 . 34 . 35 . 36 . 37 . 38 . 39 . 40 .

Analysis & Design procedure State reduction & state assignment Tutorial Shift registers Counters HDL for sequential logic circuits-shift registers & counters Tutorial Analysis & design of asynchronous sequential circuits Reduction of state & flow tables Tutorial Race free state assignment Hazards ASM Charts Tutorial

1 1 1 1 2 2 2 4 2 1 2 2

,, ,, ,, ,, ,, ,, ,, V ,, ,, ,, ,,

T1-192 T1-210 T1-231 T1-239 T1-202 T1-354 T1-379 T1-386 T1-391 T1-299

,,

Signature of the faculty

Signature of HOD