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Radyne Inc. 3138 E. Elwood St. Phoenix, AZ 85034 (602) 437-9620 Fax: (602) 437-4811 www.radn.com
Warranty Policy
Warranty Policy
WP
Radyne Inc. (Seller) warrants the items manufactured and sold by Radyne Inc. to be free of defects in material and workmanship for a period of two (2) years from date of shipment Radyne Inc.s obligation under its warranty is limited in accordance with the periods of time and all other conditions stated in all provisions of this warranty. This warranty applies only to defects in material and workmanship in products manufactured by Radyne Inc. Radyne Inc. makes no warranty whatsoever concerning products or accessories not of its manufacture. Repair, or at the option of Radyne Inc., replacement of the Radyne Inc. products or defective parts therein shall be the sole and exclusive remedy for all valid warranty claims.
Warranty Period
The applicable warranty period shall commence on the date of shipment from a Radyne Inc. facility to the original purchaser and extend for the stated period following the date of shipment. Upon beginning of the applicable Radyne Inc. warranty period, all customers remedies shall be governed by the terms stated or referenced in this warranty. In-warranty repaired or replacement products or parts are warranted only for the remaining unexpired portion of the original warranty period applicable to the repaired or replaced products or parts. Repair or replacement of products or parts under warranty does not extend the original warranty period.
2.
Liability Limitations
This warranty is expressly in lieu of and excludes all other express and implied warranties, Including but not limited to warranties of merchantability and of fitness for particular purpose, use, or applications, and all other obligations or liabilities on the part of Radyne Inc., unless such other warranties, obligations, or liabilities are expressly agreed to in writing by Radyne Inc. All obligations of Radyne Inc. under this warranty shall cease in the event its products or parts thereof have been subjected to accident, abuse, alteration, misuse or neglect, or which have not been operated and maintained in accordance with proper operating instructions.
iii
Warranty Policy
In no event shall Radyne Inc. be liable for Incidental, consequential, special or resulting loss or damage of any kind howsoever caused. Radyne Inc.s liability for damages shall not exceed the payment, if any, received by Radyne Inc. for the unit or product or service furnished or to be furnished, as the case may be, which is the subject of claim or dispute. Statements made by any person, including representatives of Radyne Inc., which are inconsistent or in conflict with the terms of this warranty, shall not be binding upon Radyne Inc. unless reduced to writing and approved by an officer of Radyne Inc.
Radyne Inc. 3138 E. Elwood St. Phoenix, Arizona 85034 (USA) ATTN: Customer Support Phone: (602) 437-9620 Fax: (602) 437-4811
Any product returned to Radyne Inc. for examination must be sent prepaid via the means of transportation indicated as acceptable to Radyne Inc. Return Authorization Number must be clearly marked on the shipping label. Returned products or parts should be carefully packaged in the original container, if possible, and unless otherwise indicated, shipped to the above address.
Non-Warranty Repair
When a product is returned for any reason, Customer and its shipping agency shall be responsible for all damage resulting from improper packing and handling, and for loss in transit, not withstanding any defect or nonconformity in the product. By returning a product, the owner grants Radyne Inc. permission to open and disassemble the product as required for evaluation. In all cases, Radyne Inc. has sole responsibility for determining the cause and nature of failure, and Radyne Inc.s determination with regard thereto shall be final.
iv
Preface
Preface
This manual provides installation and operation information for the Radyne MD2401 L-Band Multi Demod. This is a technical document intended for use by engineers, technicians, and operators responsible for the operation and maintenance of the MD2401.
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Trademarks
Product names mentioned in this manual may be trademarks or registered trademarks of their respective companies and are hereby acknowledged.
Preface
Copyright
2006, Radyne Inc. This manual is proprietary to Radyne Inc. and is intended for the exclusive use of Radyne Inc.s customers. No part of this document may in whole or in part, be copied, reproduced, distributed, translated or reduced to any electronic or magnetic storage medium without the express written consent of a duly authorized officer of Radyne Inc
Disclaimer
This manual has been thoroughly reviewed for accuracy. All statements, technical information, and recommendations contained herein and in any guides or related documents are believed reliable, but the accuracy and completeness thereof are not guaranteed or warranted, and they are not intended to be, nor should they be understood to be, representations or warranties concerning the products described. Radyne Inc. assumes no responsibility for use of any circuitry other than the circuitry employed in Radyne Inc. systems and equipment. Furthermore, since Radyne Inc. is constantly improving its products, reserves the right to make changes in the specifications of products, or in this manual at any time without notice and without obligation to notify any person of such changes.
Record of Revisions
Revision Level
1.0 1.1
Date
5-5-06 8-15-06
vi
Table of Contents
Table of Contents
ToC
Section 1 - Introduction .............................................................................................1-1 1.0 1.1 1.1.1 1.1.2 1.2 Description ____________________________________________________ 1-1 MD2401 Available Options________________________________________ 1-2 Reed-Solomon Codec _________________________________________ 1-2 Turbo Codec ________________________________________________ 1-2 Ethernet Data Interface (Optional) __________________________________ 1-2
Section 2 - Installation ...............................................................................................2-1 2.0 2.1 2.2 2.3 2.4 2.4.1 2.4.2 2.4.3 2.5 Installation Requirements_________________________________________ 2-1 Unpacking ____________________________________________________ 2-1 Removal and Assembly __________________________________________ 2-2 Mounting Considerations _________________________________________ 2-2 Demodulator Checkout___________________________________________ 2-2 Initial Power-Up ______________________________________________ 2-2 Factory Terminal Setup (Refer to Section 4.4) ______________________ 2-3 Remote Protocol Factory Default Setup ___________________________ 2-3 Storage_______________________________________________________ 2-4
Section 3 - Theory of Operation ................................................................................3-1 3.0 3.1 3.1.1 3.1.2 3.1.3 3.1.4 3.2 3.2.1 3.2.2 3.2.3 3.2.4 Theory of Operation _____________________________________________ 3-1 Applications ___________________________________________________ 3-2 SCPC Point-to-Point Links______________________________________ 3-2 SCPC Point to MultiPoint Links in a Broadcast Application ____________ 3-2 DAMA (Demand Assigned Multiple Access) ________________________ 3-3 TDMA (Time Division Multiple Access) Remote Site Application ________ 3-3 MD2401 Reed-Solomon__________________________________________ 3-3 Reed-Solomon Codec _________________________________________ 3-3 Reed-Solomon Operation in the MD2401 Demodulator _______________ 3-4 Reed-Solomon Code Rate______________________________________ 3-4 Interleaving _________________________________________________ 3-4
vii
Table of Contents
Section 4 - User Interfaces ........................................................................................4-1 4.0 4.1 4.2 4.3 4.4.1 4.4.1.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 4.4.7 4.4.8 4.4.9 4.4.10 4.4.11 4.4.12 4.4.12.1 4.4.12.2 4.13 User Interfaces _________________________________________________ 4-1 Front Panel User Interface ________________________________________ 4-1 MD2401 Remote Port Control (J5)__________________________________ 4-1 MD2401 Terminal Mode Control (J1) ________________________________ 4-1 Protocol Structure ____________________________________________ 4-2 Protocol Structure _________________________________________ 4-3 Protocol Wrapper _____________________________________________ 4-3 Frame Description and Bus Handshaking __________________________ 4-5 Global Response Operational Codes _____________________________ 4-6 Collision Avoidance ___________________________________________ 4-7 Software Compatibility _________________________________________ 4-8 Flow Control and Task Processing _______________________________ 4-8 RLLP Summary ______________________________________________ 4-9 DD2401/DD2401L Opcode Command Set ________________________ 4-10 Demodulator Command Set ___________________________________ 4-11 Module Command Set ________________________________________ 4-11 Detailed Command Descriptions ________________________________ 4-12 DMD2401 Demodulator ____________________________________ 4-12 Default Values Demodulator ________________________________ 4-37
Section 5 - Rear Panel Interfaces ..............................................................................5-1 5.0 5.1 5.2 5.2.1 5.3 5.4 5.5 5.5.1 5.6 5.7 MD2401 Connections____________________________________________ 5-1 Power ________________________________________________________ 5-1 Terrestrial Data I/F ______________________________________________ 5-2 Ethernet Data Interface ________________________________________ 5-2 EXT REF _____________________________________________________ 5-4 SERIAL CONTROL I/F___________________________________________ 5-4 RX IN ________________________________________________________ 5-5 L-Band _____________________________________________________ 5-5 Remote Port __________________________________________________ 5-6 Remote Addresses______________________________________________ 5-6
viii
Table of Contents
Section 7 - Technical Specifications.........................................................................7-1 7.0 7.1 7.2 7.3 7.4 7.5 7.6 7.7 Introduction____________________________________________________ 7-1 Receive Data Rates _____________________________________________ 7-1 Demodulator Specifications _______________________________________ 7-1 Standard Options _______________________________________________ 7-2 Environmental _________________________________________________ 7-2 Physical ______________________________________________________ 7-2 BER Charts ___________________________________________________ 7-3 AGC Curve ____________________________________________________ 7-7
Glossary.....................................................................................................................G-1
ix
Table of Contents
Introduction
Introduction
1.0
Description
The Radyne MD2401 L-Band Multi Demod system is intended for use as apart of the receiving ground equipment in a satellite communication system. The unit is a 2RU rack mount system capable of supporting up to four independent L-Band demodulators and outputs the data onto a single 10/100/1000 Base-T interface or four independent RS422 synchronous interfaces.
Figure 1-1. MD2401 L-Band Multi Demod The MD2401 is designed to perform at one end of the satellite Single Channel Per Carrier (SCPC) Link receiving up to four downlink carriers. The MD2401 can be used in a Mesh or Star Topology Network. Each Demodulator operated independently using BPSK, QPSK, OQPSK or 8PSK Modulation. All Demodulators can be accessed via a single RS485 serial link system for complete remote monitor and control (M&C) capability. Each demodulator also offers the terminal control via an RS232 connection. Selection of any data rate is provided over the following ranges: BPSK: QPSK: OQPSK: 8PSK: 9.6 Kbps to 1024 Kbps 9.6 Kbps to 4.375 Mbps 9.6 Kbps to 4.375 Mbps 64.0 Kbps to 5.0 Mbps
The MD2401 can track and acquire a carrier over a programmable range of 1 kHz to 42 kHz. Acquisition times of less than three seconds are typical at data rates greater than 64 Kbps over a range of 25 kHz. To facilitate link testing, the MD2401 incorporates a built-in 2047 test pattern with BER measurement capability.
1-1
Introduction
1.1
Various options are available for the MD2401 L-Band Multi Demod:
1.2
The MD2401 Ethernet data interface offers 10/100/1000 Base-T plug and play capability. All incoming data from each Demodulator is transported out a single RJ45 port. Just plug your LAN into the RJ45 port and the modem is up and running. With the Ethernet interface, automatically learning, Aging and embedded Quality of Service make this modem the ideal choice.
1-2
Introduction
1-3
Installation
Installation
This section provides unpacking and installation instructions, and a description of external connections.
2.0
Installation Requirements
The MD2401 can be installed within any standard 19 inch equipment cabinet or rack, and requires two rack unit (RU) mounting space (3.5 inches) vertically and 15 inches of depth. Including cabling, a minimum of 18 inches of rack depth is required. The rear panel of the MD2401 is designed to have power enter from the left and IF Cabling enter from the right when viewed from the rear of the unit. Data and control cabling can enter from either side although they are closer to the right. The unit can be placed on a table or suitable surface if required.
There are no user-serviceable parts or configuration settings located inside the MD2401 chassis. There is a potential shock hazard internally at the power supply module. DO NOT open the MD2401 chassis under any circumstances.
2.1
Unpacking
The MD2401 Modulator was carefully packaged to avoid damage and should arrive complete with the following items for proper installation: 1. 2. 3. MD2401 Multi Demod Power Cord, six foot with applicable AC Connector Installation and Operation Manual
2-1
Installation
2.2
If using a knife or cutting blade to open the carton, exercise caution to insure that the blade does not extend into the carton, but only cuts the tape holding the carton closed. Carefully unpack the unit and ensure that all of the above items are in the carton. If the Prime AC power available at the installation site requires a different power cord/AC Connector, then arrangements to receive the proper device will be necessary before proceeding with the installation. The MD2401 Demodulator is shipped fully assembled. It does not require removal of the covers for any purpose in installation. Always insure that power is removed from the MD2401 before removing or installing demodulators. Should the power cable AC Connector be of the wrong type for the installation, either the cable or the power connector end should be replaced. The power supply itself is designed for universal application using from 100 to 240 VAC, 50 to 60 Hz, 1.0A.
2.3
Mounting Considerations
When mounted in an equipment rack, adequate ventilation must be provided. The ambient temperature in the rack should be between 10 and 35 C, and held constant for best equipment operation. The air available to the rack should be clean and relatively dry. The MD2401 units may be stacked one on top of the other up to a maximum of 10 consecutive units before providing one RU of space for airflow. Demodulator units should not be placed immediately above a high heat or EMF generator to ensure the output signal integrity and proper receive operation. Do not mount the MD2401 in an unprotected outdoor location where there is direct contact with rain, snow, wind or sun. The MD2401 is designed for indoor applications only. The only tools required for rack mounting the MD2401 is a set of four rack mounting screws and an appropriate screwdriver. Rack mount brackets are an integral part of the cast front bezel of the unit and are not removable. Shielded cables with the shield terminated to the conductive backshells are required in order to meet EMC directives. Cables with insulation flammability ratings of 94 VO or better are required in order to meet low voltage directives.
2.4
Demodulator Checkout
The following descriptions assume that the MD2401 is installed in a suitable location with prime AC power and supporting equipment available.
2-2
Installation
Turn on the unit by placing the Rear Panel Switch (located above the power entry connector) to the On position. Upon initial and subsequent power-ups, the MD2401 Microprocessor will test itself and several of its components before beginning its Main Monitor/Control Program. These power-up diagnostics show no results if successful. If a failure is detected, the Fault LED will illuminate. The initial field checkout of the modem can be accomplished in Terminal Mode. The Terminal Mode has the advantage of providing full screen access to all of the modems parameters, but requires a separate terminal or computer running a terminal program. The Terminal Mode is enabled from the front panel in the Systems M&C Submenus.
D4 D3 D2 D3
2-3
Installation
2.5
Storage
It is recommended that the unit be stored in its original sealed packaging. The unit should be stored in a dry location where the termperature is stable, away from direct contact with rain, snow, sind, sun or anything that may cause damage.
2-4
Installation
2-5
Theory of Operation
Theory of Operation
VME2401
RS422 RS422
VME2401
RS485 DC Power
Mother Board
DC Power
10/100/100 BASE-T
RS422
RS422
VME2401
RS485 M&C RS422 RS232 Ext Ref. IF IN 950 - 1750 MHz RS422
VME2401
RS485 DC Power
Faults/Status DC Power
AC TO DC Power supply
AC INPUT
3-1
Theory of Operation
3.1 Applications
Following are just a few representative forms of satellite communications links and networks in which the MD2401 Demod may be used.
3-2
Theory of Operation
3-3
Theory of Operation
encoder which adds 2t = (N - K) check bytes to produce an N byte RS Block. The RS Decoder can then correct up to t erred bytes in the block (refer to Figure 3-4 and Table 3-1).
3.2.4 Interleaving
The MD2401 allows for interleaving depths of 4 or 8 R-S blocks. This allows burst errors to be spread over 4 or 8 R-S blocks in order to enhance the error correcting performance of the R-S Codec.
3-4
Theory of Operation
Table 3-1. Reed-Solomon Codes for IDR Type of Service Data Rate (Kbps) 64 128 256 384 512 768 1024 1536 1544 2048 R-S Code 1 (n, k, t) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (126, 112, 7) (225, 205,10) (219, 201, 9) Bandwidth Expansion [ (n/k) -1 ] 0.125 0.125 0.125 0.125 0.125 0.125 0.125 0.125 0.0976 0.0896 Interleaving Depth 4 4 4 4 4 4 4 4 4 4 Maximum R-S Codec Delay (ms) 115 58 29 19 15 10 8 5 9 7
2
n = code length, k = information symbols and t = symbol error correcting capability. Design objective For the MD2401 Demodulator, the IDR Deframing must be supplied externally.
3-5
Theory of Operation
3-6
User Interfaces
User Interfaces
4.0
User Interfaces
There are three user interfaces available for MD2401. These are: a. b. c. Front Panel LEDs Monitors installed demodulator Remote Port (J5) Access to all available demodulators Terminal (J1) Independent connection to each demodulator
Characters contained within the brackets < and > indicate pressing the appropriate key.
4-1
User Interfaces
The unit can be interactively monitored and controlled in the Terminal Mode, with a full screen presentation of current settings and status. Programming is accomplished by selecting the item to be modified and pressing the terminal key of the option number. For example, to change the Receive Data Rate, enter 33 at the terminal. The MD2401 will respond by presenting the options available and requesting input. Two types of input may be requested. If the input is multiple choice, the desired choice is selected by pressing <Space>. When the desired option is displayed, press <Enter> to select that option. The other possible input type requires a numerical input (such as entering a frequency or data rate). This type of input is followed by pressing <Enter> or the carriage return key. An input can be aborted at any time by pressing <ESC>. Invalid input keys cause an error message to be displayed on the terminal. The Terminal Control Mode supports a serial baud rate of 1200. The connection must be set for 8 data bits, 1 stop bit and no parity (8, N, 1). Three terminal emulations are supported: VT100, WYSE 50, and ADDS. The emulation type can be changed by pressing <$> (dollar sign) on the terminal keyboard.
4-2
User Interfaces
The stop bit, S1 is a mark. Data flow remains in a hold mode until S1 is replaced by a space. If S1 is followed by a space, the space character is considered a start (ST) and not part of the actual data (B0 - B 7). The above byte-oriented protocol is standard for UART based serial communication ports such as Workstation or Personal Computer (PC) COM ports. COM ports should be configured for 8 data bits, no parity, and one stop bit. For example, for 9600-baud operation, COM ports should be configured as: 9600, 8, N, 1 The COMMSPEC developed for use with the Radyne Link Level Protocol (RLLP) organizes the actual monitor and control data within a shell, or protocol wrapper, that surrounds the data. The format and structure of the COMMSPEC message exchanges are described herein. Decimal numbers have no suffix; hexadecimal numbers end with a lower case h suffix and binary values have a lower case b suffix. Thus, 22 = 16h = 000010110b. The principal elements of a data frame, in order of occurrence, are summarized as follows: <SYNC> - the message format header character, or ASCII sync character, that defines the beginning of a message. The <SYNC> character value is always 16h (1 Byte). <BYTE COUNT> - the Byte Count is the number of bytes in the <DATA> field (two bytes). <SOURCE ID> - the Source Identifier defines the multi-drop address origin. Note that all nodes on a given control bus have a unique address that must be defined (1 Byte).
4-3
User Interfaces
<DESTINATION ID> - The Destination Identifier serves as a pointer to the multi-drop destination device that indicates where the message is to be sent (1 Byte). <FRAME SEQUENCE NUMBER> -The FSN is a tag with a value from 0 through 255 that is sent with each message. It assures sequential information framing and correct equipment acknowledgment and data transfers (1 Byte). <OPCODE> - The Operation Code field contains a number that identifies the message type associated with the data that follows it. Equipment under MCS control recognizes this code via firmware identification and subsequently steers the DATA accordingly to perform a specific function or series of functions. Acknowledgment and error codes are returned in this field (two bytes). <...DATA...> - The Data field contains the binary data bytes associated with the <OPCODE>. The number of data bytes in this field is indicated by the <BYTE COUNT> value. <CHECKSUM> - The checksum is the modulo 256 sum of all preceding message bytes, excluding the <SYNC> character (1 Byte). The checksum determines the presence or absence of errors within the message. In a message block with the following parameters, the checksurn is computed as shown in Table 4-2 below. Table 4-2. Checksum Calculation Example Byte Field Data Content Running Checksum <BYTE COUNT> (Byte 1) 00h = 00000000b 00000000b <BYTE COUNT> (Byte 2) 02h = 00000010b 00000010b <SOURCEID> F0h = 11110000b 11110010b <DESTINATION ID> 2Ah = 00101010b 00011100b <FSN> 09h = 00001001b 00100101b <OPCODE> (Byte 1) 00h = 00000000b 00100101b <OPCODE> (Byte 2) 03h = 00000011b 00101000b <DATA> (Byte 1) DFh = 11011111b 00000111b <DATA> (Byte 2) FEh = 11111110b 00000101b Thus, the checksum is 00000101b; which is 05h or 5 decimal. Alternative methods of calculating the checksum for the same message frame are: 00h + 02h + F0h + 2Ah + 09h + 00h + 03h + DFh + FEh = 305h. Since the only concern is the modulo 256 (modulo 1 00h) equivalent (values that can be represented by a single 8-bit byte), the checksum is 05h. For a decimal checksum calculation, the equivalent values for each information field are: 0 + 2 + 240 + 42 + 9 + 0 + 3 + 223 + 254 = 773; 773/256 = 3 with a remainder of 5. This remainder is the checksum for the frame. 5 (decimal) = 05h = 0101b = <CHECKSUM>
4-4
User Interfaces
4-5
User Interfaces
Opcode 0000h 00FFh 00FEh 00FDh 00FCh 00FBh 00FAh 00F9h 00F8h
The following response error codes are specific to the DD2401/DD2401L: Response Opcode Description DPARM_MODE_ERROR DPARM_FREQUENCY_ERROR DPARM_DATARATE_ERROR DPARM_SWEEPBOUNDARY_ERROR DPARM_LEVELLIMIT_ERROR DPARM_DEMODULATIONTYPE_ERROR DPARM_CONVDECODER_ERROR DPARM_REEDSOLOMON_ERROR DPARM_DIFFERENTIALDECODER_ERROR DPARM_DESCRAMBLERCONTROL_ERROR DPARM_DESCRAMBLERTYPE_ERROR DPARM_SPECTRUM_ERROR DPARM_BUFFERCLOCK_ERROR DPARM_BUFFERCLOCKPOL_ERROR DPARM_INSERTMODE_ERROR DPARM_FRAMING_ERROR DPARM_OPERATINGMODE_ERROR DPARM_BERMEASUREPERIOD_ERROR DPARM_CIRCUITID_ERROR DPARM_TERRLOOPBACK_ERROR DPARM_BASELOOPBACK_ERROR DPARM_IFLOOPBACK_ERROR DPARM_INTERFACETYPE_ERROR DPARM_NOTIMPLEMENTED_ERROR DPARM_DATAINVERT_ERROR DPARM_SUMMARYFAULT_ERROR DPARM_EXTERNALEXCSOURCE_ERROR Opcode 0x0600 0x0601 0x0603 0x0604 0x0605 0x0608 0x0609 0x060A 0x060B 0x060C 0x060D 0x060E 0x0610 0x0611 0x0612 0x0615 0x0616 0x0619 0x061A 0x061B 0x061C 0x061D 0x061E 0x0622 0x0623 0x0624 0x0625
4-6
User Interfaces
4-7
User Interfaces
RCS10 M:N Switch RCS11 1:1 Switch DD2401/DD2401L Demodulator Reserved For Future Equipment Types
25 26 27 28-31
Note that multi-drop override IDs 01 or 02 can be used interchangeably to broadcast a message to a DMD3000/4000 modem, or to a DMD4500/5000, or to a DMD15 modem. Radyne ComStream Corporation recommends that the multi-drop override IDs be issued only during system configuration as a bus test tool by experienced programmers, and that they not be included in run-time software. It is also advantageous to consider the use of multiple bus systems where warranted by a moderate to large equipment complement. Therefore, if a DD2401/DD2401L is queried for its equipment type identifier, it will return a 27.
The DD2401/DD2401L RLLP is not software-compatible with the following previous Radyne products: RCU5000 and DMD4500. These products may not occupy the same bus while using this protocol as equipment malfunction and loss of data may occur.
When Radyne equipment is queried for information (Query Mod, Query Demod, etc.) it responds by sending back two blocks of data; a non-volatile section (parameters that can be modified by the user) and a volatile section (status information). It also returns a count value that indicates how large the non-volatile section is. This count is used by M&C developers to index into the start of the volatile section. When new features are added to Radyne equipment, the control parameters are appended to the end of the non-volatile section, and status of the features, if any, are added at the end of the volatile section. If a remote M&C queries two pieces of Radyne equipment with different software revisions, they might respond with two different sized packets. The remote M&C MUST make use of the non-volatile count value to index to the start of the volatile section. If the remote M&C is not aware of the newly added features to the Radyne product, it should disregard the parameters at the end of the non-volatile section and index to the start of the volatile section. If packets are handled in this fashion, there will also be backward-compatibility between Radyne equipment and M&C systems. Remote M&C systems need not be modified every time a feature is added unless the user needs access to that feature.
4-8
User Interfaces
The term turnaround time refers to the amount of time required for a receiver to be re-enabled and ready to receive a packet after having just received a packet. In flow control programming, the Inter-Frame Space may be determined empirically in accord with the system configuration, or calculated based on established maximum equipment task processing times. Each piece of supported equipment on the control bus executes a Radyne Link Level Task (RLLT) in accordance with its internal hardware and fixed program structure. In a flow control example, the RLLT issues an internal message in system call to invoke an I/0 wait condition that persists until the task receives a command from the M&C computer. The RLLT has the option of setting a timeout on the incoming message. Thus, if the equipment does not receive an information/command packet within a given time period, the associated RLLT exits the I/0 wait state and takes appropriate action. Radyne equipment is logically linked to the control bus via an Internal I/O Processing Task (IOPT) to handle frame sequencing, error checking, and handshaking. The IOPT is essentially a link between the equipment RLLT and the control bus. Each time the M&C computer sends a message packet, the IOPT receives the message and performs error checking. If errors are absent, the IOPT passes the message to the equipments RLLT. If the IOPT detects errors, it appends error messages to the packet. Whenever an error occurs, the IOPT notes it and discards the message; but it keeps track of the incoming packet. Once the packet is complete, the IOPT conveys the appropriate message to the RLLT and invokes an I/0 wait state (wait for next <SYNC> character). If the RLLT receives the packetized message from the sender before it times out, it checks for any error messages appended by the IOPT. In the absence of errors, the RLLT processes the received command sent via the transmitted packet and issues a message out system call to ultimately acknowledge the received packet. This call generates the response packet conveyed to the sender. If the IOPT sensed errors in the received packet and an RLLT timeout has not occurred, the RLLT causes the equipment to issue the appropriate error message(s) in the pending equipment response frame. To maintain frame synchronization, the IOPT keeps track of error-laden packets and packets intended for other equipment for the duration of each received packet. Once the packet is complete, the IOPT invokes an I/0 wait state and searches for the next <SYNC> character.
4-9
User Interfaces
If an acknowledgment (response) packet or a NAK packet is lost, corrupted, or not issued due to an error and is thereby not returned to the sender, the sender re-transmits the original information packet; but with the same <FSN>. When the intended receiver detects a duplicate packet, the packet is acknowledged with a response packet and internally discarded to preclude undesired repetitive executions. If the M&C computer sends a command packet and the corresponding response packet is lost due to a system or internal error, the computer times out and re-transmits the same command packet with the same <FSN> to the same receiver and waits once again for an acknowledgment or a NAK packet. To reiterate, the format of the message block is shown in Table 4-4, Link Level Protocol Message Block. Table 4-4. Link Level Protocol Message Block SOURCE DESTINATION FSN OPCODE ADDRESS ADDRESS
SYNC
COUNT
DATA BYTES
CHECKSUM
The RLLP Remote Port Packet structure is as follows: <SYNC> Message format header character that defines the beginning of a message. The <SYNC> character value is always 0x16. (1 byte) <BYTE COUNT> Number of bytes in the <DATA> field. (2 bytes) Identifies the address of the equipment from where the message
<DEST ADDR> Identifies the address of the equipment where the message is to be sent. (1 byte) <FSN> Frame sequence number ensures correct packet acknowledgment and data transfers. (1 byte) <OPCODE> This byte identifies the message type associated with the information data. The equipment processes the data according to the value in this field. Return error codes and acknowledgment are also included in this field. (2 bytes) <...DATA...> Information data. The number of data bytes in this field is indicated by the <BYTE COUNT> value. <CHECKSUM> The modulo 256 sum of all preceding message bytes excluding the <SYNC> character. (1 byte)
4-10
User Interfaces
Opcode 2403h 240Ah 240Eh 240Fh 2410h 2600h 2616h 261Bh 2C03h 2C04h 2C05h 2C06h 2C07h 2C08h 2C30h
Applies to base band frequency modems only. Applies to LB/ST modem configurations only.
4-11
User Interfaces
Opcode: <2401h>
<1>
Number of Nonvol bytes See Paragraph B.6. This is the number of configuration bytes and is an offset to the start of the status block. Configuration Bytes Binary Value, 1 Hz Steps Binary Value, 1 bps Steps Sweep Limits (Max of 42 kHz) Unsigned Binary Value in Hz
<4> <4>
<1>
Frequency Data Rate Sweep Boundary External Reference Freq. Reference Source Input Level Limit Demodulation Type Convolutional Decoder
<4>
<1>
0 = Internal, 1 = External
<1> <1>
Lower Level Limit, Binary Value, 1 dB Steps, Negative Sign Implied 0 = QPSK, 1 = BPSK, 2 = 8PSK, 4 = OQPSK
<1>
0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Unsigned Binary Unsigned Binary, 4 or 8
Reed-Solomon Reed-Solomon N Reed-Solomon K Reed-Solomon T RS Interleaver Depth Differential Decoder Descrambler Control
<1>
0 = Off, 1 = On
<1>
0 = Disable, 1 = Enable
4-12
User Interfaces
<1>
Descrambler Type
0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed-Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler 0 = Normal, 1 = Inverted Byte 1 - 2 = Buffer Size in ms Byte 3 - 4 = Buffer Size in Bytes 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT 0 = Normal, 1 = Inverted
<1> <4>
<1> <1>
<1> <1>
0 = Normal, 1 = 2047 Test Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault) Bit 7 = Receive Forced Alarm (0 = Mask, 1 = Allow) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Alarm Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Mask, 1 = Allow) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Loss (0 = Mask, 1 = Allow) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Bit 0 = -12 V Alarm
<1>
Alarm 2 Mask
<1>
Alarm 3 Mask
<1>
Alarm 4 Mask
<1>
Common Alarm 1
4-13
User Interfaces
Mask
Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Set to Zero Unsigned Binary Number of Bits in Measurement Period, in Powers 6 of Ten (ex: 6 = 10 Bits) 24 ASCII Characters 0 = Disabled, 1 = Enabled
<1> <1>
Reserved BER Measure Period Rx Circuit ID Rx Terrestrial Loopback Rx Baseband Loopback Rx IF Loopback Reserved Data Invert
<24> <1>
<1>
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled Ignore 0 = Normal, 1 = Invert Note: The following byte applies only if an Asynchronous, IDR or IBS Interface is installed. If not, ignore.
*<1>
Async Framing
0 = No Framing, 1 = 1/16 Async, 2 = 1/16 IBS, 3 = 96 Kbit IDR Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
0 = 1200, 1 = 2400, 2 = 4800, 3 = 9600, 4 = 19200, 5 = 50, 6 = 110, 7 = 300, 8 = 600 Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
0 = RS-232, 1 = RS-485 Note: The following byte applies only if an asynchronous interface card is installed. If not, ignore.
*<1>
Note: The following byte applies only if a synchronous Multiprotocol interface card is installed. If not, ignore. *<1> Multiprotocol Interface Card Interface Type 0 = V.35, 1 = RS-422, 2 = RS-232
4-14
User Interfaces
Note: The following byte applies only if a symmetric G.703 interface card is installed. If not, ignore. *<1> G.703 Interface Type 0 = G703T1AMI, 1 = G703T1B8ZS, 2 = G703BE1, 3 = G703UE1
Note: The following byte applies to all DMD2401 modems, regardless of interface type. <1> BPSK Symbol Pairing 0 = Normal, 1 = Swapped
Note: The following byte applies only if an IDR OR IBS interface card is installed. If not, ignore. <1> Receive Mode 0 = Closed Net Mode, 1 = IDR Mode, 2 = IBS Mode, 3 = D&I Mode Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> T1/E1 Frame Source 0 = Internal, 1 = External
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Receive IDR Overhead Mode 0 = Voice, 1 = 64 K Data
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Receive IDR / IBS Backward Alarms Mask Bit 0 = IDR Backward Alarm 1 / IBS Backward Alarm Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Mask, 1 = Allow) Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<1> Interface Type
4-15
User Interfaces
Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<2> Receive ESC Audio #1 Volume -20 to +10, Signed Binary Value in dB
Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, ignore *<2> Receive ESC Audio #2 Volume Alarm 5 Mask -20 to +10, Signed Binary Value in dB
*<1>
Bit 0 = IBS Satellite Multiframe Fault Bit 1 = IBS Satellite Frame Fault Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Mask, 1 = Allow) 0 = Disable, 1 = T1-D4, 2 = T1-ESF, 3 = PCM-30, 4 = PCM-30C, 5 = PCM-31, 6 = PCM-31C, 7 = T1-SLC96, 8 = T1-D4-S, 9 = T1-ESF-S Mapping of Satellite Channels to insert Terrestrial Timeslots Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Mask, 1 = Allow) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Mask, 1 = Allow) Force D&I Terrestrial Backward Alarm to be Trans (0 = Not Forced, 1 = Forced)
*<1>
Insert Mode
*<30> *<1>
*<1>
*<1>
*<30> *<1>
<1> <1>
0 = 75 ohms, 1 = 50 Ohms Status Bytes Decimal Point Implied Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault
4-16
User Interfaces
Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) <1> Alarm 2 Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail)
<1>
Alarm 3
<1>
Alarm 4
<1>
Common Alarm
<1> <1>
4-17
User Interfaces
<1>
Latched Alarm 2
Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Unsigned Binary Value Unsigned Binary Value
<1>
Latched Alarm 3
<1>
Latched Alarm 4
<1>
Reserved Error Counter Test 2047 Error Counter Raw BER Mantissa Corrected BER Mantissa Eb/No Offset Frequency
<2>
<2>
<2> <4>
Unsigned Binary Value, 2 Decimal Places Implied Unsigned Binary Value in Hz, Pos/Neg Indicated Below
4-18
User Interfaces
<2>
Test 2047 Mantissa Raw BER Exponent Corrected BER Exponent Test 2047 BER Exponent Offset Frequency Sign BER/EbNo Status
<1>
<1>
<1>
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition) Bits 6 & 7 = Spares Unsigned Binary Value Representing % Buffer Full (0 - 100 in 1% Steps) Unsigned Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value in -1 dB Steps, Negative Sign Implied) Bit 0 = IBS Satellite Multiframe Loss Bit 1 = IBS Satellite Frame Loss Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS Backward Alarm or IDR Backward Alarm 1 Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IBS Satellite Multiframe Loss Bit 1 = IBS Satellite Frame Loss Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm
<1>
<1> <1>
*<1>
Alarm 5
*<1>
Backward Alarms
*<1>
Latched Alarms 5
4-19
User Interfaces
Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) <1> *<1> Control Mode Insert Alarms 0 = Front Panel, 1 = Terminal, 2 = Computer RLLP Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Pass, 1 = Fail) In Hex, decimal point implied. Binary value, 1 sps steps Query a Demodulators Status Query response Decimal Point Implied Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault
*<1>
<1> <4>
Opcode: <240Ch>
<1> <1>
<1>
Alarm 2
<1>
Alarm 3
4-20
User Interfaces
(0 = Pass, 1 = Fail) <1> Alarm 4 Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarms (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Rx FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault
<1>
Common Alarm
<1> <1>
<1>
Latched Alarm 2
<1>
Latched Alarm 3
<1>
Latched Alarm 4
4-21
User Interfaces
Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) <1> Latched Common Alarm Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignore Unsigned Binary Value Unsigned Binary Value
Reserved Error Counter Test 2047 Error Counter Raw BER Mantissa Corrected BER Mantissa EbNo Offset Frequency Test 2047 BER Mantissa Raw BER Exponent Corrected BER Exponent Test 2047 BER Exponent Offset Frequency Sign BER/EbNo Status
<2>
<2>
Unsigned Binary Value, 2 Decimal Places Implied Unsigned Binary Value in Hz, Pos/Neg Indicated Below Bytes 1 - 2 = Unsigned Binary Value Test 2047 BER
<1>
<1>
<1>
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition)
4-22
User Interfaces
Bits 6 & 7 = Spares <1> Buffer Percent Full Input Level Input Level State Unsigned Binary Value Representing % Buffer Full (0 - 100 in 1% steps) Unsigned Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value in -1 dB Steps, Negative Sign Implied) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS Backward Alarm or IDR Backward Alarm 1 Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) 0 = Front Panel, 1 = Terminal, 2 = Computer RLLP Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Pass, 1 = Fail) In Hex, decimal point implied. Binary value, 1 sps steps
<1> <1>
*<1>
Alarm 5
*<1>
Backward Alarms
*<1>
Latched Alarm 5
<1> *<1>
*<1>
<1> <4>
4-23
User Interfaces
Opcode: <2406h>
Query a Demodulators Latched Alarms Query response Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 -7 = Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync/Multiframe Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare
<1>
Latched Alarm 1
<1>
Latched Alarm 2
<1>
Latched Alarm 3
<1>
Latched Alarm 4
<1>
*<1>
Latched Alarm 5
4-24
User Interfaces
Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Opcode: <2409h> Query a Demodulators Current Alarms Query response Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only Bits 6 - 7 Spares (0 = Pass, 1 = Fail) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault
<1>
Alarm 1
<1>
Alarm 2
<1>
Alarm 3
<1>
Alarm 4
<1>
Common Alarm 1
4-25
User Interfaces
Bit 7 = Spare (0 = Pass, 1 = Fail) *<1> Alarm 5 Bit 0 = IBS/IDR Satellite Multiframe Sync Loss Bit 1 = IBS/IDR Satellite Frame Sync Loss Bit 2 = Spare Bit 3 = IBS BER Alarm Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Pass, 1 = Fail) Query a Demodulators Eb/No, BER, Level, and AGC Voltage Query response Bytes 1 - 2 = Unsigned Binary Value Raw BER
*<1>
Insert Alarms
Opcode: <240Dh>
<2>
Raw BER Mantissa Corrected BER Mantissa EbNo Raw BER Exponent Corrected BER Exponent BER/EbNo Status
<2>
<2> <1>
Unsigned Binary Value, 2 Decimal Places Implied Byte 3 = Unsigned Binary Value Exponent
<1>
<1>
Bit 0 = Raw BER and Corrected BER Status (1 = Valid) Bit 1 = Test 2047 BER Status (1 = Valid) Bits 2 - 3 = EbNo Status (0 = EbNo is Invalid, 1 = EbNo is Valid, 2 = EbNo is Smaller Than Indicated Value, 3 = EbNo is Greater Than Indicated Value) Bit 4 = Raw BER Counter Overflow (1 = overflow condition) Bit 5 = Test 2047 BER Counter Overflow (1 = overflow condition) Bits 6 & 7 = Spares Binary Value in -1 dB Steps, Negative Sign Implied Signed Binary (0 = Equal to, 1 = Greater Than, -1 = Less Than Value in -1 dB Steps, Negative Sign Implied) In Hex, decimal point implied.
<1> <1>
<1>
4-26
User Interfaces
Opcode: <2437h>
Query a Demodulators Lock Status Query response Bit 0 = Demod Chipset Lock (0 = Unlocked, 1 = Locked) Bit 1 = Viterbi Lock (0 = Unlocked, 1 = Locked) Bit 2 = Reed-Solomon Lock (0 = Unlocked, 1 = Locked) Bit 3 = Sequential Lock (0 = Unlocked, 1 = Locked) Bits 4 7 = Spares (Decoders not in use default to locked state) Command a Demodulators Configuration Binary Value, 1 Hz Steps Binary Value, 1 BPS Steps Sweep Limits, Max of 42 kHz Unsigned Binary Value in Hz
<1>
Lock Status
Sweep Boundary External Reference Freq. Reference Source Input Level Limit Demodulation Type Convolutional Decoder
<1>
0 = Internal, 1 = External Lower Level Limit, Binary Value, 1 dB Steps, Negative Sign Implied 0 = QPSK, 1 = BPSK, 2 = 8PSK, 4 = OQPSK
<1> <1>
<1>
0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Note: Always set to Zero; as the T value is calculated from N and K. Unsigned Binary, 4 or 8
<1>
<1>
0 = Off, 1 = On
<1>
0 = Disable, 1 = Enable
<1>
0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler
4-27
User Interfaces
<1> <4>
0 = Normal, 1 = Inverted Byte 1 2 = Buffer Size in ms Byte 3 - 4 = Buffer Size in Bytes 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT 0 = Normal, 1 = Inverted
<1> <1>
<1> <1>
0 = Normal, 1 = 2047 Test Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = Receive Forced Alarm (0 = Mask, 1 = Allow) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Configuration Fault Bit 5 = Rx LNB Fault, LBST Only Bit 6 - 7 = Spares (0 = Mask, 1 = Allow) Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Mask, 1 = Allow) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Mask, 1 = Allow) Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V alarm Bit 3 = Temperature Bit 4 = Interface FPGA Fault
<1>
Alarm 2 Mask
<1>
Alarm 3 Mask
<1>
Alarm 4 Mask
<1>
4-28
User Interfaces
Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Mask, 1 = Allow) <1> <1> Reserved BER Measure Period Rx Circuit ID Rx Terrestrial Loopback Rx Baseband Loopback Rx IF Loopback Reserved Data Invert Set to Zero Unsigned Binary Number of Bits in Measurement Period in Powers of 6 Ten (ex: 6 = 10 Bits) 24 ASCII Characters 0 = Disabled, 1 = Enabled
<24> <1>
<1>
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled Set to Zero 0 = Normal, 1 = Invert Note: The following byte applies only if an Asynchronous, IDR or IBS Interface is installed. If not, set to zero.
*<1>
Framing
0 = No Framing, 1 = 1/16 Async, 2 = 1/16 IBS, 3 = 96 Kbit IDR Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
0 = 1200, 1 = 2400, 2 = 4800, 3 = 9600, 4 = 19200, 5 = 50, 6 = 110, 7 = 300, 8 = 600 Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
0 = RS-232, 1 = RS-485 Note: The following byte applies only if an asynchronous interface card is installed. If not, set to zero.
*<1>
Note: The following byte applies only if a synchronous Multiprotocol interface card is installed. If not, set to zero. *<1> Multiprotocol Interface Card Interface Type 0 = V.35, 1 = RS-422, 2 = RS-232
Note: The following byte applies only if a symmetric G.703 interface card is installed. If not, set to zero.
4-29
User Interfaces
*<1>
Note: The following byte applies to all DMD2401 modems, regardless of interface type <1> BPSK Symbol Pairing 0 = Normal, 1 = Swapped
Note: The following byte applies only if an IDR OR IBS interface card is installed. If not, set to zero. <1> Receive Mode 0 = Closed Net Mode, 1 = IDR Mode, 2 = IBS Mode, 3 = Drop & Insert Mode Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<1> T1/E1 Frame Source 0 = Internal, 1 = External
Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<1> Receive IDR Overhead Mode Receive IDR / IBS Backward Alarms Mask 0 = Voice, 1 = 64 K data
*<1>
Bit 0 = IDR Backward Alarm 1 / IBS Backward Alarm Bit 1 = IDR Backward Alarm 2 Bit 2 = IDR Backward Alarm 3 Bit 3 = IDR Backward Alarm 4 Bits 4 - 7 = Spares (0 = Mask, 1 = Allow) Note: The following byte applies only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero.
*<1>
Interface Type
If G.703 daughter card installed: 0 = G.703 Unbalanced E1, 1 = G.703 Balanced E1, 2 = G.703 T1, B8ZS If synchronous Multiprotocol daughter card is installed: 0 = V.35, 1 = RS-422, 2 = RS-232 Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero.
*<2>
4-30
User Interfaces
Note: The following two bytes apply only if an IDR OR IBS interface card is installed and the Receive Mode is set to IDR Mode. If not, set to zero. *<2> Receive ESC Audio #2 Volume Alarm 5 Mask -20 to +10, Signed Binary Value in dB
*<1>
Bit 0 = IBS Satellite Multiframe Fault Bit 1 = IBS Satellite Frame Fault Bit 2 = Spare Bit 3 = IBS Alarm if BER < 10-03 Bit 4 = IBS Prompt Alarm Bit 5 = IBS Service Alarm Bit 6 = Turbo Codec Lock Fault Bit 7 = Spare (0 = Mask, 1 = Allow) 0 = Disable, 1 = T1-D4, 2 = T1-ESF, 3 = PCM-30, 4 = PCM-30C, 5 = PCM-31, 6 = PCM-31C, 7 = T1-SLC96, 8 = T1-D4-S, 9 = T1-ESF-S
*<1>
Insert Mode
*<30> *<1>
Insert Map Mapping of Satellite Channels to Insert Terrestrial Timeslots Insert Alarm Mask Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received Bit 7 = CRC Calculation Fault (0 = Mask, 1 = Allow) Bit 0 = Backward Alarm Received from Satellite Bits 1 7 = Spares (0 = Mask, 1 = Allow) Force D&I Terrestrial Backward Alarm to be Trans (0 = Not Forced, 1 = Forced)
*<1>
*<1>
*<30> *<1>
Command a Demodulators Frequency Unsigned Binary Value in Hz Command a Demodulators Data Rate Unsigned Binary Value in BPS Command a Demodulators Sweep Boundary Set in 1 kHz Steps (Max of 42 kHz) Command a Demodulators Demodulation Type
Opcode: <2A02h>
<4> Data Rate
Opcode: <2A04h>
<1> Sweep Boundary
Opcode: <2A07h>
4-31
User Interfaces
<1>
Demodulation Type
Opcode: <2A08h>
<1> Convolutional Decoder
Command a Demodulators Convolutional Decoder 0 = None, 1 = Viterbi 1/2 Rate, 3 = Viterbi 3/4 Rate, 5 = Viterbi 7/8 Rate, 7 = Sequential 1/2 Rate, 9 = Sequential 3/4 Rate, 11 = Sequential 7/8 Rate, 14 = Trellis 2/3, 20 = TPC 0.793 2D, 21 = TPC 0.495 3D Command a Demodulators Differential Decoder 0 = Off, 1 = On
Opcode: <2A09h>
<1>
Differential Decoder
Command a Demodulators Reed-Solomon 0 = Disable, 1 = Enable Unsigned Binary Unsigned Binary Note: Always set to Zero; as the T value is calculated from N and K. Unsigned Binary, 4 or 8
RS Interleaver Depth
Opcode: <2A0Dh>
<1> Descrambler Control
Command a Demodulators Descrambler Control 0 = Disable, 1 = Enable Command a Demodulators Descrambler Type 0 = None, 1 = IBS Scrambler, 2 = V35_IESS, 3 = V35_CCITT, 4 = V35_EFDATA, 6 = OM73, 7 = Reed-Solomon Scrambler, 8 = V35_EFRS, 9 = TPC Scrambler
Opcode: <2A0Eh>
<1>
Descrambler Type
Opcode: <2A0Fh>
<1> Spectrum
Command a Demodulators Spectrum 0 = Normal, 1 = Inverted Command a Demodulators Buffer Clock 0 = External, 1 = Internal, 2 = EXC, 3 = RX SAT Command a Demodulators Buffer Clock Polarity 0 = Normal, 1 = Inverted
Opcode: <2A11h>
<1> Buffer Clock
Opcode: <2A12h>
<1>
Opcode: <2A17h>
4-32
User Interfaces
<1>
Operating Mode
0 = Stop, 1 = 2047 Test Command a Demodulators BER Exponent Number of Bits in Measurement Period in Powers of Ten (ex: 6 = 10 Bits) Command a Demodulators Terrestrial Loopback 0 = Disabled, 1 = Enabled Command a Demodulators Baseband Loopback 0 = Disabled, 1 = Enabled Command Center Buffer (No Parameters) Command a Demodulators Data Invert 0 = Normal, 1 = Inverted Command a Demodulators Buffer Size Byte 1 - 2 = buffer size in ms OR Byte 3 - 4 = buffer size in bytes (Either ms or bytes must be specified - the other field should be 0xFFFF)
6
Opcode: <2A1Ah>
<1> BER Measure Period
Opcode: <2A1Ch>
<1> Rx Terrestrial Loopback
Opcode: <2A1Dh>
<1> Rx Baseband Loopback
Opcode: <2A31h>
<4> Buffer Size
<1>
Modem ID
Opcode: <240Eh>
Hour Minute
Second
<1>
<1>
Opcode: <240Fh>
<1> <1>
<1>
Year Month
Day
0 99 0 11 0 30
4-33
User Interfaces
Opcode: <2410h>
0 99 0 11 0 30 0 23 0 59 0 59 Query Module Current Alarms Query response Bit 0 = Transmit Processor Fault Bit 1 = Transmit Output Power Level Fault Bit 2 = Transmit Oversample PLL Lock Fault Bit 3 = Composite Clock PLL Lock Fault Bit 4 = IF Synthesizer Lock Fault Bit 5 = Transmit FPGA Configuration Alarm Fault Bit 6 = Transmit Forced Alarm Bit 7 = External Reference PLL Lock Fault (0 = Pass, 1 = Fail) Bit 0 = Terrestrial Clock Activity Detect Fault Bit 1 = Internal Clock Activity Detect Fault Bit 2 = Tx Sat Clock Activity Detect Fault Bit 3 = Tx Data Activity Detect Fault Bit 4 = Terrestrial AIS (Tx Data AIS Detect Fault) Bit 5 = Transmit Ext BNC Clock Activity Detect Fault Bit 6 = Transmit Reed-Solomon Fault Bit 7 = Tx Calibration Fault (0 = Pass, 1 = Fail) Ignored Bit 0 = Receive Processor Fault Bit 1 = Signal Lock Fault Bit 2 = Receive Satellite AIS Fault Bit 3 = Rx AGC/Input Level Fault Bit 4 = Reed-Solomon Sync Fault Bit 5 = Reed-Solomon Excessive Errors Fault Bit 6 = Reed-Solomon Uncorrectable Word Fault Bit 7 = External Reference PLL Lock Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Underflow Bit 1 = Buffer Overflow Bit 2 = Buffer Under 10% Bit 3 = Buffer Over 90% Bit 4 = Receive FPGA Fault Bit 5 = Rx LNB Fault, LBST Only
Opcode: <240Ah>
*<1>
*<1>
<1> <1>
<1>
Demodulator Alarm 2
4-34
User Interfaces
Bits 6 - 7 = Spares (0 = Pass, 1 = Fail) <1> Demodulator Alarm 3 Bit 0 = IF Synthesizer Lock Detect Fault Bit 1 = Rx Oversample PLL Lock Detect Fault Bit 2 = Buffer Clock PLL Lock Detect Fault Bit 3 = Viterbi Decoder Lock Fault Bit 4 = Sequential Decoder Lock Fault Bit 5 = Rx 2047 Test Pattern Lock Fault Bit 6 = External Reference PLL Lock Fault Bit 7 = Frame Sync Fault (0 = Pass, 1 = Fail) Bit 0 = Buffer Clock Activity Detect Fault Bit 1 = External BNC Activity Detect Fault Bit 2 = Rx Satellite Clock Activity Detect Fault Bit 3 = External Reference PLL Activity Fault Bit 4 = High Stability Activity Detect Fault Bit 5 = High Stability PLL Fault Bit 6 = Eb/No Threshold Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignored Bit 0 = -12 V Alarm Bit 1 = +12 V Alarm Bit 2 = +5 V Alarm Bit 3 = Temperature Fault Bit 4 = Interface FPGA Fault Bit 5 = Battery Fault Bit 6 = RAM/ROM Fault Bit 7 = Spare (0 = Pass, 1 = Fail) Ignored Bit 0 = Terrestrial Frame Lock Fault (all modes) Bit 1 = Terrestrial Multiframe Lock Fault (PCM-30 and PCM-30C only) Bit 2 = Terrestrial CRC Lock Fault (PCM-30C and PCM-31C only) Bit 3 = Terrestrial Yellow Alarm Received (T1 only) Bit 4 = Terrestrial FAS Alarm Received (E1 only) Bit 5 = Terrestrial MFAS Alarm Received (PCM-30 and PCM-30C only) Bit 6 = Loss of Terrestrial Signaling (reported by DSP) Bit 7 = Spare (0 = Pass, 1 = Fail) Bit 0 = Frame Lock Fault Bit 1 = Multiframe Lock Fault Bit 2 = CRC Lock Fault. Valid only in T1-ESF and E1 CRC enabled Bit 3 = T1 Yellow Alarm Received Bit 4 = E1 FAS Alarm Received Bit 5 = E1 MFAS Alarm Received Bit 6 = E1 CRC Alarm Received
<1>
Demodulator Alarm 4
<1> <1>
<1>
*<1>
4-35
User Interfaces
Command a Modems Control Mode 0 = Front Panel, 1 = Terminal, 2 = Computer Command a Modules External Reference Source 0 = Internal, 1 = External Command a Modules External Reference Frequency Unsigned Binary Value in Hz
Opcode: <2616h>
<1> External Ref. Source
Opcode: <261Bh>
<4>
Opcode: <2C03h> Opcode: <2C04h> <1> <1> <1> Hour Minute Second
Command Clear all Latched Alarms (No Parameters) Command Set Time 0 - 23 0 59 0 59 Command Set Date 0 99 0 11 0 - 30 Command Set Time and Date 0 99 0 11 0 30 0 23 0 59 0 59 Command soft reset the modem to the power-up state (no parameters). Commend Eb/No Threshold Unsigned Binary Value, 0-99, Implied Decimal Point 0.0 through 9.9 dB
4-36
User Interfaces
Opcode: <2C30h>
70,000,000 Hz 140,000,000 Hz (**) 950,000,000 Hz (Hardware dependant) **Legacy 100-180 MHz only 2,048,000 BPS 25 kHz
<4> <1>
<00> <1F> <40> <00> <19> <00> <98> <96> <80> <00>
<5A>
<4>
<1>
10,000,000 Hz
0 = Internal
<1> <1>
-90 dBm <00> 0 = QPSK <01> 1 = Viterbi Rate <00> 0 = Disable 126 112 7 4 <01> 1 = On <01> 1 = Enable <02>
<00> <00> <01>
<1>
<1>
<1>
<1>
<1> <4>
2 = V35_IESS
0 = Normal
<1> <1> Buffer Clock <00> <04>
1 msec 4 Bytes
<00>
Buffer Clock
<00>
4-37
User Interfaces
Polarity
Operating Mode Alarm 1 Mask Alarm 2 Mask Alarm 3 Mask Alarm 4 Mask Common Alarm 1 Reserved
0 = SCTE 0 = Normal <00> <FF> 0 = Normal No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked No Alarms Masked 10 Bits
5
<24>
<1>
24 ASCII Spaces
<1>
<00> <00>
0 = Disabled
<00> <00>
0 = Disabled
0 = Disabled
<1>
Async Terrestrial Interface Type Multiprotocol Interface Type G.703 Interface Type BPSK Symbol Pairing
Receive Mode
<1>
<1>
<1> <1>
<1>
<1>
4-38
User Interfaces
0 = Voice
<2>
<2>
<0000>
0 = G.703 balanced E1 (G.703 Daughter Card or Universal Daughter Card Installed) or V.35 (Synchronous Multiprotocol Daughter Card Installed) 0 dB
<0000>
<FF>
<00> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <FF>
<1>
0 dB
<1> Insert Alarm Mask <1> Insert Backward Alarm Mask <30> Force Terrestrial Backward Alarm Insert Edit Map
<FF>
<00>
<1>
No Alarms Masked
<01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <01> <00>
Rx Impedance
No Alarms Masked
0 = Not Forced
0 = 75 Ohms
4-39
User Interfaces
4-40
User Interfaces
4-41
5.0
MD2401 Connections
All MD2401 connections are made to labeled connectors, and to any optional interfaces installed in slots located on the rear of the unitnection interfacing to the MD2401 must be the appropriate mating connector. Refer to Figure 5-1 for connector locations.
Shielded cables with the shield terminated to conductive backshells are required in order to meet EMC Directives. Cables with insulation flammability ratings of 94 VO or better are required in order to meet Low Voltage Directives.
5.1
Power
The unit is powered from a 100 240 VAC, 50 60 Hz, 1A source. The switch located on the left hand side (as viewed from the rear of the unit) turns power on and off to the unit. A chassis ground connection can be made at the #10-32 threaded stud located to the lower right of the AC Power Connector.
5-1
5.2
The Terrestrial Data Terminal Interface Port (J1) is used for synchronous data. It is a Female 25Pin D-Sub Connector. Refer to Table 5-1 for connector pinouts. Table 5-1. Terrestrial Data Terminal Interface Port (J1) - 25-Pin D Female Pin No. 1 3 6 7 8 9 10 16 17 18 20 21 22 23 25 Signal Name Shield RXD-A DSR GND CD-A RXC-B CD-B RXD-B RXC-A TX-232 Unused RX-232 Unused GND Unused RS-232 (Terminal) Demod is Phase Locked Receive Clock Demod is Phase Locked Receive Data Receive Clock RS-232 (Terminal) Receive Data Data Set Ready (Always True) Description Direction --Output Output --Output Output Output Output Output Input --Output -------
5-2
5.2.1.3 Automatic Demodulator card detection and dedicated HDLC decoders The MD2401 Ethernet interface automatically detects the presence and operational readiness of each of the demodulator cards. In addition, the interface provides a dedicated HDLC decoder for each demodulator so that received satellite traffic from multiple demodulators is processed simultaneously in real-time. Valid Ethernet packets are output from the individual decoders to the QOS processor as soon as theyre received. 5.2.1.4 Ingress Quality of Service When Ethernet packets arrive simultaneously from two or more demodulators, the Queue Manager accepts the packet from demodulator 1 first, demodulator 2 second, demodulator 3 third, and demodulator 4 last at gigabit rates insuring that all received packets from even the lowest priority demodulator can be accepted and processed before new packets arrive. 5.2.1.5 Egress Quality of Service The Queue Manager determinations the type of QOS information available in each Ethernet packet in real-time and places the packet in the appropriate output queue automatically. This QOS determination is compatible with various industry standards and is performed in the following manner: 1. If the packet contains an optional IEEE 802.3ac tag containing IEEE 802.1p priority information, the information in this tag is used to determine the packets priority. 2. When an IEEE 802.3ac tag is not present a) If the packet contains an IPv4 header, the packets priority is determined by the Type of Service field (RFC 791) or Differentiated Services field (RFC 2474) contained in header. b) If the packet contains an IPv6 header, the Traffic Class field (RFC 2460) is used to determine the packets priority.
5.2.1.6 Prioritized Queues The MD2401 Ethernet Interface maintains four prioritized queues and uses a weighted output scheme to insure that higher priority traffic egresses quickly, while at the same time insuring that lower priority traffic is not stalled indefinitely. Figure 5-2 illustrates these queues, their output weights, and the types of traffic typically assigned to those queues.
5-3
Network Queue Voice Network Controls Critical Queue Video Controlled Load Immediate Queue Excellent Effort Best Effort Routine Queue Bulk Traffic
8 x Output
Packets In
Queue Manager
1 x Output
5.3
EXT REF
The External Reference Input (J2) is supplied to allow the customer to phase-lock the demodulators internal oscillator to an external reference. All internally generated frequencies within the modem will attain the stability of the applied external reference. This female BNC Connector accepts a 1.5 5 Vp-p @ 50. The frequency range of the external reference is 1 10 MHz in 8 kHz steps.
5.4
The Serial Control Interface Port (J3) is used for remote monitor and control of the demodulator. It is a Female 25-Pin D-Sub Connector. Refer to Table 5-2 for connector pinouts. Table 5-2. Serial Control Interface Port (J3) - 25-Pin D Female P2 No. A6 A7 A8 A9 A17 Pin No. 9 10 16 3 7 GND RXD RS-232 Signal Name TXD RS-485 Signal Name TXD-B TXD-A RXD-B RXD-A GND Direction Output Output Input Input ---
5-4
J3 Serial Control Interface allows user to directly access each demodulator individually. J5 is the primary mode of serial control. Do not use J3 and J5 simultaneously.
5.5
RX IN
5.5.1 L-Band
The Receive Input (J4) is the 950 1750 MHz Demodulator IF Input. It is a SMA (1) Connector.
The user must set demodulator addresses prior to connecting to remote port. Refer to Section 5.7, Remote Addresses.
5-5
Table 5-5. S1 DIP Switches Position 5 off on Control Type RS-485 (default) RS-232
5-6
5-7
6-1
6-2
Technical Specifications
Technical Specifications
7
BPSK: QPSK: QPSK: QPSK: OQPSK: OQPSK: OQPSK: 8PSK: 1/2 Rate 1/2 Rate 3/4 Rate 7/8 Rate 1/2 Rate 3/4 Rate 7/8 Rate 2/3 Rate 4.8 to 1024 Kbps 9.6 to 2500 Kbps 14.4 to 3750 Kbps 16.8 to 4375 Kbps 9.6 Kbps to 2500 Kbps 14.4 Kbps to 3750 Kbps 16.8 Kbps to 4375 Kbps 64 Kbps to 5000 Kbps
7.0 Introduction
This section defines the technical performance parameters and specifications for the MD2401 Satellite Demodulator.
7-1
Technical Specifications
7.3
Standard Options
A Reed-Solomon codec Intelsac. Turbo Codec per IESS 315
7.4
Environmental
100 to 240 VAC, 50 to 60 Hz, 1.0 A (IEC 3-Pin Power Connector With Switch) 0 to 50 C, 95% Humidity, Noncondensing -20 to 70 C, 99% Humidity, Noncondensing
7.5
Physical
19 W x 15 D x 3.5 H (48.26cm x 43.2cm x 8.89 cm) 9.2 W x 8.6 D (23.36cm x 21.84 cm) 8 pounds (3.6 Kg)
7-2
Technical Specifications
7.6
BER Charts
1.00E-03
V3 V4 V10 V6 & V8
1.00E-04
1.00E-05
V7
3.0
4.0
5.0
9.0
10.0
11.0
6.0
7.0
8.0
Eb/No (dB)
Figure 7-1. BER Chart Concatenated Reed-Solomon
7-3
12.0
1.00E-06
1.00E-07
1.00E-08
1.00E-09
1.00E-10
Technical Specifications
1.00E-03
T2
IESS Specification 2/3 Rate Radyne Internal Specification 2/3 Rate Typical 2/3 Rate IESS Specification w /RS 2/3 Rate Radyne Internal Specification w /RS 2/3 Rate Typical w /RS 2/3 Rate 2/3 Rate Standard Tests 8PSK Uncoded Theory
1.00E-04
T3
1.00E-05
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
Eb/No (dB)
7-4
12.0
1.00E-06
1.00E-07
1.00E-08
1.00E-09
1.00E-10
Technical Specifications
1.00E-03
TPC7
1.00E-04
1.00E-05
TPC2
4.5
5.5
2.0
2.5
3.0
3.5
4.0
5.0
Eb/No
Figure 7-3. BER Chart B/O/QPSK Turbo
7-5
6.0
1.00E-06
1.00E-07
TPC8
1.00E-08
1.00E-09
1.00E-10
Technical Specifications
1.00E-02
TPC3
1.00E-03
1.00E-04
2.0
3.5
5.0
5.5
7.0
2.5
3.0
4.0
4.5
6.0
6.5
7.5
Eb/No
Figure 7-4. BER Chart 8PSK Turbo
7-6
8.0
1.00E-05
TPC10
1.00E-06
TPC9
1.00E-07
TPC4
1.00E-08
1.00E-09
Technical Specifications
7-7
Technical Specifications
7-8
Glossary
Glossary
G
A Ampere Alternating Current Analog to Digital Converter Automatic Gain Control Alarm Indication System. A signal comprised of all binary 1s. Above Mean Sea Level American National Standards Institute American Standard Code for Information Interchange Application Specific Integrated Circuit Automatic Test Equipment B
Bit Error Rate Bit Error Rate Test Binary Digit or Built-In Test Built-In Test Equipment Bits Per Second Binary Phase Shift Keying Block Upconverter 8 Binary Digits
G-1
Glossary
C C CATS CA/xxxx CD-ROM CLK cm COM CPU CRC CW C/N Celsius Computer Aided Test Software Cable Assembly Compact Disk Read Only Memory Clock Centimeter Common Central Processing Unit Cyclic Redundancy Check. A system of error checking performed at the transmitting and receiving stations. Continuous Wave Carrier to Noise Ratio D DAC dB dBc dBm DC Demod DPLL DVB D&I Digital to Analog Converter Decibels Decibels Referred to Carrier Decibels Referred to 1.0 milliwatt Direct Current Demodulator or Demodulated Digital Phase Locked Loop Digital Video Broadcast Drop and Insert E Eb/N0 EEPROM EIA EMI ESC ES-ES ET Ratio of Energy per bit to Noise Power Density in a 1 Hz Bandwidth. Electrically Erasable Programmable Read Only Memory Electronic Industries Association Electromagnetic Interference Engineering Service Circuits Earth Station to Earth Station Communication Earth Terminal
G-2
Glossary
F F FAS FCC FEC FIFO FPGA FW Fahrenheit Frame Acquisition Sync. A repeating series bits, which allow acquisition of a frame. Federal Communications Commission Forward Error Correction First In, First Out Field Programmable Gate Arrays Firmware G g GHz GND Force of Gravity Gigahertz Ground H HSSI HW Hz High-Speed Serial Interface Hardware Hertz (Unit of Frequency) I IBS IDR I/O IEEE IESS IF INTELSAT ISO I&Q Intelsat Business Services Intermediate Data Rate Input/Output International Electrical and Electronic Engineers INTELSAT Earth Station Standards Intermediate Frequency International Telecommunication Satellite Organization International Standards Organization Analog In-Phase (I) and Quadrature Signals (Q) J J Joule
G-3
Glossary
K Kbps Kbps kg kHz Ksps Kilobits per Second Kilobytes per Second Kilogram Kilohertz Kilosymbols per Second L LCD LED LO Liquid Crystal Display Light Emitting Diode Local Oscillator M mA Mbps MFAS MHz MIB Mod ms or msec M&C Milliampere Megabits per Second Multi-Frame Acquisition Sync. See FAS. Megahertz Management Information Base Modulator or Modulated Millisecond Monitor and Control N NC NO ns NVRAM N/C Normally Closed Normally Open Nanoseconds Non-Volatile Random Access Memory No Connection or Not Connected O OQPSK Offset Quadrature Phase Shift Keying P PC PD Buffer PLL ppb ppm P/N Personal Computer Plesiochronous/ Doppler Buffer Phase Locked Loop Parts per Billion Parts per Million Part Number
G-4
Glossary
Q QAM QPSK Quadrature Amplitude Modulation Quadrature Phase Shift Keying R RAM RF ROM rms RU Rx RxD R-S Random Access Memory Radio Frequency Read Only Memory Root Mean Square Rack Unit. 1 RU = 1.75/4.45 cm Receive (Receiver) Receive Data Reed-Solomon Coding. Reed-Solomon codes are block-based error correcting codes with a wide range of applications in digital communications and storage. S SCC SEQ SYNC Satellite Control Channel. A Radyne ComStream satellite format. Sequential Synchronize T TBD TM TPC TRE TT Tx TxD To Be Designed or To Be Determined Technical Manual Turbo Product Codes Trellis Terminal Timing Transmit (Transmitter) Transmit Data U UART UUT Universal Asynchronous Receiver/Transmitter Unit Under Test V V VAC VCO VDC VIT Volts Volts, Alternating Current Voltage Controlled Oscillator Volts, Direct Current Viterbi Decoding
G-5
Glossary
WXYZ W Watt Misc. s 16QAM 8PSK Microsecond 16 Quadrature Amplitude Modulation 8 Phase Shift Keying
G-6