Topic03C The Freescale MC9S12X Assembly Instruction Set Part 2

Topic Video 03C
Assembly Language: Instructions 2
3C
Saturday, 22 August 2009
The HS12 Instruction Set

Arithmetic Instructions
The arithmetic instruction set enables arithmetic operations to be performed between an accumulator and an operand. The arithmetic operations supported by the HC12 are: Add and Subtract Multiply and Divide

Arithmetic Instructions: Add and Subtract
Adding and Subtracting is primarily done using the A, B, or D accumulators in combination with an immediate value or memory location (variable). Accumulator A Accumulator B Accumulator D Addition ADDA ADDB ADDD Subtraction SUBA SUBB SUBD

Arithmetic Instructions: Add and Subtract Examples
... LDAA ADDA ... ... MOVB LDX MOVB LDAA ADDA ...
#32 #12
;A = 32 +12
#45,Data #Data #12,Variable 0,X Variable
;A=45 +12

Arithmetic Instructions: Add and Subtract
When adding or subtracting multi-byte or multi-word numbers, the carry or borrow bit must be passed on the next operation. Accumulator A Accumulator B
Add with Carry Subtract with Burrow
ADCA ADCB
SBCA SBCB

Arithmetic Instructions: Add and Subtract Examples
... LDAA ADDA STAA LDAA ADCA STAA ...
#$32 #$12 LSB #$67 #$78 MSB
;A = $32 +$12 ;LSB = $32+$12 ;A=$67+$78 + C ;MSB =$67+$78 + C

Arithmetic Instructions: Decimal Adjustment When performing arithmetic on packed binary coded decimal numbers which contains two decimal numbers, an error will occur when the numbers are added. After performing and addition between two such numbers the DAA command must immediately follow. Using the status of the half-carry bit in the condition code register the DAA command will correct for any BCD errors. If the Half-Carry Flag is set in the CCR then it will add 6 on to the result.

Arithmetic Instructions: Negating and Sign Extension The arithmetic instruction set contains commands capable of performing twos complement negation. It is also capable of extending the sign of an 8 bit number to form an equivalent 16 bit number. This would be useful if you wanted to added a negative 8 bit number to a 16 bit number. Negate Memory Negate Accumulator A Negate Accumulator B Extend Sign NEG NEGA NEGB SEX

Arithmetic Instructions: Negating and Sign Extension
Example
... LDAA #32 ;A=32 (%00100000) NEGA ... ;A=-32 (%11100000)

Arithmetic Instructions: Multiply
On the HS12 we can multiply both 8 and 16 bit numbers, and these number can be signed or unsigned. Multiplying eight bit numbers When multiplying eight bit numbers, the number to be multiplied are loaded into the accumulators A and B. The multiply command is issued and the result is made available in accumulator D.
Unsigned 8 bit Multiply
MUL
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Example
.... LDAA LDAB MUL ... #5 #6 ; A=5 ; B=6 ; D=5 * 6 = 30
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Multiplying sixteen bit numbers When multiplying sixteen bit numbers, the numbers to be multiplied are loaded into the D accumulator and the Y index register. The multiply command is issued and the result is made available, the most signicant word is in Y and the least signicant in D.
Unsigned 16 bit Multiply Signed 16 bit Multiply EMUL EMULS
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Example
.... LDD #-250 LDY #6 EMULS ... ; D=-250 ; Y=6 ; Y:D=-250 * 6 = -1500
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Arithmetic Instructions: Division
The CPU12 instruction set includes instruction for the division of 16 and 32 bit numbers. Dividing 16 bit numbers The number to be divided is loaded into D and the number to divide it by is loaded into X. The divide command is then issued and the result is available in X and the remainder in D.
Unsigned 16 bit Division Signed 16 bit Division
IDIV IDIVS
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Example
.... LDD #32 LDX #6 IDIV ... ; D=32 ; X=6 ; 32/6 (X=5, D=2)
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Dividing 32 bit numbers The number to be divided is loaded into Y:D and the number to divide it by is loaded into X. The divide command is then issued and the result is available in Y and the remainder in D.
Unsigned 32 bit Division Signed 32 bit Division
EDIV EDIVS
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Example
.... LDY #$1234 LDD #$0032 LDX #$6666 EDIV ... ; ; ; ; ; Y=$1234 D=$0032 X=$6666 $12340032/$6666 (Y=$2d82,D=0)
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Logic Instructions The CPU12 instruction set includes logical functions such as AND, OR, XOR and ones complement which can be applied to accumulator A, B or a memory location.
Accumulator A Accumulator B Memory AND ANDA ANDB AND OR ORAA ORAB ORA XOR EORA EORB EOR 1's Compliment COMA COMB COM
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Logic Instructions
Example
.... LDDA ANDA ... #23 #08 ; A=23 ; A=A&8 = 0
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Data Test Instructions
BITA BITB CBA CMPA CMPB CPD CPX CPY CPS Test Bits in A Test Bits in B Operand Operand R=A&Operand R=B&Operand R=B-A R=A-Operand R=B-Operand R=D-Operand R=X-Operand R=Y-Operand R=SP-Operand Compare A to B
Compare A to Memory Compare B to Memory Compare D to Memory Compare X to Memory Compare Y to Memory Compare SP to Memory
Operand Operand Operand Operand Operand Operand
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We can also test if a accumulator A, B, or a memory location is negative or zero.
Test if memory loccation <=0

Test if Accumulator A <=0 Test if Accumulator B <=0
TST TSTA TSTB
Operand
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Examples
.... LDAA TSTA ... .... LDAA CMPA ... #23 #23 ; A=23 ; Z=1,N=0,H=0,V=0,C=0 #23 ; A=23 ; Z=0,N=0,H=0,V=0,C=0
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Conditional Branch Instructions A program is rarely sequential, there are many times when the program ow needs to be changed because of some event. Condition branch instructions are used to change the program ow. The operation of these instructions is directly controlled by the status of the N, V, H, C, and Z ags in the condition code register. The ags in the CCR are set depending on the result of previously executed instructions. Due to these commands the controller in fact works more like a computer instead of a calculator that sequentially manipulates data.
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Conditional Branch Instructions
There are two forms of the branching instructions, those capable of only branching +127 to -128 memory locations from the current program counter value (short branches), Short Branches (signed)
Branch if lessthan BLT BGT BLE BGE BVS BVC Label Label Label Label Label Label < > <= >= V=1 V=0
Branch if greaterthan
Branch if lessthan or equal to Branch if greaterthan or equal to Branch if Overow
Branch if no Overow
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Short Branches (Unsigned)
Branch if equal Branch if not equal Branch if minus Branch if Plus BEQ BNE BMI BPL BCS BCC Label Label Label Label Label Label == != <0 >0 C=1 C=0
Branch if Carry Set
Branch if Carry Clear
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Long Branches
Capable of branching anywhere.
Long Branches (Unsigned)

Branch if equal Branch if not equal Branch if minus Branch if Plus Branch if Carry Set LBEQ LBNE LBMI LBPL LBCS LBCC Label Label Label Label Label Label == != <0 >0 C=1 C=0
Branch if Carry Clear
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Long Branches (signed)

Branch if lessthan LBLT LBGT LBLE LBGE LBVS LBVC Label Label Label Label Label Label < > <= >= V=1 V=0 Branch if greaterthan
Branch if lessthan or equal to Branch if greaterthan or equal to Branch if Overow
Branch if no Overow
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Examples
.... LDAA BNE ... #23; A=23,Z=0,N=0,H=0,V=0,C=0 LOOP ; IF (Z==0) branch to LOOP
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Loop Primitive Instructions
Used for creating loop structures. The counter variable may be contain in any of the registers A, B, D, X, Y, or SP.
Decrement Counter and branch if (counter != 0) Decrement Counter and branch if (counter == 0) Increment Counter and branch if (counter != 0) Increment Counter and branch if (counter == 0) Test Counter and branch if (counter != 0)
DBNE DBEQ IBNE IBEQ TBNE TBEQ
Test Counter and branch if (counter == 0)
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Loop Primitive Instructions Example
.... DBNE ... A,LOOP ; if(A!=0) Branch to label LOOP.
A=A - 1
Back to LOOP
T
A!=0
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Unconditional Branch and Jump Instructions
When we want to forcibly change the program ow we can use an unconditional jump and branch instruction. An unconditional jump or branch instruction always change the ow of the program without the need to check the status of the condition code register. Jump to memory location Jump to Subroutine JMP JSR BRA BSR Label Label Label Label
Branch Always to memory location Branch to Subroutine
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Unconditional Branch and Jump Instructions Example
.... LOOP: BRA ... LOOP ; Branch always to label LOOP.
...
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Condition Code Register Instructions The condition code register instructions consist of two instructions for setting and clearing the appropriate bits in the CCR. ORCC can be used for setting the bits. ORCC #%10000000
This will set the msb of CCR (S=1) ANDCC can be used for clearing the bits. ANDCC #%01111111
This will clear the msb of the CCR (S=0)
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Interrupt Instructions There exist two interrupt based commands:
Clear the I bit in CCR (enable all maskable interrupts)
CLI SEI
Set the I bit in the CCR( disable all maskable interrupts)
CLI and SEI are no longer directly supported by CPU12 however many assemblers translate this mnemonic to the CPU12 equivalent of:
CLI SEI ANDCC #%11101111 ORCC #%00010000
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Other Instructions
Other instructions supported by the HS12 include: No Operation NOP
This instruction tells the processor to do nothing, but it takes the processor exactly 1 clock cycle to do it.
Saturday, 22 August 2009 35
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Saturday, 22 August 2009 36

Topic03C The Freescale MC9S12X Assembly Instruction Set Part 2

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Topic03C The Freescale MC9S12X Assembly Instruction Set Part 2

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Topic Video 03C

Assembly Language: Instructions 2

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

#45,Data #Data #12,Variable 0,X Variable

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

#$32 #$12 LSB #$67 #$78 MSB

;A = $32 +$12 ;LSB = $32+$12 ;A=$67+$78 + C ;MSB =$67+$78 + C

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Unsigned 16 bit Division Signed 16 bit Division

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Unsigned 32 bit Division Signed 32 bit Division

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Operand Operand Operand Operand Operand Operand

Saturday, 22 August 2009

The HS12 Instruction Set

We can also test if a accumulator A, B, or a memory location is negative or zero.

Test if memory loccation <=0

TST TSTA TSTB

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Saturday, 22 August 2009

The HS12 Instruction Set

Branch if lessthan or equal to Branch if greaterthan or equal to Branch if Overow

Saturday, 22 August 2009

The HS12 Instruction Set

Branch if Carry Set

Branch if Carry Clear

Saturday, 22 August 2009

The HS12 Instruction Set