SNSCT

SNS COLLEGE OF TECHNOLOGY, COIMBATORE 641 035 B.E. / B.Tech. DEGREE EXAMINATION, SEP-2012 INTERNAL ASSESSMENT TEST NO.:4(Model) II B.E. [Mechatronics Engineering] III Semester EC3204 DIGITAL ELECTRONICS Time: 3 Hours Date: 10.09.2012 Maximum marks: 100 PART A Answer ALL questions 10 X 2 = 20

13 (a). (i) Using positive edge triggering SR flip-flop design a counter which counts in the following sequence : 000, 111, 110, 101, 100, 011, 010, 001, 000, . . . (12) (ii) Give the characteristic equation and the state diagram of JK and SR flip flops. (4) (Or) 13 (b). (i) Differentiate Latch and Flip flop. (2) (ii) Design the sequential circuit for the state diagram shown below use JK-flip-flops. (14)

1.) What are called dont care conditions? 2.) Perform 01000 01001 subtractions using 2s complement method. 3.) Define Minterm & Maxterm. 4.) Draw a full subtractor using two half subtractors 5.) Implement AND, OR gate using only NAND gate. 6.) Design procedure for code converters. 7.) Differentiate Moore circuit and Mealy circuit? 8.) Give the excitation table of a JK,SR,T and D flip-flop. 9.) What is the difference between PAL and PLA? 10.) Compare performance of ECL with TTL

PART B

Answer ALL questions

11. (a).(i) Convert the octal number 635.215 into binary, decimal and hexadecimal numbers. (4) (ii) Simplify the following expression in SOP and POS by using four variable K-map xz + yz + yz + xy (12) (Or) 11. (b).(i) Simplify the given function using tabular method. F(A, B, C, D) = (0, 2, 3, 6,7)+ d (5, 8, 10, 11, 15) (12) (ii) Perform Excess-3 subtraction for 7- 4 and 4 - 7. (4) 12 (a) Design and implement a 8421 to gray code converter. Realize the converter using NAND gates. (16) (Or) 12 (b). Implement the following multiple output combinational logic circuit using a 4-line to 16-line decoder (16) Y1 =ABCD + ABCD + ABCD + ABCD + ABCD + ABCD Y2= ABCD + ABCD + ABCD + ABCD Y3 = ABCD + ABCD + ABCD

14 (a) Design an asynchronous sequential circuit that has two inputs x1 and x2 and one output z. the output z=1 if x1 changes from 0 to , z=0 if x2 changes from 0 to 1, and z=0 otherwise. Realize the circuit using JK flip-flops. (16) (Or) 14(b) Design an asynchronous circuit that will output only the first pulse received and will ignore any other pulses. Design it by using D f/f. (16) 15 (a)(i) Design a PLA circuit to implement the logic functions ABC + ABC + AC and ABC + BC (5) (ii)Design a BCD to Excess-3 code converter and implement it by using PAL. (6) (iii) Describe the concept, working and application of FPGA. (5) (Or) 15(b) (i) Discuss about TTL family Parameters. (6) (ii) Sketch the typical transfer characteristics of a CMOS inverter. (5) (iii) write notes on ROM and its types. (5)
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