Design Hierarchy In HSPICE Use of Subcircuits, measurement, and Parameters

Reza Nekovei Electrical Engineering and Computer Science Department Texas A&M University-Kingsville

Introduction This hand out illustrates a few important techniques for design and measurement of larger circuits using HSPICE: 1. Hierarchical design 2. Delay and power measurement 3. Parametric design Hierarchical design To show how the hierarchy can simplify the netlist (using subcircuits), first the netlist for a NAND gate in figure 1 is created. M1 M2 M3 M4 C A C B C B M34 Vdd vdd M34 A 0 Vdd cmosp L=1U W=10U Vdd cmosp L=1U W=10U 0 cmosn L=1U W=10U 0 cmosn L=1U W=10U

Figure 1. Circuit and logic gate representation for a two input NAND gate.

Next, four NAND gates are used to create an EXOR gate as shown in figure 2. A subcircuit defines the NAND gate, then reuse it in the EXOR gate design (EXOR.sp file): Netlist for EXOR based on 4 NAND gates * Reza Nekovei Oct/17/03 .INCLUDE MOSModels.txt .OPTIONS POST PROBE *Make Vdd Global and visible in subcircuit .GLOBAL Vdd *define NAND subcircuit .SUBCKT NAND A B C M1 C A Vdd Vdd cmosp L=1U W=10U M2 C B vdd Vdd cmosp L=1U W=10U M3 C B M34 0 cmosn L=1U W=10U M4 M34 A 0 0 cmosn L=1U W=10U .ENDS NAND *define the EXOR using 4 NAND X1 A B 13 NAND X2 A 13 24 NAND X3 13 B 34 NAND X4 24 34 C NAND Cload C 0 0.1p $ add load capacitor *set input stimulus VA A 0 PULSE 0 5 8n 1n 1n 10n 20n $input pulse to A VB B 0 Pulse 0 5 2n 1n 1n 10n 20n $input pulse to B *Power up Vdd Vdd 0 5 .probe v(A) V(B) v(C) .tran .01N 20N .END $observe voltages at A, B and C $run for 20 nsec

Figure 2. EXOR gate and its NAND gate based design.

Finally the EXOR is simulated and verified as shown:

Delay and Power measurements Measure command can help obtain accurate measurement and record them in a text transient measurement file (filename.mt#). The following command can find the average power consumption over given time: .measure avg_pow AVG power from=1n to=20n The keyword power indicates the instantaneous power dissipation of the circuit. In order to create measurement outputs add MEASOUT to the options list: .OPTIONS PROBE POST MEASOUT The following would be written to the measurement file (EXOR.mt0) for the above example:

$DATA1 SOURCE='HSPICE' VERSION='U-2003.09 ' .TITLE 'netlist for exor based on 4 nand gates' avg_pow temper alter# 9.580e-04 25.0000 1.0000

The following are measurement statements for propagation delay at Vdd/2 (50% of Vdd) for the high-to-low (fall) and low-to-high (rise) cases: .measure tpLH trig V(in) val='5.0/2' fall=1 targ v(out) val='5.0/2' rise=1 .measure tpHL trig V(in) val='5.0/2' rise=1 targ v(out) val='5.0/2' fall=1 Here is their result reported in the filename.mt0 in text: $DATA1 SOURCE='HSPICE' VERSION='U-2003.09 .TITLE 'inverter circuit' tpLH tpHL temper alter# 1.321e-10 1.613e-11 25.0000 1.0000 The measurement details are also available in the listing file as: tpLH= tpHL= 1.3206E-10 1.6127E-11 targ= targ= 1.6632E-08 1.0516E-08 trig= trig= 1.6500E-08 1.0500E-08 '

Where the delays are the difference between trigger times (trig) and target times (targ). Parametric design The netlist can be simplified by using parameters and algebraic expressions to define relationships among devices. The following example shows how to use parameters to set MOSFET sizes. .param .param .param .param .param .param lambda='.25u' $set the scale to .25 micron wn='3*lambda' $ NMOS width is 3 times scale wp='wn*2' $ PMOS is twice the NMOS L1='2*lambda' $ Channel length Lsource='3*lambda' Ldrain='3*lambda'

* Use the parameters to pass the transistor sizes M1 OUT IN VCC VCC cmosp L='L1' W='wp' +PS='2*(Lsource+wp)' PD='2*(Ldrain+wp)' +AS='Lsource*wp' AD='Ldrain*wp'

M2 OUT IN 0 0 cmosn L='L1' W='wn' PS='2*(Lsource+wn)' +PD='2*(Ldrain+wn)' AS='Lsource*wn' AD='Ldrain*wn' The following examples illustrate more uses for parameters and algebraic expressions: .measure imax MAX I(nodename) .measure vmax MAX V(nodename) .measure ivmax param='vmax*imax' *Measruring energy in a given interval(10ns to 30ns) .measure trans Icc INTEG I(Vcc) From=10ns TO=30ns .measure E_cct Param='-Icc*Vdd' or to print the result using PAR(): .print IVMAX = PAR('ivmax') The .ALTER statement can be used before the .END statement to rerun a simulation using different parameters and data. The following example uses this statement to create two runs (in filename.tr0 and filename.tr1) for two load capacitances (cL=0.5pF and cL=1.5pF): CL out 0 0.5p $ the original load (goes into file.tr0) * rerun the simulation using this load (goes into file.tr1) .ALTER cL out 0 1.5p The .IC statement can be used to set circuit initial conditions, here is an example that set initial voltage for a node to 5volts: .IC v(nodename)=5v Finally, to run the simulation over a given range you can use the SWEEP statement. The following statement repeats transient analysis over the give temperature range:
.TRAN 200p 20n SWEEP temp 80 90 10

and its output is shown in the following figure. Here is one more example showing the use of parametric load with sweep transient: *Use parametric load sweep to find cross points .param load='1fF' Cload node 0 'load' .trans 0.5n 35n sweep load 1fF 12fF 1fF

Plot of v(in) and v(out) versus time; where v(out) is varying from 80 degrees to 90 degrees and values calculated every 10 degrees.