Vestel 17mb37 SM

TABLE OF CONTENTS
1. INTRODUCTION...................................................................................................................... 6
2. TUNER....................................................................................................................................... 7
2.1.
General description of TDTC-G101D: .......................................................................... 7
2.2.
Features of TDTC-G101D: ............................................................................................ 7
2.3.
Pinning: .......................................................................................................................... 7
3. AUDIO AMPLIFIER STAGE WITH MAX9736(8-10WATT)................................................ 8
3.1.
General Description........................................................................................................ 8
3.2.
Features .......................................................................................................................... 8
3.3.
Applications ................................................................................................................... 8
3.4.
Absolute Ratings ............................................................................................................ 9
3.4.1.
Electrical Characteristics............................................................................................ 9
3.4.2.
Operating Specifications .......................................................................................... 11
3.5.
Pinning ......................................................................................................................... 12
AUDIO AMPLIFIER STAGE WITH PT2333(2.5 WATT)............................................................ 12
4. POWER STAGE ...................................................................................................................... 14
5. MICROCONTROLLER (MSTAR) ......................................................................................... 15
Genaral Description.................................................................................................................. 15
5.1.
Features ........................................................................................................................ 15
6. MPEG-2/MPEG-4 DVB Decoder (STi7101) .......................................................................... 16
6.1.
General Description...................................................................................................... 16
6.2
Features ........................................................................................................................ 18
6.3
Absolute Maximum Ratings......................................................................................... 21
7
DVB-T DEMODULATOR STV0362 .................................................................................. 23
8.1 General Description............................................................................................................ 23
8.2 Features .............................................................................................................................. 25
8.3 Absolute Maximum Rating ................................................................................................ 26
8.4 Pinning ............................................................................................................................... 28
8
DVB-C DEMODULATOR STV0297E................................................................................ 29
8.1
General Desription ....................................................................................................... 29
8.2
Features ........................................................................................................................ 29
8.3
8.4
Pinning ......................................................................................................................... 30
9
HY5DV281622DT-5 DDR SDRAM 128M ............................................................................ 31
9.1
General Description...................................................................................................... 31
9.2
Features ........................................................................................................................ 31
9.3
9.4
Pinning ......................................................................................................................... 32
10
HY5DU561622ETP-5 DDR SDRAM 256M....................................................................... 33
11.1 General Description.......................................................................................................... 33
11.2 Features ............................................................................................................................ 33
11.3 Absolute Maximum Ratings............................................................................................. 34
11.4 Pinning ............................................................................................................................. 35
11
STE100P Ethernet PHY ....................................................................................................... 36
11.1 General Description...................................................................................................... 36
11.2 Features ........................................................................................................................ 36
11.3 Absolute Maximum Ratings......................................................................................... 37
12.4 Pinning ............................................................................................................................. 38
12
SAW FILTER ...................................................................................................................... 41
13
14
15
16
12.1 IF Filter for Audio Applications Epcos K9656M ..................................................... 41

12.1.1 Standart: ................................................................................................................... 41
12.1.2 Features: ................................................................................................................... 41
12.1.3 Pin configuration: ..................................................................................................... 42
12.1.4 Frequency response: ................................................................................................. 42
12.2 IF Filter for Video Applications Epcos K3958M...................................................... 43
12.2.1 Standart: ................................................................................................................... 43
12.2.2 Features: ................................................................................................................... 43
12.2.3 Frequency response: ................................................................................................. 44
2048-Bits Serial EEPROM 24LC02 ................................................................................. 45
13.2 Features ........................................................................................................................ 45
13.3 Electrical Specifications ............................................................................................... 46
13.4 Pinning ......................................................................................................................... 47
32K Smart Serial EEPROM 24C32 .................................................................................. 47
14.2 Features ........................................................................................................................ 47
11.3 Absolute Maximum Ratings and Electrical Characteristics......................................... 48
11.4 Pinning ......................................................................................................................... 49
512K CMOS Serial Flash MX25L512.............................................................................. 50
15.2 Features ........................................................................................................................ 50
11.3 Absolute Maximum Ratings......................................................................................... 51
IC DESCRIPTIONS............................................................................................................. 53
16.1 LM1117........................................................................................................................ 53
16.1.1 General Description.................................................................................................. 53
16.1.2 Features .................................................................................................................... 53
16.1.3 Applications ............................................................................................................. 53
16.1.4 Absolute Maximum Ratings..................................................................................... 53
16.1.5 Pinning ..................................................................................................................... 54
16.2 74HCT4053.................................................................................................................. 54
16.2.2 Features .................................................................................................................... 54
16.2.3 Applications ............................................................................................................. 54
16.2.5 Pinning ..................................................................................................................... 55
16.3 NUP4004M5 ................................................................................................................ 55
16.3.2 Features .................................................................................................................... 56
16.3.4 Pinning ..................................................................................................................... 56
16.4 FDN336P...................................................................................................................... 57
16.4.2 Features .................................................................................................................... 57
16.4.4 Pinning ..................................................................................................................... 57
16.5 TL062 -......................................................................................................................... 58
16.5.2 Features .................................................................................................................... 58

16.5.4 Pinning ..................................................................................................................... 59
16.6 PI5V330 ....................................................................................................................... 59
16.6.2 Features .................................................................................................................... 59
16.6.4 Pinning ..................................................................................................................... 60
16.7 AZC099-04S ................................................................................................................ 60
16.7.2 Features .................................................................................................................... 60
16.7.4 Pinning ..................................................................................................................... 61
16.8 TDA1308...................................................................................................................... 61
16.8.2 Features .................................................................................................................... 61
16.8.4 Pinning ..................................................................................................................... 62
16.9 LM358D ....................................................................................................................... 62
16.9.2 Features .................................................................................................................... 62
16.9.4 Pinning ..................................................................................................................... 63
16.10
74LCX244 ................................................................................................................ 63
16.10.1
General Description.............................................................................................. 63
16.10.2
Features ................................................................................................................ 64
16.10.3
Absolute Maximum Ratings................................................................................. 64
16.10.4
Pinning ................................................................................................................. 65
16.11
74LCX245 ................................................................................................................ 65
16.11.1
16.11.2
Features ................................................................................................................ 65
16.11.3
16.11.4
Pinning ................................................................................................................. 66
16.12
FSA3157................................................................................................................... 66
16.12.1
16.12.2
Features ................................................................................................................ 67
16.12.3
16.12.4
Pinning ................................................................................................................. 67
16.13
TSH343 .................................................................................................................... 68
16.13.1
16.13.2
Features ................................................................................................................ 68
16.13.3
16.13.4
Pinning ................................................................................................................. 69
16.14
MT48LC4M16A2TG8E........................................................................................... 69
16.14.1
16.14.2
Features ................................................................................................................ 69
16.14.3
16.14.4
Pinning ................................................................................................................. 70
16.15
MP1583 .................................................................................................................... 71
16.15.1
17
18
19
16.15.2
Features ................................................................................................................ 71
16.15.3
16.15.4
Pinning ................................................................................................................. 72
16.16
MP2112 .................................................................................................................... 72
16.16.1
16.16.2
Features ................................................................................................................ 72
16.16.3
16.16.4
Pinning ................................................................................................................. 73
16.17
MAX809LTR ........................................................................................................... 73
16.17.1
16.17.2
Features ................................................................................................................ 73
16.17.3
16.17.4
Pinning ................................................................................................................. 74
SERVICE MENU SETTINGS............................................................................................. 75
17.1 Video Setup .................................................................................................................. 75
17.2 AudioSetup................................................................................................................... 75
17.3 Service Scan/Tuning Setup .......................................................................................... 77
17.4 Options ......................................................................................................................... 77
17.5 External Source Settings .............................................................................................. 79
17.6 Preset ............................................................................................................................ 80
17.7 NVM Edit..................................................................................................................... 80
17.8 Programming ................................................................................................................ 80
17.9 Diagnostic..................................................................................................................... 80
17.10
Product Info.............................................................................................................. 80
SOFTWARE UPDATE DESCRIPTION............................................................................. 81
16.1 17MB37 Analog Part Software Update With Bootloader Procedure ......................... 81
16.2 17MB37 HDCP key upload procedure. ...................................................................... 84
16.3 17MB37 Digital Software Update From SCART ........................................................ 85
16.4 17MB37 Digital Software Update From USB ............................................................. 90
BLOCK DIAGRAMS .......................................................................................................... 91
19.1 General Block Diagram................................................................................................ 91
19.2 Power Management...................................................................................................... 93
19.3 MSTAR Block Diagram............................................................................................... 94
1. INTRODUCTION
17MB37 Main Board consists of MSTAR concept.(Up to 32) This IC is capable of
handling Video processing, Audio processing, Scaling-Display processing, 3D comb filter,
OSD and text processing, 8 bit dual LVDS transmitter.
TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards
as B/G, D/K, I/I, and L/L including German and NICAM stereo.
Sound system output is supplying max. 2x8W (10%THD) for stereo 8 speakers. This will
change according to IC thay is being used.
Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75Ohm(Common)
1 Side AV (SVHS, CVBS, HP, R/L_Audio) (Common)
1 SCART sockets(Common)
1 YPbPr (Common)
1 PC input(Optional)
2 HDMI 1.3 input(2 HDMI inputs are common)
1 Stereo audio input for PC(Common)
1 Line out(Common)
1 S/PDIF output(Common)
1 Side S-Video(Optional)
1 Headphone(Common)
1 Common interface(Common)
1 Digital USB or 1 Analog USB + 2 Digital USB(Optional)
2. TUNER
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH).
The tuning is available through the digitally controlled I2C bus (PLL). Below you will find
info about the tuner.
2.1.
General description of TDTC-G101D:
The Tuner covers 3 Bands(from 48MHz to 862MHz for COFDM, from 45.25MHz to
863.25MHz for CCIR CH). Band selection and Tuning are performed digitally via the I2C
bus.
2.2.
Features of TDTC-G101D:
Digital Half-NIM tuner for COFDM

Covers 3 Bands(From 48MHz to 862MHz for COFDM,
From 45.25MHz to 863.25MHz for CCIR CH)
Including IF AGC with SAW Filter
Bandwidth Switching (7/8 MHz) possible
DC/DC Converter built in for Tuning Voltage
Internal(or External) RF AGC, Antenna Power Optional
2.3.
Pinning:
3. AUDIO AMPLIFIER STAGE WITH MAX9736(8-10WATT)

3.1.
General Description
The MAX9736A/B Class D amplifiers provide high-performance,thermally efficient

amplifier solutions. The MAX9736A delivers 2 x 15W into 8 loads, or 1 x 30W
into a 4 load. The MAX9736B delivers 2 x 6W into 8 loads or 1 x 12W into a 4 load.
These devices are pinfor pin compatible, allowing a single audio design to work across a
broad range of platforms, simplifying design efforts, and reducing PCB inventory.
Both devices operate from 8V to 28V and provide a high PSRR, eliminating the need for a
regulated power supply. The MAX9736 offers up to 88% efficiency at 12V supply.
Pin-selectable modulation schemes select between filterless modulation and classic PWM
modulation.
Filterless modulation allows the MAX9736 to pass CE EMI limits with 1m cables using
only a low-cost ferrite bead and capacitor on each output. Classic PWM modulation
is optimized for best audio performance when using a full LC filter.
A pin-selectable stereo/mono mode allows stereo operation into 8 loads or mono
operation into 4 loads. In mono mode, the right input op amp becomes available as a
spare device, allowing flexibility in system design. Comprehensive click-and-pop reduction
circuitry minimizes noise coming into and out of shutdown or mute.
Input op amps allow the user to create summing amplifiers, lowpass or highpass filters,
and select an optimal gain. The MAX9736A/B are available in 32-pin TQFN packages
and specified over the -40C to +85C temperature range.
3.2.
Features
Wide 8V to 28V Supply Voltage Range

Spread-Spectrum Modulation Enables Low EMI
Solution
Passes CE EMI Limits with Low-Cost Ferrite
Bead/Capacitor Filter
Low BOM Cost, Pin-for-Pin Compatible Family
High 67dB PSRR at 1kHz Reduces Supply Cost
88% Efficiency Eliminates Heatsink
Thermal and Output Current Protection
< 1A Shutdown Mode
Mute Function
Space-Saving, 7mm x 7mm x 0.8mm, 32-Pin TQFN
Package
3.3.
Applications
LCD/PDP/CRT Monitors
LCD/PDP/CRT TVs
MP3 Docking Stations
Notebook PCs
PC Speakers
All-in-One PCs
3.4.
Absolute Ratings
3.4.1. Electrical Characteristics
3.4.2. Operating Specifications
3.5.
Pinning
AUDIO AMPLIFIER STAGE WITH PT2333(2.5 WATT)

The PT2333 is a Class-D power amplifier designed for audio equipments, maximum
output power can reach up to 2.5W (VDD=5V, RL=4, THD=10%). The PT2333
composed of exclusively designed Class-D circuitry (patented) by PTC, along with
the most advanced semi-conductor technology. When compared to the traditional
Class-AB amplifiers, the PT2333s has a much higher efficiency (>80%), low
heat dissipation, and produces superior audio quality. PT2333s external circuitry is
simple and easily accessible, and consists of flawless self-protection capabilities.
The chips packaging is small, thus it occupies an insignificant amount of space on
the circuit board; therefore, making it the predominant choice when it comes to
audio amplifiers.
Features
CMOS technology
Operating voltage range from 2.7V up to 5.5V
Differential analog input
Maximum output power 2.5W(4) @ THD=10%
Output low-pass LC filter is not required.
Voltage gain determinate by the external resister
Contains shutdown function
POP noises free in shutdown and power ON/OFF
period
Built-in short circuit protection
Built-in overheat protection
High efficiency (8 load >85%), low heat
dissipation
Available in MSOP 10-pin and WLCSP 9-pin
miniature packages
Aplications
Cellular phone
Portable media player
GPS
LCD monitor
Small multimedia speakers
Hand-free phone
Laptop
Other audio applications
Block Diagram
4. POWER STAGE
The DC voltages required at various parts of the chassis and inverters are provided by a
main power supply unit. The power supply generates 33V, 24V, 12V, 5V, 3,3V and 5V,
3,3V stand by mode DC voltages. Power stage which is on-chasis generates 1,26V stand
by voltage and 8V, 2.5V, 2,6V, 1,8V and 1V supplies for other different parts of the
chassis.
ADAPTOR USE (Optional)
The DC voltages required at various parts of the chassis and inverters are provided by an
external power supply unit or produced on the chassis if an adapter is used for the supply.
The 12V dc voltage is switched by IRF 7314 power mosfet in TV sets with mechanical
switch to produce the required standby voltage. Also regulators and mosfets generate
1.8V, 3.3V and 5V and 1.26V voltages for other different parts of the chassis.
5. MICROCONTROLLER (MSTAR)
Genaral Description
The MST6WB7GQ-3 is a high performance and fully integrated IC for multi-function LCD
monitor/TV with resolutions up to full HD (1920x1080). It is configured with an integrated
triple-ADC/PLL, an integrated DVI/HDCP/HDMI receiver, a multi-standard TV video and audio
decoder, two video de-interlacers, two scaling engines, the MStarACE-3 color engine, an on-screen
display controller, an 8-bit MCU and a built-in output panel interface. By use of external frame
buffer, PIP/POP is provided for multimedia applications. Furthermore, 3-D video decoding and
processing are fulfilled for high-quality TV applications. To further reduce system costs, the
MST6WB7GQ-3 also integrates intelligent power management control capability for greenmode requirements and spread-spectrum support for EMI management.
5.1. Features
LCD TV controller with PIP/POP display functions
Input supports up to UXGA & 1080P
Panel supports up to full HD (1920x1080)
TV decoder with 3-D comb filter
Multi-standard TV sound demodulator and decoder
10-bit triple-ADC for TV and RGB/YPbPr
10-bit video data processing
Integrated DVI/HDCP/HDMI compliant receiver
High-quality dual scaling engines & dual 3-D video de-interlacers
3-D video noise reduction
Full function PIP/PBP/POP
MStarACE-3 picture/color processing engine
Embedded On-Screen Display (OSD) controler engine
Built-in MCU supports PWM & GPIO
Built-in dual-link 8/10-bit LVDS transmitter
5-volt tolerant inputs
Low EMI and power saving features
296-pin LQFP
NTSC/PAL/SECAM Video Decoder
Supports NTSC M, NTSC-J, NTSC-4.43, PAL (B,D,G,H,M,N,I,Nc), and SECAM
Automatic TV standard detection
Motion adaptive 3-D comb filter for NTSC/PAL
8 configurable CVBS & Y/C S-video inputs
Supports Teletext level-1.5, WSS, VPS, Closed-caption, and V-chip
Macrovision detection
CVBS video output
Video IF for Multi-Standard Analog TV

Digital low IF architecture
Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution
Maximum IF analog gain of 37dB in addition to digital gain
Programmable TOP to accommodate different tuner gain to optimize noise and linearity
performance
Multi-Standard TV Sound Decoder
Supports BTSC/NICAM/A2/EIA-J demodulation and decoding
FM stereo & SAP demodulation
L/Rx4, mono, and SIF audio inputs
L/Rx3 loudspeaker and line outputs
Supports sub-woofer output
Built-in audio output DACs
Audio processing for loudspeaker channel, including volume, balance, mute, tone, EQ, and
virtual stereo/surround
Optional advanced surround available (Dolby1, SRS2, BBE3 etc)
Digital Audio Interface
I2S digital audio input & output
S/PDIF digital audio input & output
HDMI audio channel processing capability
Programmable delay for audio/video synchronization
Analog RGB Compliant Input Ports
Three analog ports support up to UXGA
Supports HDTV RGB/YPbPr/YCbCr
Supports Composite Sync and SOG (Sync-on-Green) separator
Automatic color calibration
DVI/HDCP/HDMI Compliant Input Port
Two HDMI input ports with built-in switch
Supports TMDS clock up to 225MHz @ 1080P 60Hz with 12-bit deep-color resolution
Single link on-chip DVI 1.0 compliant receiver
High-bandwidth Digital Content Protection(HDCP) 1.1 compliant receiver
6. MPEG-2/MPEG-4 DVB Decoder (STi7101)

6.1.
General Description
The STi7101 is a new generation, high-definition IDTV / set-top box / DVD decoder chip, and
provides very high performance for low-cost HD systems. STx7101 includes an H.264 video
decoder for new, low bit rate applications. Based on the Omega2 (STBus) architecture, this
system-on-chip is a full back-end processor for digital terrestrial, satellite, cable, DSL and IP
client high-definition set-top boxes, compliant with ATSC, DVB, DIRECTV, DCII,
OpenCable and ARIB BS4 specifications. It includes all processing for DVD applications.
The STx7101 demultiplexes, decrypts and decodes HD or SD video streams with associated
multi-channel audio. Video is output to two independently formatted displays: a full resolution
display intended for a TV monitor, and a downsampled display intended for a VCR or DVD-R.
Connection to a TV or display panel can be analog through the DACs, or digital through a copy
protected DVI/HDMI. Composite outputs are provided for connection to the VCR with
Macrovision protection. Audio is output with optional PCM mixing to an S/PDIF interface,
PCM interface, or through integrated stereo audio DACs. Digitized analog programs can also
be input to the STx7101 for reformatting and display. The STx7101 includes a graphics
rendering and display capability with a 2D graphics accelerator, three graphics planes and a
cursor plane. A dual display compositor provides mixing of graphics and video with
independent composition for each of the TV and VCR/DVD-R outputs. The STx7101 includes
a stream merger to allow seven different transport streams from different sources to be merged
and processed concurrently. Applications include DVR time-shifted viewing of a terrestrial
program, while acquiring an EPG/data stream from a satellite or cable front end.
The flexible descrambling engine is compatible with required standards including DVB, DES,
AES and Multi2. The STx7101 embeds a 266 MHz ST40-202 CPU for applications and device
control. A dual DDR1 SDRAM memory interface is used for higher performance, to allow the
video decoder the required memory bandwidth for HD H.264 and sufficient bandwidth for the
CPU and the rest of the system. A second memory bus is also provided for flash memory,
storing resident software, and for connection of peripherals. This bus also has a high speed
synchronous mode that can be used to exchange data between two STx7101 devices. This can
be used to connect a second STx7101 as a co-decoder for a dual TV STB application. A harddisk drive (HDD) can be connected either to the serial ATA interface, or as an expansion drive
through the USB 2.0 port.
The figure below shows the architecture of the Sti7101.
6.2
Features
The STx7101 is a single-chip, high definition video decoder including:

_ H.264 support
_ Linux and OS21 compatible ST40 CPU core: 266 MHz
_ transport filtering and descrambling
_ video decoder: H.264 (MPEG-4 part 10) and MPEG-2
_ SVP compliant
_ graphics engine and dual display: standard and highdefinition
_ audio decoder
_ DVD data retrieval and decryption
The STx7101 also features the following embedded interfaces:
_ USB 2.0 host controller/PHY interface
_ DVI/HDMI output
_ digital audio and video auxiliary inputs
_ low-cost modem
_ 100BT ethernet controller with integrated MAC and MII/ RMII interface for external PHY
_ serial ATA (SATA)
Processor subsystem
_ ST40 32-bit superscaler RISC CPU
_ 266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU
_ 5-stage pipeline, delayed branch support
_ floating point unit, matrix operation support
_ debug port, interrupt controller
Transport subsystem
_ TS merger/router
_ 2 serial/parallel inputs
_ 1 bidirectional interface
_ merging of 3 external transport streams
_ transport streams from memory support
_ NRSS-A module interface
_ TS routing for DVB-CI and CableCARDmodules
_ Programmable transport interfaces (PTIs)
_ two programmable transport interfaces
_ two transport stream demultiplexers: DVB, DIRECTV, ATSC, ARIB, OpenCable, DCII
_ integrated DES, AES, DVB and Multi2 descramblers
_ NDS random access scrambled stream protocol (RASP) compliant
_ NDS ICAM CA
_ support for VGS, Passage and DVS042 residue handling
Video/graphics subsystem
_ H.264(MPEG-4 part 10) main and high profile level 4.1/MPEG-2 MP@HL video decoder
_ advanced error concealment and trick mode support
_ dual MPEG-2 MP@HL decode
_ SD digital video input
_ Displays
_ one HD display multi format capable (1080I, 720P, 480P/576P, 480I/576I)
analog HD output RGB or YPbPr
HDMI encoded output
_ one standard-definition display
analog SD output: YPbPr or YC and CVBS
_ Gamma 2D/3D graphics processor
_ triple source 2D gamma blitter engine
_ alpha blending and logical operations
_ color space and format conversion
_ fast color fill
_ arbitrary resizing with high quality filters
_ acceleration of direct drawing by CPU
_ Gamma compositor and video processor
_ 7-channel mixer for high definition output
_ independent 2-channel mixer for SD output
_ 3 graphic display planes
_ high-quality video scaler
_ motion and detail adaptive deinterlacer

_ linear resizing and format conversions
_ horizontal and vertical filtering
_ Copy protection
_ HDMI /HDCP copy protection hardware
_ SVP compliant
_ Macrovision copy protection for 480I, 480P, 576I, 576P outputs
_ DTCP-IP
_ AWG-based DCS analog copy protection
Audio subsystem
_ Digital audio decoder
_ support for all the most popular audio standards including MPEG-1 layer I/II, MPEG-2 layer
II, MPEG-2 AAC, MPEG- 4 AAC LC 2-channel/5.1 channel MPEG-4 AAC+SBR 2channel/5.1 channel, Dolby Digital EX, Pro Logic II, MLP and DTS
_ PCM mixing with internal or external source and sample rate conversion
_ 6- to 2-channel downmixing
_ PCM audio input
_ independent multichannel PCM output, S/PDIF output and analog output
_ Stereo 24-bit audio DAC for analog output
_ IEC958/IEC1937 digital audio output interface (S/PDIF)
_ CSS/CPxM copy protection hardware Interfaces
_ External memory interface (EMI)
_ 16-bit interface supporting ROM, flash, SFlash, SRAM, peripherals
_ access in 5 banks
_ high speed synchronous mode for interconnecting two STx7101 devices
_ External microprocessor interface (EMPI)
_ 32-bit MPX satellite, target-only interface,
_ synchronous operation at MPX clock speed, capable of 100 MHz,
_ Dual local memory interface (LMI)
_ dual interface (2 x 32-bit) for DDR1 200-MHz (DDR400) memories,
supports 128-, 256- and 512-Mbit devices
_ USB 2.0 host controller/PHY interface
_ Serial ATA hard-disk drive support
_ record and playback with trick modes
_ pause and time shifting, watch and record
_ 100BT Ethernet controller, MAC and MII/RMII
_ On-chip peripherals
_ 4 ASCs (UARTs) with Tx and Rx FIFOS, two of which can be used in smartcard interfaces
_ 2 smartcard interfaces and clock generators (improved to reduce external circuitry)
_ 3 SSCs for IC/SPI master slaves interfaces
_ serial communications interface (SCIF)
_ 2 PWM outputs
_ teletext serializer and DMA module
_ 6 banks of general purpose I/O, 3.3 V tolerant
_ SiLabs line-side (DAA) interface
_ modem analog front end (MAFE) interface
_ infrared transmitter/receiver supporting RC5, RC6 and RECS80 codes
_ UHF remote receiver input interface

_ interrupt level controller and external interrupts, 3.3 V tolerant
_ low power/RTC/watchdog controller
_ integrated VCXO
_ DiSEqC 2.0 interface
_ PWM capture/compare functions
_ Flexible multi-channel DMA Services and package
_ JTAG/TAP interface, ST40 toolset support, ST231 toolset support
_ Package
_ 35 x 35 PBGA, 580 + 100 balls (standard version)
6.3
Absolute Maximum Ratings
I/O specifications 3.3 volt pads
I/O specifications 2.5 volt pads
7 DVB-T Demodulator (COFDM)
DRX3973D
7.1 General description:

The DRX 3973D is the fourth-generation COFDM demodulator that offer todays highest level of front-end integration
resulting in ultimate DVB-T digital reception, compliant to ETS 300 744, DTG D-Book, EICTA E-Book, and Nordig Unified
v1.0.2 .
The DRX 3973D applies cutting-edge digital filtering techniques in combination with a high-performance A/D-converter
and PLL configuration, resulting in
superior performance figures in the presence of digital and analog adjacent channels.
Progressive channel estimator algorithms provide exceptional performance in multipath- and dynamicecho conditions
an especially important feature for single-frequency networks and indoor reception.
The state-of-the-art impulsive noise cruncher suppresses interferences originating from sources such as cars, electrical
motors, and household appliances.
7.2 Features
Highest level of front-end integration and flexibility: Integrated PGA (programmable gain amplifier) 30 dB
Single 8 MHz SAW filter operation
2 AGC control signals available for RF and IF amplifier control
Flexible clock reference options
Re-use of 4 MHz tuner clock reference
Pre-SAW sense input for optimal RF AGC setting and RF-level measurement
Excellent digital reception performance:
1
Superior digital and analog adjacent channel performance (> 40dB for QEF)
Impulsive noise cruncher
Multipath and dynamic echoes
The input IF frequency ranging up to 44 MHz ensures upward compatibility for new tuner topologies
Integrated microprocessor to perform autonomous detection and operation of all possible DVB-T modes, without
interaction with the host processor
Fully automatic and fast signal acquisition: UHF and VHF band-scan in <20 seconds
Meets all international DVB-T receiver specifications: Nordig Unified, DTG, EICTA
Comfortable software drivers for integration of tuner and COFDM demodulator
Secondary serial interface for tuner control
5 V tolerant AGC and secondary serial protocol outputs
2 general purpose I/O pins (GPIO)
Configurable parallel or serial MPEG-TS output
PMQFP64-2 package: footprint 1010 mm (DRX 3973D)
7.3 Absolute Maximum Ratings
7.4 Pin description:
8 DVB-C DEMODULATOR STV0297E

8.1
General Desription
The STV0297E is a complete single-chip QAM (quadrature amplitude modulation)

demodulation and FEC (forward error correction) solution that performs sampled IF to
transport stream (MPEG-2 or MPEG-4) block processing of QAM signals. It is intended for
the digital transmission of compressed television, sound, and data services over cable. It
is fully compliant with ITU-T J83 Annexes A/C or DVB-C specification bitstreams (ETS
300 429, Digital broadcasting systems for television, sound and data services Framing
structure, channel coding and modulation - Cable Systems). It can handle square (16,
64, 256-QAM) and non-square (32, 128-QAM) constellations. Japanese DBS systems
require a transport stream multiplex frame (TSMF) layer to carry digital signals over cable
systems. When the recovered transport stream is a multiplex frame, the STV0297E postprocesses it to extract a single transport stream. Automatic detection of the TSMF layer is
provided. The chip integrates an analog-to-digital converter that delivers the required
performance to handle up to 256-QAM signals in a direct IF sampling architecture, thus
eliminating the need for external downconversion.
8.2
Features
Decodes ITU-T J.83-Annexes A/C and DVB-C bit streams

Processes Japanese transport stream multiplex frame (TSMF)
High-performance integrated A/D converter suitable for direct IF architecture in all
QAM (quadrature amplitude modulation) modes
Supports 16, 32, 64, 128 and 256 point constellations
Small footprint package: (10 x 10 mm)
Very low power consumption
Full digital demodulation
Variable symbol rates
Front derotator for better low symbol rate performance and relaxed tuner
constraints
Integrated matched filtering
Robust integrated adaptive pre and post equalizer
On-chip FEC A/C with ability to bypass individual blocks
10 programmable GPIO
Two AGC outputs suitable for delayed AGC applications (sigma-delta outputs)
Integrated signal quality monitors, plus lock indicator and interrupt function mapped
to GPIO pin
Improved signal acquisition
System clock generated on-chip from quartz crystal
Low frequency crystal operations 4, 16, 25 - 30 MHz
4 I2C addresses
Easy control and monitoring via 2-wire fast I2C bus
8.3
8.4
Pinning
9 HY5DV281622DT-5 DDR SDRAM 128M

9.1
General Description
The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR)

Synchronous DRAM, ideally suited for the point-to-point applications which requires high
bandwidth. The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations
referenced to both rising and falling edges of the clock. While all addresses and control
inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,Data
strobes and Write data masks inputs are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 2-bit prefetched to achieve very high
bandwidth. All input and output voltage levels are compatible with SSTL_2.
9.2
Features
3.3V for VDD and 2.5V for VDDQ power supply

All inputs and outputs are compatible with SSTL_2 interface
JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch
Fully differential clock inputs (CK, /CK) operation
Double data rate interface
Source synchronous - data transaction aligned to bidirectional data strobe (DQS)
x16 device has 2 bytewide data strobes (LDQS, UDQS) per each x8 I/O
Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers
when write (centered DQ)
Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the
data strobe
All addresses and control inputs except Data, Data strobes and Data masks
latched on the rising edges of the clock
Write mask byte controls by LDM and UDM
Programmable /CAS latency 3 / 4 supported
Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
Internal 4 bank operations with single pulsed /RAS
tRAS Lock-Out function supported
Auto refresh and self refresh supported
4096 refresh cycles / 32ms
Full, Half and Matched Impedance(Weak) strength driver option controlled by
EMRS
9.3
9.4
Pinning
10 HY5DU561622ETP-5 DDR SDRAM 256M

11.1 General Description
The Hynix HY5DU561622DTP is a 268,435,456-bit CMOS Double Data Rate(DDR)
Synchronous DRAM, ideally suited for the point-to-point applications which requires high
bandwidth. The Hynix 16Mx16 DDR SDRAMs offer fully synchronous operations
referenced to both rising and falling edges of the clock. While all addresses and control
inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data
strobes and Write data masks inputs are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 2-bit prefetched to achieve very high
bandwidth. All input and output voltage levels are compatible with SSTL_2.
11.2 Features
2.5V +/-5% VDD and VDDQ power supply
supports 200 / 166MHz
All inputs and outputs are compatible with SSTL_2 interface
JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch
Fully differential clock inputs (CK, /CK) operation
Double data rate interface
Source synchronous - data transaction aligned to bidirectional data strobe (DQS)
x16 device has 2 bytewide data strobes (LDQS,UDQS) per each x8 I/O
Data outputs on DQS edges when read (edged DQ)
Data inputs on DQS centers when write (centered DQ)
Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the data
strobe
All addresses and control inputs except Data, Data strobes and Data masks latched on
the rising edges
of the clock
Write mask byte controls by LDM and UDM
Programmable /CAS latency 3 / 4 supported
Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
Internal 4 bank operations with single pulsed /RAS
tRAS Lock-Out function supported
Auto refresh and self refresh supported
8192 refresh cycles / 64ms
Full, Half and Matched Impedance(Weak) strength driver option controlled by EMRS
11.4 Pinning
11 STE100P Ethernet PHY

The STE100P, also referred to as STEPHY1, is a high performance Fast Ethernet
physical layer interface for 10Base-T and 100Base-TX applications. It was designed with
advanced CMOS technology to provide a Media Independent Interface (MII) for easy
attachment to 10/100 Media Access Controllers (MAC) and a physical media interface for
100Base-TX of IEEE802.3u and 10Base-T of IEEE802.3.
The STEPHY1 supports both half-duplex and fullduplex operation, at 10 and 100 Mbps
operation. Its operating mode can be set using auto-negotiation, parallel detection or
manual control. It also allows for the support of auto-negotiation functions for speed and
duplex detection.
11.2 Features
- IEEE802.3u 100Base-TX and IEEE802.3 10Base-T compliant
- Support for IEEE802.3x flow control
- IEEE802.3u Auto-Negotiation support for 10Base-T and 100Base-TX
- MII interface
- Standard CSMA/CD or full duplex operation supported
- Integrates the whole Physical layer functions of 100Base-TX and 10Base-T
- Provides Full-duplex operation on both 100Mbps and 10Mbps modes

- Provides Auto-negotiation(NWAY) function of full/half duplex operation for both 10 and 100
Mbps
- Provides MLT-3 transceiver with DC restoration for Base-line wander compensation
- Provides transmit wave-shaper, receive filters, and adaptive equalizer
- Provides loop-back modes for diagnostic
- Builds in Stream Cipher Scrambler/ De-scrambler and 4B/5B encoder/decoder
- Supports external transmit transformer with turn ratio 1:1
- Supports external receive transformer with turn ratio 1:1
- Standard 64-pin QFP package pinout
12.4 Pinning
12SAW FILTER
12.1 IF Filter for Audio Applications Epcos K9656M
12.1.1
B/G
D/K
I
L/L
12.1.2
Standart:
Features:
TV IF audio filter with two channels

Channel 1 (L) with one pass band for sound carriers at 40,40 MHz (L) and 39,75
MHz (L- NICAM)
Channel 2 (B/G,D/K,L,I) with one pass band for sound carriers between 32,35 MHz
and 33,40 MHz
12.1.3
Pin configuration:
1 Input
2 Switching input
3 Chip carrier - ground
4 Output
5 Output
12.1.4
Frequency response:
12.2 IF Filter for Video Applications Epcos K3958M

12.2.1
Standart:
B/G
D/K
I
L/L
12.2.2
Features:
TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz

Constant group delay
Pin configuration:
1 Input
2 Input - ground
3 Chip - carrier ground
4 Output
5 Output
12.2.3
Frequency response:
132048-Bits Serial EEPROM 24LC02

The 24LC01/02 is a 1K/2K-bit serial read/write non-volatile memory device using the
CMOS floating gate process. Its 1024/2048 bits of memory are organized into 128/256
words and each word is 8 bits. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are essential. Up to
eight HT24LC01/02 devices may be connected to the same two-wire bus. The
HT24LC01/02 is guaranteed for 1M erase/write cycles and 40-year data retention.
13.2 Features
Operating voltage: 2.4V~5.5V

Low power consumption
Operation: 5mA max.
Standby: 5mA max.
Internal organization
1K (HT24LC01):1288
2K (HT24LC02): 2568
2-wire serial interface
Write cycle time: 5ms max.
Automatic erase-before-write operation
Partial page write allowed
8-byte Page write modes
Write operation with built-in timer
Hardware controlled write protection
40-year data retention
106 erase/write cycles per word
8-pin DIP/SOP package
8-pin TSSOP (HT24LC02 only)
Commerical temperature range (0C to +70C)
13.3 Electrical Specifications
13.4 Pinning
1432K Smart Serial EEPROM 24C32

The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable
PROM. This device has been developed for advanced, low power applications such as
personal communications or data acquisition. The 24C32 features an input cache for fast
write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4Kbit block of ultra-high endurance memory for data that changes frequently. The 24C32 is
capable of both random and sequential reads up to the 32K boundary. Functional address
lines allow up to eight 24C32 devices on the same bus, for up to 256K bits address
space. Advanced CMOS technology makes this device ideal for low-power non-volatile
code and data applications. The 24C32 is available in the standard 8-pin plastic DIP and
8-pin surface mount SOIC package.
14.2 Features
Voltage operating range: 4.5V to 5.5V

Peak write current 3 mA at 5.5V
Maximum read current 150 A at 5.5V
Standby current 1 A typical
Industry standard two-wire bus protocol, I2C compatible
Including 100 kHz and 400 kHz modes
Self-timed write cycle (including auto-erase)
Power on/off data protection circuitry
Endurance: 10,000,000 Erase/Write cycles guaranteed for High Endurance Block,
1,000,000 E/W cycles guaranteed for Standard Endurance Block
8 byte page, or byte modes available
1 page x 8 line input cache (64 bytes) for fast write loads
Schmitt trigger, filtered inputs for noise suppression

Output slope control to eliminate ground bounce
2 ms typical write cycle time, byte or page
Up to 8 chips may be connected to the same bus for up to 256K bits total memory
Electrostatic discharge protection > 4000V
Data retention > 200 years
8-pin PDIP/SOIC packages
Temperature ranges: Commercial (C): 0C to +70C, Industrial (I): -40C to +85C
11.3 Absolute Maximum Ratings and Electrical Characteristics
11.4 Pinning
15512K CMOS Serial Flash MX25L512

The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as
65,536 x 8 internally. The MX25L512 feature a serial peripheral interface and software
protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock
input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the
device is enabled by CS# input. The MX25L512 provide sequential read operation on
whole chip. After program/erase command is issued, auto program/ erase algorithms
which program/ erase and verify the specified page or sector/block locations will be
executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector (4K-bytes). To provide user with ease of interface,
a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via
WIP bit. When the device is not in operation and CS# is high, it is put in standby mode
and draws less than 10uA DC current. The MX25L512 utilize MXIC's proprietary memory
cell, which reliably stores memory contents even after 100,000 program and erase cycles.
15.2 Features
GENERAL
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
524,288 x 1 bit structure
16 Equal Sectors with 4K byte each
Any Sector can be erased individually
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
Latch-up protected to 100mA from -1V to Vcc +1V
Low Vcc write inhibit is from 1.5V to 2.5V
PERFORMANCE
High Performance
Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock
(30pF + 1TTL Load)
Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.)
and 2s(max.)/chip(512Kb)
Low Power Consumption
Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and
4mA(max.) at 33MHz
Low active programming current: 15mA (max.)
Low active erase current: 15mA (max.)
Low standby current: 10uA (max.)
Deep power-down mode 1uA (typical)
Minimum 100,000 erase/program cycles
SOFTWARE FEATURES
Input Data Format

1-byte Command code
Block Lock protection
The BP0~BP1 status bit defines the size of the area to be software protected
against Program and Erase instructions.
Auto Erase and Auto Program Algorithm
Automatically erases and verifies data at selected sector
Automatically programs and verifies data at selected page by an internal algorithm
that automatically times the program pulse widths (Any page to be programed
should have page in the erased state first)
Status Register Feature
Electronic Identification
JEDEC 2-byte Device ID
RES command, 1-byte Device ID
HARDWARE FEATURES
SCLK Input
Serial clock input
SI Input
Serial Data Input
SO Output
Serial Data Output
WP# pin
Hardware write protection
HOLD# pin pause the chip without diselecting the chip
PACKAGE
8-pin SOP (150mil)
All Pb-free devices are RoHS Compliant
16IC DESCRIPTIONS
16.1 LM1117
16.1.1
General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA
of load current. It has the same pin-out as National Semiconductors industry standard
LM317. The LM1117 is available in an adjustable version, which can set the output
voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within 1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F
tantalum capacitor is required at the output to improve the transient response and
stability.
16.1.2
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
LM1117 0C to 125C
LM1117I -40C to 125C
16.1.3
Features
Applications
2.85V Model for SCSI-2 Active Termination

Post Regulator for Switching DC/DC Converter
High Efficiency Linear Regulators 15
32 TFT TV Service Manual 10/01/2005
Battery Charger
Battery Powered Instrumentation
16.1.4
16.1.5
Pinning
16.2 74HCT4053
16.2.1
General Description
The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible
with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The
74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a
common enable input (E). Each multiplexer/demultiplexer has two independent
inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs
(Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to
S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to
S3. VCC and GND are the supply voltage pins for the digital control inputs (S1 to S3 and
E). The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for
74HCT4053. The analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC
as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
16.2.2
Low ON resistance:
80 W (typical) at VCC - VEE = 4.5 V
Logic level translation:
To enable 5 V logic to communicate with 5 V analog signals
Typical break before make built in
Complies with JEDEC standard no. 7A
ESD protection: HBM EIA/JESD22-A114-C exceeds 2000 V, MM EIA/JESD22A115-A exceeds 200 V
Multiple package options
Specified from -40 C to +85 C and from -40 C to +125 C
16.2.3
Features
Applications
Analog multiplexing and demultiplexing

Digital multiplexing and demultiplexing
Signal gating
16.2.4
16.2.5
Pinning
16.3 NUP4004M5
16.3.1
General Description
This 5-Pin bi-directional transient suppressor array is designed for applications requiring
transient overvoltage protection capability. It is intended for use in transient voltage and
ESD sensitive equipment such as computers, printers, cell phones, medical equipment,
and other applications. Its integrated design provides bi-directional protection for four
separate lines using a single TSOP-5 package. This device is ideal for situations where
board space is a premium.
16.3.2
Features
Bi-directional Protection for Four Lines in a Single TSOP-5 Package

Low Leakage Current
Low Capacitance
Provides ESD Protection for JEDEC Standards JESD22
Machine Model = Class C
Human Body Model = Class 3B
Provides ESD Protection for IEC 61000-4-2, 15 kV (Air), 8 kV (Contact)
This is a Pb-Free Device
16.3.3
16.3.4
Pinning
16.4 FDN336P
16.4.1
General Description
The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM),

organized by 8 bits.This device can operate in two modes: Transmit Only mode and I2C
bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM
data clocked out from the rising edge of the signal applied on VCLK. The device will
switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL
pin. The ST24LC21 cannot switch from the I2C bidirectional mode to the Transmit Only
mode (except when the power supply is removed). The device operates with a power
supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages
are available.
16.4.2
Features
1 MILLION ERASE/WRITE CYCLES

40 YEARS DATA RETENTION
2.5V to 5.5V SINGLE SUPPLY VOLTAGE
400k Hz COMPATIBILITY OVER the FULL RANGE of SUPPLY VOLTAGE
TWO WIRE SERIAL INTERFACE I2C BUS COMPATIBLE
PAGE WRITE (up to 8 BYTES)
BYTE, RANDOM and SEQUENTIAL READ MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP PERFORMANCES
16.4.3
16.4.4
Pinning
16.5 TL062 16.5.1
General Description
Low-power JFET-input operational amplifier
16.5.2
Features
Very Low Power Consumption

Typical Supply Current . . . 200 A (Per Amplifier)
Wide Common-Mode and Differential Voltage Ranges
Low Input Bias and Offset Currents
Common-Mode Input Voltage Range Includes VCC+
Output Short-Circuit Protection
High Input Impedance . . . JFET-Input Stage
Internal Frequency Compensation
Latch-Up-Free Operation
High Slew Rate . . . 3.5 V/s Typ
16.5.3
16.5.4
Pinning
16.6 PI5V330
16.6.1
General Description
Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the
Company.s advanced CMOS low-power technology, achieving industry leading
performance.
The
PI5V330
is
a
true
bidirectional
Quad
2-channel
multiplexer/demultiplexer that is recommended for both RGB and composite video
switching applications. The VideoSwitch. can be driven from a current output RAMDAC or
voltage output composite video source. Low ON-resistance and wide bandwidth make it
ideal for video and other applications. Also this device has exceptionally high current
capability which is far greater than most analog switches offered today. A single 5V
supply is all that is required for operation. The PI5V330 offers a high-performance, lowcost solution to switch between video sources. The application section describes the
PI5V330 replacing the HC4053 multiplier and buffer/amplifier.
16.6.2
Features
High-performance, low-cost solution to switch between video sources

Wide bandwidth: 200 MHz
Low ON-resistance: 3
Low crosstalk at 10 MHz: .58 dB
Ultra-low quiescent power (0.1 A typical)
Single supply operation: +5.0V
Fast switching: 10 ns
High-current output: 100 mA
Packages available:
16-pin 300-mil wide plastic SOIC (S)
16-pin 150-mil wide plastic SOIC (W)
16-pin 150-mil wide plastic QSOP (Q)
16.6.3
16.6.4
Pinning
16.7 AZC099-04S
16.7.1
General Description
AZC099-04S is a high performance and low cost design which includes surge rated diode
arrays to protect high speed data interfaces. The AZC099-04S family has been
specifically designed to protect sensitive components, which are connected to data and
transmission lines, from over-voltage caused by Electrostatic Discharging (ESD),
Electrical Fast Transients (EFT), and Lightning.
AZC099-04S is a unique design which includes surge rated, low capacitance steering
diodes and a unique design of clamping cell which is an equivalent TVS diode in a single
package. During transient conditions, the steering diodes direct the transient to either the
power supply line or to the ground line. The internal unique design of clamping cell
prevents over-voltage on the power line, protecting any downstream components.
AZC099-04S may be used to meet the ESD immunity requirements of IEC 61000-4-2,
Level 4 ( 15kV air, 8kV contact discharge).
16.7.2
Features
ESD Protect for 4 high-speed I/O channels

Provide ESD protection for each channel to IEC 61000-4-2 (ESD) 15kV (air),
8kV (contact) IEC 61000-4-4 (EFT) (5/50ns) Level-3, 20A for I/O, 40A for Power
IEC 61000-4-5 (Lightning) 4A (8/20s)
5V operating voltage Low capacitance : 1.0pF typical
Fast turn-on and Low clamping voltage
Array of surge rated diodes with internal equivalent TVS diode
Small package saves board space
Solid-state silicon-avalanche and active circuit triggering technology
16.7.3
16.7.4
Pinning
16.8 TDA1308
16.8.1
General Description
The TDA1308; TDA1308A is an integrated class-AB stereo headphone driver contained in

an SO8, DIP8 or a TSSOP8 plastic package. The TDA1308AUK is available in an 8 bump
wafer level chip-size package (WLCSP8). The device is fabricated in a 1 mm
Complementary Metal Oxide Semiconductor (CMOS) process and has been primarily
developed for portable digital audio applications. The difference between the TDA1308
and the TDA1308A is that the TDA1308A can be used at low supply voltages.
16.8.2
Features
Wide temperature range

No switch ON/OFF clicks
Excellent power supply ripple rejection
Low power consumption
Short-circuit resistant
High performance
High signal-to-noise ratio
High slew rate

Low distortion
Large output voltage swing
16.8.3
16.8.4
Pinning
16.9 LM358D
16.9.1
General Description
The LM158 series consists of two independent, high gain, internally frequency
compensated operational amplifiers which were designed specifically to operate from a
single power supply over a wide range of voltages. Operation from split power supplies is
also possible and the low power supply current drain is independent of the magnitude of
the power supply voltage. Application areas include transducer amplifiers, dc gain blocks
and all the conventional op amp circuits which now can be more easily implemented in
single power supply systems. For example, the LM158 series can be directly operated off
of the standard +5V power supply voltage which is used in digital systems and will easily
provide the required interface electronics without requiring the additional 15V power
supplies. The LM358 and LM2904 are available in a chip sized package (8-Bump micro
SMD) using Nationals micro SMD package technology.
16.9.2
Features
Available in 8-Bump micro SMD chip sized package,

Internally frequency compensated for unity gain
Large dc voltage gain: 100 dB
Wide bandwidth (unity gain): 1 MHz (temperature compensated)
Wide power supply: Single supply: 3V to 32V or dual supplies: 1.5V to 16V
Low supply current drain (500 A)essentially independent of supply voltage

Low input offset voltage: 2 mV
Input common-mode voltage range includes ground
Differential input voltage range equal to the power supply voltage
Large output voltage swing
16.9.3
16.9.4
Pinning
16.10 74LCX244
16.10.1
General Description
The LCX244 contains eight non-inverting buffers with 3-STATE outputs. The device may
be employed as a memory address driver, clock driver and bus-oriented
transmitter/receiver. The LCX244 is designed for low voltage (2.5V or 3.3V) VCC
applications with capability of interfacing to a 5V signal environment. The LCX244 is
fabricated with an advanced CMOS technology to achieve high speed operation while
maintaining CMOS low power dissipation.
16.10.2
Features
5V tolerant inputs and outputs

2.3V to 3.6V VCC specifications provided
6.5ns Tpd max. (VCC=3.3V), 10A ICCmax.
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
24mA output drive (VCC=3.0V)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500mA
ESD performance:Human body model>2000V, Machine model>200V
Leadless DQFN package
16.10.3
16.10.4
Pinning
16.11 74LCX245
16.11.1
General Description
The LCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and
is intended for bus oriented applications. The device is designed for low voltage (2.5V and
3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R
input determines the direction of data flow through the device. The OE input disables both
the A and B ports by placing them in a high impedance state.
The LCX245 is fabricated with an advanced CMOS technology to achieve high speed
operation while maintaining CMOS low power dissipation.
16.11.2
Features
5V tolerant inputs and outputs

2.3V to 3.6V VCC specifications provided
7.0ns tPDmax. (VCC=3.3V), 10A ICCmax.
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
24mA output drive (VCC=3.0V)
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500mA
ESD performance: Human body model>2000V, Machine model>200V
Leadless DQFN package
16.11.3
16.11.4
Pinning
16.12 FSA3157
16.12.1
General Description
The NC7SB3157 / FSA3157 is a high-performance, single- pole / double-throw (SPDT)

analog switch or 2:1 multiplexer/ de-multiplexer bus switch. The device is fabricated with
advanced sub-micron CMOS technology to achieve high-speed enable and disable times
and low on resistance. The break-beforemake select circuitry prevents disruption of
signals on the B Port due to both switches temporarily being enabled during select pin
switching. The device is specified to operate over the 1.65 to 5.5V VCC operating range.
The control input tolerates voltages up to 5.5V, independent of the VCC operating range.
16.12.2
Features
Useful in both analog and digital applications

Space-saving, SC70 6-lead surface mount package
Ultra-small, MicroPak Pb-free leadless package
Low On Resistance: <10 on typical at 3.3V VCC
Broad VCC operating range: 1.65V to 5.5V
Rail-to-rail signal handling
Power-down, high-impedance control input
Over-voltage tolerance of control input to 7.0V
Break-before-make enable circuitry
250 MHz, 3dB bandwidth
16.12.3
16.12.4
Pinning
16.13 TSH343
16.13.1
General Description
The TSH343 is a triple single-supply video buffer featuring an internal gain of 6dB and a
large bandwidth of 280MHz. The main advantage of this circuit is that its input DC level
shifter allows for video signals on 75 video lines without damage to the synchronization
tip of the video signal, while using a single 5V power supply with no input capacitor. The
DC level shifter is internally fixed and optimized to keep the output video signals between
low and high output rails in the best position for the greatest linearity. Chapter 4 of this
datasheet gives technical support when using the TSH343 as Y-Pb-Pr driver for video
DAC output on a video line (see TSH344 for RGB signals). The TSH343 is available in
the compact SO8 plastic package for optimum space-saving.
16.13.2
Features
Bandwidth: 280MHz
5V single-supply operation
Internal input DC level shifter
No input capacitor required
Internal gain of 6dB for a matching between 3 channels
AC or DC output-coupled
Very low harmonic distortion
Slew rate: 780V/s
Specified for 150 and 100 loads
Tested on 5V power supply
Data min. and max. are tested during production
16.13.3
16.13.4
Pinning
16.14 MT48LC4M16A2TG8E
16.14.1
General Description
The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing

67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous
interface (all signals are registered on the positive edge of the clock signal, CLK). Each of
the x4s 16,777,216-bit banks is organized as 4,096 rows by 1,024 columns by 4 bits.
Each of the x8s 16,777,216-bit banks is organized as 4,096 rows by 512 columns by 8
bits. Each of the x16s 16,777,216-bit banks is organized as 4,096 rows by 256 columns
by 16 bits. Read and write accesses to the SDRAM are burst oriented; accesses start at a
selected location and continue for a programmed number of locations in a programmed
sequence. Accesses begin with the registration of an ACTIVE command, which is then
ollowed by a READ or WRITE command. The address bits registered coincident with the
ACTIVE command are used to select the bank and row to be accessed (BA0, BA1 select
the bank; A0-A11 select the row).
16.14.2
Features
PC66-, PC100- and PC133-compliant

143 MHz, graphical 4 Meg x 16 option
Fully synchronous; all signals registered on positive edge of system clock
Internal pipelined operation; column address can be changed every clock cycle
Internal banks for hiding row access/precharge
Programmable burst lengths: 1, 2, 4, 8 or full page
Auto Precharge, includes CONCURRENT AUTO PRECHARGE, and AutO Refresh
Modes
Self Refresh Modes: standard and low power
64ms, 4,096-cycle refresh
LVTTL-compatible inputs and outputs
Single +3.3V 0.3V power supply
16.14.3
16.14.4
Pinning
16.15 MP1583
16.15.1
General Description
The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves
3A continuous output current over a wide input supply range with excellent load and line
regulation.
Current mode operation provides fast transient response and eases loop stabilization.
Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.
Adjustable soft-start reduces the stress on the input source at turn-on. In shutdown mode
the regulator draws 20A of supply current.
The MP1583 requires a minimum number of readily available external components to
complete a 3A step down DC to DC converter solution.
16.15.2
Features
3A Output Current
Programmable Soft-Start
100m Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic Capacitors
Up to 95% Efficiency
20A Shutdown Mode
Fixed 385KHz frequency
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Wide 4.75 to 23V operating Input Range
Output Adjustable From 1.22 to 21V
Under Voltage Lockout
Available in 8 pin SOIC Package
3A Evaluation Board Available
16.15.3
16.15.4
Pinning
16.16 MP2112
16.16.1
General Description
The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter.
The device integrates a main switch and a synchronous rectifier for high efficiency without
an external Schottky diode. It is ideal for powering portable equipment that powered by a
single cell Lithium-Ion (Li+) battery. The MP2112 can supply 1A of load current from a
2.5V to 6V input voltage. The output voltage can be regulated as low as 0.6V. The
MP2112 can also run at 100% duty cycle for low dropout applications.
The MP2112 is available in a space-saving 6-pin QFN package.
16.16.2
Features
High Efficiency: Up to 95%

1MHz Constant Switching Frequency
1A Available Load Current
2.5V to 6V Input Voltage Range
Output Voltage as Low as 0.6V
100% Duty Cycle in Dropout
Current Mode Control
Short Circuit Protection
Thermal Fault Protection
<0.1A Shutdown Current
Space Saving 3mm x 3mm QFN6 Package
16.16.3
16.16.4
Pinning
16.17 MAX809LTR
16.17.1
General Description
The MAX809 and MAX810 are cost-effective system supervisor circuits designed to
monitor VCC in digital systems and provide a reset signal to the host processor when
necessary. No external components are required. The reset output is driven active within
~200msec of VCC falling through the reset voltage threshold. Reset is maintained active
for a timeout period which is trimmed by the factory after VCC rises above the reset
threshold. The MAX810 has an active-high RESET output while the MAX809 has an
active-low RESET output. Both devices are available in SOT-23 and SC-70 packages.
The MAX809/810 are optimized to reject fast transient glitches on the VCC line. Low
supply current of 0.5 A (VCC = 3.2 V) makes these devices suitable for battery powered
applications.
16.17.2
Features
Precision VCC Monitor for 1.5 V, 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies
Precision Monitoring Voltages from 1.2 V to 4.9 V Available in 100 mV Steps
Four Guaranteed Minimum Power-On Reset Pulse Width Available (1 ms, 20 ms,
100 ms, and 140 ms)
RESET Output Guaranteed to VCC = 1.0 V.
Low Supply Current
Compatible with Hot Plug Applications
VCC Transient Immunity
No External Components
Wide Operating Temperature: -40C to 105C
Pb-Free Packages are Available
16.17.3
16.17.4
Pinning
17SERVICE MENU SETTINGS

In order to reach service menu, First Press MENU Then press the remote control code,
which is 4725. In DTV mode, first press MENU and select TV SETUP. Then, press
4725.
17.1 Video Setup

Panel Info <..................................>
32_LC_SAC1
Blue Background <.....>
If Menu selected, Blue Background item is seen in Feature
menu.
If Yes selected, Blue Background is on and not seen in
Feature menu
Film Mode <.....>
If Yes selected, Film Mode feature is active.
Dynamic Contrast <.....>
If Yes selected, Dynamic Contrast feature is active.
Game Mode <...........>
If Yes selected, Game Mode feature is active
SRGB For PC <...........>
If Yes selected, PCs can use SRGB option.
Dynamic Noise Reduction<...........>
If Yes selected, Dynamic Noise Reduction feature is active
WSS Option<...........>
If Yes selected, WSS Option can be used
17.2 AudioSetup
BG<.....>
Europe
New Zelland
Australia
No
DK<.....>
I<.....>
L<.....>
Equalizer <.....>
If Yes selected, Equalizer item is seen in Sound menu.
Headphone <.....>
If Yes selected, Headphone item is seen in Sound menu.
Power On/Off Melody <.....>
If Yes selected, when power on/off conditions, the power on/off
melody can be heard.
Dynamic Bass <.....>Value between 0 to 12
Effect<.....> Value between 0 to 7
Audio Delay ,offset <.....> Value between 0 to 190
Audio Setup Cont...2
Carrier mute<.......> Value between 0 to 28

Headphone Sound Select <.......>
Always Active Select
Always Inactive Select
Menu
Always Main Menu
Always PIP/PAP Window
Sound Mode Detect Time <.......> Value between 0 to 255
Noise Reduction Threshold <.......> Value between 0 to 255
Noise Reduction Time <.......> Value between 0 to 15
AVL Attack Time <.......> Value between 0 to 255
AVL Release Time <.......> Value between 0 to 255
Prescales ( AVL On)
FM Prescale<.......> Value between 0 to 255
AM Prescale <.......> Value between 0 to 255
NICAM Prescale <.......> Value between 0 to 255
SCART Prescale <.......> Value between 0 to 255
FAV Prescale <.......> Value between 0 to 255
DTV Prescale <.......> Value between 0 to 255
HDMI Prescale <.......> Value between 0 to 255
YPbPr/PC Prescale <.......> Value between 0 to 255
An. USB Prescale <.......> Value between 0 to 255
Dig. USB Prescale <.......> Value between 0 to 255
Prescales ( AVL Off)
FM Prescale<.......> Value between 0 to 255
AM Prescale <.......> Value between 0 to 255
NICAM Prescale <.......> Value between 0 to 255
SCART Prescale <.......> Value between 0 to 255
FAV Prescale <.......> Value between 0 to 255
DTV Prescale <.......> Value between 0 to 255
HDMI Prescale <.......> Value between 0 to 255
YPbPr/PC Prescale <.......> Value between 0 to 255
An. USB Prescale <.......> Value between 0 to 255
Dig. USB Prescale <.......> Value between 0 to 255
Clipping Levels ( AVL On)
FM Clipping <.......> Value between 0 to 255
AM Clipping <.......> Value between 0 to 255
NICAM Clipping <.......> Value between 0 to 255
SCART Clipping <.......> Value between 0 to 255
FAV Clipping <.......> Value between 0 to 255
DTV Clipping <.......> Value between 0 to 255
HDMI Clipping <.......> Value between 0 to 255
YPbPr/PC Clipping <.......> Value between 0 to 255
An. USB Clipping <.......> Value between 0 to 255
Dig. USB Clipping <.......> Value between 0 to 255
Clipping Levels ( AVL Off)
FM Clipping <.......> Value between 0 to 255
AM Clipping <.......> Value between 0 to 255
NICAM Clipping <.......> Value between 0 to 255
SCART Clipping <.......> Value between 0 to 255

FAV Clipping <.......> Value between 0 to 255
DTV Clipping <.......> Value between 0 to 255
HDMI Clipping <.......> Value between 0 to 255
YPbPr/PC Clipping <.......> Value between 0 to 255
An. USB Clipping <.......> Value between 0 to 255
Dig. USB Clipping <.......> Value between 0 to 255
17.3 Service Scan/Tuning Setup

First Search for L/L <.......>
ATS Delay Time (ms) <.......> Value between 0 to +200
Main Tuner Setup
Tuner Type
LC_TDTC_GXX1D
Thomson DTT7543X
Philips TD1318AF-3
Samsung DTOs403LH172A
Generic ( Analog Only)
Control Byte <.......> Value between 0 to +255
BSW1 <.......> Value between 0 to +255
Low-Mid Low Byte <.......>
Low-Mid High Byte <.......>
Mid-High Low Byte <.......>
Mid-High High Byte <.......>
S Band TOP <.......>
VIF TOP <.......> Value between 0 to +15
VIF TOP SECAM <.......> Value between 0 to +15
VIF TOP DK<.......> Value between 0 to +15
Synch Threshold<.......> Value between 0 to +40
17.4 Options
Options-1
Power Up
Standby
Last state
TV Open Mode
Source
1st TV
Last Tv
First APS <.......>
If Yes selected, first time TV opens by asking APS.
APS Volume <.......> Value between 0 to +63
Burn In Mode <.......>
If Yes selected, TV opens with Burn-In mode. This mode is
used in manufacturing.
APS Test
Autostore <.......>
If Yes selected, Channel is automatically stored.
Unicode Enabled <.......>
If Yes selected,Unicode characters can be read in the USB
Files.
Options-2
Source List menu <.......>
If Yes selected, Sorce List Menu appears on the screen when
press source button.
RC Select <.......>
RC Group 1
RC Group 2
RC Group 3
RC Group 4
RC Group 5
RC Group 6
Double Digit Key <.......>
If Yes selected, Double Digit Button on RC activates.
Protection <.......>
If Yes selected,short circuit protection activates.
Led Type <.......>
1 Led 1 Color
1 Led 2 Color
2 Led 2 Color
1 Led 3 Color
2 Led 3 Color
200 Programme <.......>
If Yes selected, totaly 200 programmes can be used.
TouchPad <.......>
If Yes selected, TouchPad can be used.
Teletext Options
TXT Darkness <.......> Value between 0 to +63
TXT Type <.......>
Fasttext&Toptext
No
Default
Fastext
Toptext
TXT Language <.......>
Menu
West
East
Cyrillic
Turk/Gre
Arabic
Persian
Auto
No Txt Warning <.......>
If Yes selected, No Txt Transmission warning appears on

the screen when pressing txt button from RC.
Txt Subtitle <.......>
If Yes selected, Teletext subtitles can be seen.
Optional Features
Default Zoom <.......>
Menu
16:9
4:3
Panaromic
14:9 Zoom
Menu Timeout <.......>
Menu
15 Sec
30 Sec
60 Sec
No Time
Backlight <.......>
If Yes selected, Backlight feature is active.
100 Step Slider <.......>
If Yes selected, 64 step sliders will become 100 step sliders.
Analog USB Enabled <.......>
If Yes selected, Analog USB option is active.
Menu Double Size <.......>
If Yes selected, menu sizes increases.
CEC Enable <.......>
If Yes selected, CEC feature is active.
Digital USB Hotplug <.......>
If Yes selected, Digital USB Hotplug feature is active.
PIP Options
Pip <......>
AV PIP
No PIP
PC PIP
Hotel Options <......>
Hotel TV <......>
If Yes selected, Hotel TV feature is active.
IR Smartloader <......>
If Yes selected, IR Smartloader feature is active.
17.5 External Source Settings

TV <.......>
DTV <.......>
Ext 2 <.......>
Ext 2 S <.......>
FAV <.......>
BAV <.......>
S-Video <.......>
HDMI 1 <.......>
HDMI 2 <.......>
HDMI 3 <.......>
HDMI 4 <.......>
YPbPr <.......>
PC <.......>
17.6 Preset
User Ad.j
ADC Adj.
Service Adj.
All Adj.
Init Factory Channels.
17.7 NVM Edit

NVM-edit addr. (hex)
NVM-edit data (hex)
NVM-data dec
17.8 Programming
HDMI DDC Update Mode <.......>
HDCP Key Update Mode <.......>
Software Bypass <.......>
If On selected, speaker effects are bypassed.
LVDS Clock Step <.......> Value between 0 to +255
Memory Clock Step <.......> Value between 0 to +255
DTV Download <.......>
If On selected, DTV software can be updated from SCART.
DSUB9 Download <.......>
If On selected, DTV software can be updated from DSUB9.
17.9 Diagnostic
Eeprom I2C
Tuner I2C
IF I2C
HDMI I2C
17.10 Product Info
18 SOFTWARE UPDATE DESCRIPTION

16.1 17MB37 Analog Part Software Update With Bootloader Procedure
1.1 The File Types Used By The Bootloader
All file types that used by the bootloader software are listed below:
1. The Binary File : It has .bin extension and it is the tv application. Its size is 1920 Kb.
2. The Config Binary File : It has .cin extension and it is the config of the tv application.
Its size may be 64 Kb or a few times 64 Kb.
3. The Test Script File : It has .txt extension and it is the test script that is parsed and
executed by the bootloader. It dont have to be any times of 64 Kb.
4. The Test Binary File : It has .tin extension and it is used and written by the test
groups. It is run to understand the problem part of the hardware.
Alltough a file that is used by the bootloader can be had any one of these extensions, its
name has to be VESTEL_S and it has to be located in the root directory of the usb
device.
1.2 Usage of The Bootloader
1. The starting to pass through : The chassis is only powered up.
2. The starting to download something : When chassis is powered up the menu key has to
be pushed.Before the chassis is powered up and if any usb device is plugged to the usb
port, the programme is downloaded from usb firstly.
Any usb device is plugged to usb port , user must open hyperterminal in the pc and
connect pc to chassis via Mstar debug tool and any one of scart,dsub9 or I2c connectors.
Serial connection settings are listed below:
-
Bit per second: 115200

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
In this case the bootloader sofware puts C character to uart. After repeating C
characters are seen in the hyperterminal user can send any file to chassis by selecting
Transfer -> Send File menu item and choosing 1K Xmodem from protocol section.
Figure 1. The Sample Output Before Sending The File
2. EEProm update
To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used.
Serial connection settings are listed below:
-

Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
Programming menu item is choosed in the service menu and switch HDCP Key Update
Mode from off to on.
Figure 2. The Programming Service Menu

After then you must see Xmodem menu in the hyperterminal.To download hdcp key press
k or to download eeprom content press w.
Figure 3. Xmodem Menu

If the repeated C characters are seen you can transfer file content via select Transfer>Send File and choose Xmodem protocol and click the Send button.
Figure 4. The Starting To Send
16.2 17MB37 HDCP key upload procedure.

1) Turn on TV set.
2) Open a COM connection using fallowing parameters and select ISP COM Port No
Baud Rate: 9600 bps
Data Bits: 8
Stop Bits: 1
Parity: None
Flow Control: None
3) Enter service menu by pressing 4 7 2 5 consecutively while main menu is
open
4) Select 9. Programming
5) Select HDMI HDCP Update Mode yes.
6) On Hyper Terminal Window press k
7) Click on send file under Transfer Tab.
8) Select Xmodem and choose the HDCP key to be uploaded.
9) Press send button
10)Restart TV set
16.3 17MB37 Digital Software Update From SCART

Adjusting DTV Download Mode:
1. Power on the TV.
2. Exit the Stby Mode.
3. Enter the Tv Menu.
4. Enter 4725 for jumping to Service Settings.
5. Select 8. Programming step.
6. Change 6. DTV Download to On.
7. Switch to the Stby mode.
Adjusting HyperTerminal:
1. Connect the MB37 SCART Interface to SCART1 (bottom SCART plug).
2. Also connect the MB37 SCART Interface to PC.
3. Open HyperTerminal.
4. Determine the COM settings listed and showed below.
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
COM Properties Window
6. Click OK.
Software Updating Procedure
1. In the HyperTerminal Menu, click the Connect button.
2. Exit the Stby Mode.
3. The Space button on the keyboard must be pressed, when the following window can
be seen.
Selection Window
4. Press the 2 button on the keyboard for choosing 2. Upgrade Application with
Xmodem.
5. Repeating C characters are seen in the HyperTerminal menu.
The Sample Output Before Sending The File
6. Click the Send button on the HyperTerminal

7. Select the Filename xxxx_slot1.img using Browse.
8. Choose the 1K Xmodem from Protocol option.
Selection of File
File and Protocol Selection Window
Note: In the Software updating Procedure section, when the first C character is seen,
the filename selection process must be finished before 10 seconds. If the process can not
be finished, the file sending operation will be cancelled. The following figure shows this
situation.
Capture of Receving Data Failing
9. When sending the file the following window must be seen.
Capture of Sending Process
10. After the sending process the following HyperTerminal window must be seen.
Capture of End of The Sending Process
11. For sending second program file, the Software Updating Procedure must be repeated
from the step X. Select the Filename xxxx_slot2.img using Browse.
12. After sending the second program file, the Software Updating Procedure will be
succesful.
Note: After the File Sending Process,
1. Upgrade Application with FUM
2. Upgrade Application with Xmodem, options must be seen.
End of The Sending Process
Checking Of The New Software

1. Turn off and on the TV.
2. Enter the Setup submenu in the DTV Menu.
3. Choose the Configuration option.
4. For controlling new software, check the Receiver Upgrade option.
16.4 17MB37 Digital Software Update From USB

Software upgrade is possible via USB disk by folowing the steps below.
1. Copy the bin file, including higher version than the software loaded in flash, into the
USB flash memory root directory. This file should be named up.bin.
2. Insert the USB disk.
3. Digital module performs version and CRC check. If version and CRC check is
successful, then a message prompt appears to notify user about new version. If the
user confirms loading of new version, upgrade.bin file is written into flash unused
slot.
4. Digital module disables the previous software in the flash and then a system reset
is performed.
5. After the reset, digital module starts with new software.
Revert operation:
With revert operation, it is possible to downgrade the software.
Revert operation is very similar to upgrade process. In the revert operation, file name
should be f_up.bin. Also user confirmation is not asked.
1. Copy the bin file into the USB flash memory root directory. This file should be
named force_upgrade.bin.
2. Insert the USB disk.
3. A lower version than the software in flash can be loaded with revert operation.
Digital module performs only CRC check. If CRC check is successful, then
force_upgrade.bin file is written into flash unused slot.
4. Digital module disables the previous software in the flash.
5. A message prompt is displayed to notify user about end of revert process.
6. Power off/on is required to start digital module with the new software.
For controlling new software, check the Receiver Upgrade option.
19 BLOCK DIAGRAMS
RJ45
I2C_TUN_DVB
I2C_5V
TS_CI
RF_AGC_DVB
THOMSON
DTT75430
LG
TDTC-GXX1D
ETHERNET PHY
STE101P
FSA3157
IF AGC
SWITCH
IF AGC
MPEG4
DECODER
STi7101
TS_C
DVB-C QAM
DEMOD.
STV0297
2xFLASH
NOR 64Mbit (common)
NAND 2Gbit (w/ethernet)
TS_CI
4xDDR1
16Mx16
IF AGC_C
IF AGC_T
USB HUB
USB2503
ANALOG IF
UART
LVDS
CONNECTOR
2MB SD
RAM
YPbPr
14.3181MHz
XTAL
SPDIF
RESET IC
MAX809LTR
EEPROM
24C32
PANEL
SUPPLY
1MB Serial
Flash
PANEL_VCC
PANEL
VCC SW
SAW
K3958M
I2C_5V
SCL/SDA
I2C LEVEL
SHIFTER CIRCUIT
VIF_TUNER
StBy M
I2C
SIF_TUNER
SC1 CVBS
SC1 RGB/FB
SCART
I/O PORTS
+12V
+3V3_STBY
+1V2_STBY
+2V6
SC1_CVBS_OUT
+3V3
SC1_AUD_OUT
AUDIO AMP.
PT2333 or MP1720
2 x 2.5W
ON/OFF
MAIN SPEAKER
OUT L/R
HDMI_2
YPbPr
BACKLIGHT_ON/OFF
BACKLIGHT_DIMMING
POWER_ON/OFF
DVD AUDIO_IN
DVD Y/C_IN
HP
AMPLIFIER
TDA1308T
DVD
Connector
VGA
HDMI_1
-P
POP NOISE
CIRCUIT
+24V
+12V
+5V_STBY
IR
DVD_SENSE
DRAWN BY: SADIK EHT
LINE OUT L/R
PI5V330
RGB Switch
IDTV/YPbPr_SW
IDTV_YPbPr/SOY
DATE:03.03.2009
+5V
LINE OUT
HDMI1
TMDS DATA/CLOCK 2
VESTEL ELECTRONICS R&D

GROUP
17MB37 BLOCK DIAGRAM
VGA/YPbPr
AUDIO L/R
YPbPr
AUDIO L/R
CVBS
Y/C
DDC
TMDS DATA/CLK
I2C2/UART
DDC
SVHS FAV_Video/Audio
HP OUT
L/R
DDC
4 Layer PCB
EDID
E2PROM
24C02
TMDS DATA/CLK
HDMI2
DETACHED HP
MUTE
HDMI1
EDID
E2PROM
24C02
+P
+V
I/O PORTS
LED1
LED2
DDC_WP
PANEL_VCC_ON/OFF
POWER ON/OFF
SCART1 PIN8
MPEG DECODER IRQ
PROTECTION
NVM_WP
KEYBOARD
MST6Wx7
SC1 AUD_IN
TRANSISTOR
SWITCH
TV/AV
PANEL_ VCC_ ON/OFF
I/O PORTS
SAW
K9656M
SCL/SDA2
This Block does not exist,

unless PCB has enough
space
Main Speaker 4R
RF AGC
I2C
BUFFERS
74LCX244
TS_T
DVB-T COFDM
DEMOD.
STV0362
RF_AGC_A
DIGITAL IF
74HCT4053
I2C & AGC
SWITCH
19.1 General Block Diagram
CI_BUFFERS
IR ON/OFF
+5V
+3V3_STBY
+3V3
DVD Power
Connector
+12V
POWER
MODULE
-V
AIF
12
ANALOG_IF
DIF1
11
TUNER_PIN11
DIF2
10
TUNER_PIN10
IF_AGC
B2
F116
OVER_CUR_DETECT
5V_TUN
R502
10k
330R
2
2
330R
RF_AGC
R622
1k
3
1
1
Q102
FDN336P
BC848B
Q115
R503
10k
C359
10u
10V
AGC
B
33V_TUNER
C532
1u
50V
2
1
47p
50V
D121
33V_TUNER
1N4148
R111
12k
C448
47u
16V
1
RF_AGC_A
+5V
AIF_OUT
IF_AGC_DVB_IN
N.C.
2
SDA
SCL
S308
BA
F159
2
5V_TUN
330R
SCL_TUNER
1
2
3
4
5
6
7
8
SCL_TUN_DVB
SCL
RF_AGC_DVB
RF_AGC
RF_AGC_A
10V
100n
C137
NEAR THE TUNER
2
SCL_TUN
2Y1
2Y0
3Y1
3Z
3Y0
E
VEE
GND
RF_AGC
ACT_ANT
SCL_TUN
SDA_TUN
SDA_TUN_DVB
SDA
R254
4k7
5V_VCC
IDTV_SW
R127
47R
C587
47p
50V
1
SDA_TUNER
16
15
14
13
12
11
10
9
VCC
2Z
1Z
1Y1
1Y0
S1
S2
S3
3
S104
74HCT4053
R126
47R
C586
47p
50V
1
SCL_TUNER
R624
1k
100n
U115 10V
IF_AGC_DVB
ANALOG_IF
SDA_TUNER
RF_AGC
10V
100n
C136
T_AGC
R505
10k
This part must be placed near the tuner
ADDRESS_SEL_TUNER
SAS
IF_AGC_DVB_IN
2
5V_TUN
S105
AND I2C SWITCH PART
5V_VCC
TUNER_PIN10
10
9
C128
1u
C626
L116
11
Near Tuner
supply pin
ACT_ANT
IF_AGC
C1158
220u
6V3
ANT_CTRL
TU101
DTOS403LH172A
VT
C134
100n
10V
!!!En az 1.8 cm2 altta ve stte soutma alan braklmal. 1K
Samsung/Thomson
IFOUT+
ACT_ANT
33V_TUNER
R460
330R
SCL_TUNER
TUNER_PIN11
IFOUT-
C360
10u
10V
ANT_PWR
5V_TUN
VOUT
R504
10k
TP151
RF_AGC
OUT 2
GND
B1
SDA_TUNER
SCL
C600
47u
16V
F234
SDA
3 IN
330R
5V_TUN
TH101
ADDRESS_SEL_TUNER
8V_VCC
5V_TUN
U123
LM1117
NC
2R1
IF_AGC_DVB_IN
R482
4R7
R408
1k
AS
ACTIVE ANTENNA
R501
10k
TU102 TDTC-G101D
TUNER SUPPLY OPSION
LG
A
Q116
BC848B
SDA_TUN
R595
22k
C913
TUNER_PIN11
2p2
50V
C1029
DIGITAL_IF1n
50V
C914
TUNER_PIN10
Q140
2
BSN20
Q144
BF799
10n
16V
N.C.
R384
10R
VIFM
Z102
C547
1 IN1
OUT1 4
K3958M
IN2
OUT2 5
2
GND
R623
1k
R209
100k
F187
1
62
AVDD_MPLL
63
VR27
64
VR12
65
AVDD_RXS
66
GND_RXS
67
SIFP
68
SIFM
69
VIFM
70
VIFP
71
GND_RXV
72
AVDD_RXV
73
TAGC
2
1
330R
100n
10V
F184
2
330R
3V3_VCC
SIFP
SIFM
VIFM
C361
1
330R
5V_TUN
C129
10u
10V
F185
3V3_VCC
VIFP
100n
10V
F186
1
U138
MST6WB7GQ-3
3V3_STBY
100p
50V
C597
220p
50V
C620
100n
10V
C636
220n
10V
2
1
330R
2
C510
100n
10V
4k7
R253
T_AGC
10n
16V
2u2
N.C.
R680
56R
L104
1u
22k
R594
SIF_CTL
ANALOG_IF
R210
100k
C545
L111
R125
47R
680R
R735
1u
2
R483
1k2
L114
L101
1u
1
C135
100n
10V
1
R252
4k7
C520
47u
16V
C611
220u
6V3
C130
SIFM
10u
10V
100n
WARNING!!! This part must be close
to chip
10V
C363
C131
10u
10V
D145
C132
1
5V_TUN
SIFP
5V_TUN
10n
16V
OPTIONAL COIL
R38
220R
R474
6k8
R1300
220R
1 IN1
OUT1 4
K9656M
IN2
OUT2 5
2
GND
BA782
C467
10u
10V
Z101
C546
C364
R231
3k3
1
R473
6k8
5V_TUN
5V_TUN
WARNING!!! Saw filter outputs must be close the chip
DIGITAL_IF+
1n
50V
VIFP
WARNING!!!
This part must be close to chip
F
V-1 e gecerken yapilan updateler
VESTEL PROJECT NAME : 17mb37
Video SAW filitre cikislari caprazland
SHEET:1 OF:18
SCH NAME :ANALOG IF

DRAWN BY :SADIK
A3
SEHIT
14-10-2009_09:09
AX M
50V
220p
TP360
C107
R219
100R
600R
SPDIF_OUT_COAXIAL
SC1_AUD_L_OUT
F194
D184
C5V6
AUDIO LINE OUT
100n
10V
R1250
47R
TP289
RED
4
3
TP300
TP299
WHT
2
1
TP302
F209
2
600R
F215
IPOD_Y_IN
1n
50V
30
R1251
47R
75R
R1327
YPBPR_AUD_L_IN
S292
1n
50V
75R
R1328
IPOD_C_IN
10k
R1234
C1143
75R
R1325
R506
10k
R507
10k
R511
10k
1
1
TP103
TP104
TP102
TP105
50V
27p
2
1
50V
2
1
27p
50V
C437
2
1
C438
YPBPR
INPUT
1
1
1
2
3
4
5
6
7
8
IN
S1A
S2A
DA
S1B
S2B
DB
GND
VCC
EN
S1D
S2D
DD
S1C
S2C
DC
16
15
14
13
12
11
10
9
10k
R1235
10k
R1238
1u
S276 6V3
5V_VCC
10k
R1237
C1144
DVD_AUD_L_IN
5V_VCC
50V
1n
600R
27p
50V
DVD_SPDIF
F211
1
C473
2
600R
TP297
TP298
JK106
6
5
RED
10k
R1239
S294
1u
6V3
SAV_AUD_L_IN
TP296
10k
R1229
5V_VCC
10k
R1232
C1141
10k
R1228
10k
R1231
5V_VCC
10k
R1230
S282
IPOD_L
SIDE AV INPUT
2
1u
6V3
S281
SAV_CVBS
TP283
50V
1n
SW_L_IN
1
600R
2
1
YLW
SAV_AUD_R_IN
C474
2
4
3
DVD_AUD_L_IN
50V
1n
F212
1
R683
33k
50V
F216
2
TP295
50V
1n
C1119
R1288
22k
100n
10V
RCA_Y
10u
10V
27p
WHT
C440
2
1
10u
25V
C1138
27p
50V
C1113
R1286
22k
R639
75R
SW_C_IN
R1254
47R
C365
TP4
50V
1n
C1118
R1287
22k
DVD_AUD_R_IN
50V
1n
10k
R1233
C1142
VESTEL PROJECT NAME :
1
3
CN143
C1044
SW_R_IN
2k2
R712
2k2
R711
2
DVD_AUD_R_IN
600R
S278
COAXIAL SPDIF OUTPUT

YPBPR/PC LINE INPUT
C1140
27p
50V
TP293
RCA_PB
75R
R638
100n
10V
C1137
TP10 F292
TX/SDA 5V_VCC
U194
PI5V330
DVD_C_IN
27p
50V
TP284
C1050
600R
SW_Y_IN
C480
1
75R
R1326
5V_VCC
S277
YPBPR_AUD_R_IN
C479
1
IR_IN
GRN
2
1
75R
R637
DVD_Y_IN
DVD_IR
1
C1139
27p
50V
BLU
4
3
TP12 F291
TP2
S293
600R
R1261
1k
600R
28
DVD_Y_IN
600R
F293
1
C1049
100n
10V
5
TP20
TP13
SPDIF_OUT_COAXIAL
F208
1
10V
IPOD_GPIO1 100n
R1267
4k7
TP1F288
RED
3V3_VCC
DVD_SENSE
DVD_C_IN
27p
C1136 50V
600R
C1061
TP14
DVD_IPOD_SW
6
5
26
BLK
25
29
C115
S217
8
MAIN_L
600R
50V
220p
JK104
24
TP6
F290
TP21
C1135
600R
IPOD_L
RX/SCL
TP301
23
27
2
22
R1285
22k
F289
1
20
21
TP7
TP5
IPOD_GPIO2
TP19
IPOD_GPIO3
TP17
C1060
D183
1
C5V6
C1059
100n
10V
TP3
10
18
19
TP24
D194
IPOD_C_IN
16
17
TP22
MAIN_R
LINE_L_OUT
TP294
RCA_PR
220p
50V
6
5
600R
1n
R216 50V
100R
15
4A/24VDC
11
14
12V_VCC
R1240
10k
C15V
TP9
C113
2
WHT 1
TP11
IPOD_R
12
C5V6
F205
1
12
13
C489
1
11
AMP_MUTE
TP8
LINE_R_OUT
10
C442
JK101
D185
IPOD_Y_IN
FS1
POP_MUTE
TP16
50V
27p
R682
33k
C1090
220n
25V
TP292
DVD CONNECTION
C441
12V_IPOD
NUP4004M5 2
4
D104
5
12V_IPOD
12V_IPOD
1
3
D187
C18V
12V_IPOD
4
RED 3
600R
TP347
JK111
INPUT
TP18
CN141
SC1_AUD_R_OUT
VGA
F204
100n
10V
75R
R1329
R213
100R
C475
TP15
S192
C1075
50V
1n
TP334
VGA_R
CN118
C1121
C488
R217
100R
1
SPDIF_OUT
TP382
600R
IPOD INTERFACE
TP348
VGA_G
1n
50V
600R
VGA_B
1n
50V
SC1_AUD_R_IN
R464
100R
600R
F207
1
1
TP335
F195
SCART1
TP288
1n
50V
100n
10V
C484
1
27p
C478
C602
50V
220p
TP362
Q117
BC848B
C229
F197
1
R400
1k
SC1_AUD_L_IN
600R
TP363
TP336
50V
TP357
1
2
TP303
TP305
TP306
VGA_HSNC
F198
C477
R752
4k7
100n
10V
C108
SPDIF OUTPUT INTERFACE
600R
5V_SPDIF
R242
4k7
100R
F196
1
C5V6
10k
R1236
50V
1n
SC1_B
VGA_VSNC
R349
1
27p
C140
50V
220p
5 R4 4
VGA_DDC_5V
TP304
2 NUP4004M5
4
D101
5
GND 4
1
3
R255
4k7
C15V
D116
SC1_PIN8
TP359
10u
10V
RX/SCL_SC
TP358
75R
R643
C116
R596
22k
D140
12
50V
220p
10
A2 3
TP352
2
A1 2
ST24LC21
5 SDA
SC1_G
11
7 WP
6 SCL
10
A0 1
U112
6 R3 3
C439
12
S-VIDEO IN
D146
BAV70
TP354
8 VCC
7 R2 2
11
VGA CONNECTOR
C104
13
VGA_DDC_5V
13
S_VIDEO_Y_IN
C112
TP355
TP351
14
TX/SDA_SC
TP291
3
2
D114
50V
220p
75k
R641
4
1
TP290
S_VIDEO_C_IN
C5V6
2
JK102
TP282
TP356
SC1_R
50V
220p
SC1_FB
D113
15
D117
2
C5V6
47R
R128
C103
14
C5V6
C138
100n
10V
R584
100R
8
1
R1
PROG_EN
75R
R644
D111
15
C5V6
2
75R
R640
5V_SPDIF
C1007
100n
10V
1
1
16
SCART LT1
D115
2
SC1_CVBS_OUT
TP346
17
330R
C366
220p
50V
50V
220p
18
SC101
C5V1
5V_VCC
R120
10k
C111
C5V6
C105
220p
50V
SC1_CVBS_IN
TP361
20
F118
1
19
D172
1
C5V6
C106
TP101
NUP4004M5 2
4
D102
5
D112
2
50V
220p
1
3
21
NUP4004M5 2
4
D106
5
TP287
5V_VCC
1
C1120
R1284
22k
DRAWN BY :SADIK
A3
SHEET:2 OF:18
SCH NAME :A/V INTERFACE
IPOD_R
1u
6V3
17mb37
SEHIT
14-10-2009_09:10
AX M
C656
100n
10V
10V
10u
SW_Y_IN
R142
47R
C151
100n
10V
2
1
Y0
REFP
AUVRP
77
21
REFM
AUVAG
78
AVDD_AU_2
79
LINE_IN_0L
80
100n
10V
BIN1P
22
BIN1P
C422
2
1
Y1
R654
75R
47R
R146
R773
470R
DVB_CVBS
GND3
LINE_OUT_3L
90
100n
10V
34
HSYNC0
LINE_OUT_3R
91
SC1_FB
35
VSYNC0
LINE_OUT_2L
92
VSYNC2
LINE_OUT_2R
93
2 IN1-
R687
33k
CVBS3
36
37
BIN2P
BIN2P
DSP_CH4_R
94
LINE_OUT_1L
10V
10u
DSP_CH1_L
LINE_R_OUT
38
SOGIN2
SOGIN2
95
LINE_OUT_1R
DSP_CH1_R
C372
LINE_OUT_0L
96
RIN2P
40
RIN2P
LINE_OUT_0R
97
C1
41
C1
Y1
42
Y1
43
C0
Y0
44
CVBS3
45
CVBS3
CVBS2
46
CVBS2
Y0
RIN0P
47
CVBS1
CVBS1
C425
48
SW_PB
R149
47R
C428
2
1
R859
10k
BIN2P
R148
47R
C426
2
1
R403
470R
CVBS0
50
VCOM0
51
AVDD_33_4
47n
AVDD_33
52
C144
2
100n
10V
C490
2
49
GIN2P
47n
16V
1
47n
C416
47n
16V
SW_Y
VCOM1
SOGIN2
CVBSOUT1
53
CVBSOUT0
54
GND4
R155
47R
R690
33k
8V_VCC
50V
220p
R522
10k
R751
3k3
BC848B
Q121
SW_PR
R147
47R
CVBS0_OUT
R351
100R
1 OUT1
VDD 8
Pin79
R737
20k
OUT2 7
3 IN1+
V+
5V_VCC
V+
Pin74
C646
100n
16V
33k
R685
4 VSS
IN2+ 5
8V_VCC
2
1
SC1_CVBS_OUT
DVB_Y
C444
2
RCA_Y
27p
AUDIO PREAMPLIFIERS
Place close to Paulo
R662
75R
50V
R830
47R
RIN1P
47n
16V
R224
100R
R228
100R
R229
100R
GAIN_SW1
100n
16V
R520
10k
C499
2
1
IN
S1A
S2A
DA
S1B
S2B
DB
GND
VCC
EN
S1D
S2D
DD
S1C
S2C
DC
16
15
14
13
12
11
10
9
C147
10u
C1006
DVB/YPBPR SWITCH
5V_VCC 27p
330R
1
10V
2
SW_PB
DSP_CH1_L
R227
100R
22k
R420
LINE_OUT_L
1
MAIN_L
1
R418
22k
DSP_CH1_R
R226
100R
22k
R415
DSP_CH3_L
R225
100R
LINE_OUT_R
DSP_CH3_R
C551
AUDIO OUTPUT FILTERS
MAIN_R
R223
100R
22k
R417
SC1_L
1
22k
R416
R222
100R
22k
R414
SC_1_R
Q154
2N7002
C445
DVB_PB
R663
75R
RCA_PB
CVBS0_OUT
DSP_CH4_R
F151
HP_R
10n
16V
R753
4k7
1n
50V R598
22k
HP_L
22k
R419
10n
16V
C430
SAV_AUD_R_IN
C498
2
C550
SW_Y
DSP_CH2_R
DSP_CH4_L
SAV_AUD_L_IN
1n
50V R599
22k
2
1
1
2
3
4
5
6
7
8
SW_PR
R660
75R
R620
300R
100n
16V
R519
10k
10V
100n
10u
10V
R777
75R
VGA_R
R661
75R
1n
50V
R646
75R
R627
1k
50V
C666
1u
16V
C496
2
LINE_IN_3R
U129
PI5V330
SOGIN1
YPBPR_AUD_R_IN
100n
16V
R518
10k
1n
50V
27p
C378
Q119
BC848B
3k3
R750
1n
50V R600
22k
C661
LINE_OUT_L
DVB/YPBPR_SW
C491
R404
470R
POP_MUTE
100n
16V
C663
R736
20k
V+
100R
R221
R467
15k
Q146
BC858B
GIN1P
47n
16V
2
IN2- 6
DVB_PR
VGA_G
R521
10k
RCA_PR
330R
BIN1P
C431
R831
47R
C118
R675
82k
C443
47n
16V
R658
75R
C554
C429
R829
47R
100n
16V
YPBPR_AUD_L_IN
C497
LINE_IN_3L
SCART VIDEO OUTPUT AMPLIFIERS
LINE_L_OUT
BC848B
Q120
TL062
C662
C660
F119
VGA_B
RIN2P
R402
470R
R659
75R
U117
LINE_OUT_R
100n
16V
R517
10k
10V
10u
50V
220p
100n
16V
47n
16V
C371
DSP_CH2_L
C427
2
C555
1n
50V R601
22k
LINE_IN_2R
C119
R676
82k
LINE_IN_2L
R153
47R
C494
2
C643
C630600R
2 IN1-
R674
39k
SC1_L
100n
16V
R516
10k
C642
100n
16V
F219
1n
50V
R655
75R
C650
R738
20k
SW_R_IN
1n
50V R603
22k
V+
R689
33k
IN2+ 5
C0
POP_MUTE
1
C417
2
220p
50V
R677
82k
IN2- 6
DSP_CH3_R
C367
GIN0P
1
1
DSP_CH3_L
GIN2P
33k
R684
GIN2P
39
BIN0P
47n
16V
R139
47R
3 IN1+
C495
LINE_IN_1R
C374
TL062
V+
SW_L_IN
C644
SC1_AUD_L_OUT
DSP_CH4_L
OUT2 7
C418
2
VDD 8
DSP_CH2_R
AVDD_AU
R138
47R
C120
1 OUT1
100n
16V
R515
10k
U118
R739
20k
DSP_CH2_L
4 VSS
R692
33k
10u
10V
R657
75R
220p
50V
R678
82k
100n
16V
LINE_IN_3R
R686
33k
C142
100n
10V
R137
47R
CVBS2
47n
16V
88
LINE_IN_3R
33
1
SC1_R
RIN0P
SC_1_R
8V_VCC
10V
R691
10u
33k
C143
C421
R656
75R
LINE_IN_3L
SC1_G
LINE_IN_2L
LINE_IN_2R
87
LINE_IN_3L
89
47n
16V
R666
75R
SOGIN0
AVDD_33_3 LINE_IN_MONO
SOGIN0
47n
16V
1
86
100n
10V
SC1_B
R667
75R
LINE_IN_2R
C145
100n
10V
R665
75R
GIN0P
C121
C375
2
85
32
AVDD_33
47n
16V
C435
2
LINE_IN_2L
600R
100n
16V
R140
47R
GIN0M
S106
1
1
330R
R664
75R
30
31
50V
C433
2
84
F217
R141
47R
AUCOM
3V3_VCC
R649
75R
BIN0P
SC1_AUD_R_OUT
LINE_IN_1R
F120
83
C649
RIN0P
1n
SAV_CVBS
29
SOGIN0
C612
2
47n
16V
CVBS1
47n
16V
LINE_IN_1R
C631
28
1
GIN0P
SC1_CVBS_IN
BIN0M
LINE_IN_1L
C149
27
C424
47n
16V
C419
R134
47R
47n
16V
1
BIN0P
1
LINE_IN_1L
10V
10u
C549
S_VIDEO_Y_IN
R144
47R
LINE_IN_1L
LINE_IN_0R
C548
RIN1P
82
1n
50V R605
22k
C553
R652
75R
26
81
C420
R133
47R
C423
1
C552
RIN1P
LINE_IN_0R
GIN1P
SC1_AUD_R_IN
C492
D167
C1
25
24
47R
R145
10n
16V
GIN1P
10n
16V
S_VIDEO_C_IN
16V
47n
C645
100n
16V
R514
10k
LINE_IN_0L
R653
75R
SOGIN1
1n
50V R606
22k
1
100n
16V
AVDD_AU
AVDD_AU DECOUPLING CAPACITORS
SOGIN1
23
LINE_IN_0R
47n
16V
C493
2
C655
C368
C659
C150
100n
10V
C434
20
2
C0
C432
SC1_AUD_L_IN
10V
10u C369
10n
16V
75R
R651
R650
75R
76
100n
16V
R513
10k
AUVRM
C152
1
VCLAMP
SW_C_IN
R143
47R
GND5
19
C5V1
VSYNC1
75
10n
16V
VGA_VSNC
16V
47n
18
R607
22k
LINE_IN_0L
74
AUDIO INPUT VOLTAGE DIVISION AND DC BLOCK

C148
AVDD_AU_1
10n
16V
HSYNC1
10n
16V
17
VGA_HSNC
U138
MST6WB7GQ-3
VIDEO TERMINATIONS AND DIFFERENTIAL TRACING

Place 75R termination resistors
close to Paulo reference GNDs
AVDD_AU
22k
R413
F
2
A3
SHEET:3 OF:18
SCH NAME :<DRAWING NAME HERE>
DRAWN BY :<YOUR NAME HERE>
14-10-2009_09:10
AX M
A
CN121
HDMI Receiver In_B
2
BAV70
D147
5V_VCC
U138
MST6WB7GQ-3
HDMIB_5V
1
3
HDMIB_2+
R392
10R
HDMIB_C-
10R
R393
WP 7
HDMI_WP1
3 A2
SCL 6
4 VSS
SDA 5
HDMIB_SCL
HDMIB_SDA
HDMIB_SCL
HDMIB_SDA
HDMIB_5V
HDMIB_HPD
R119
910R
RXACKP
AVDD_USB 192
AVDD_USB
GND1
USB20_DM 193
USB_DM_A
USB_DP_A
HDMIA_0-
RXA0N
USB20_DP 194
HDMIA_0+
RXA0P
GND11 195
AVDD_33_1
VDDP2 196
HDMIA_1-
RXA1N
GND12 197
HDMIA_1+
RXA1P
VDDP3 216
AVDD_33
VDDP
B
VDDP
USB_VBUS 217
GND2
HDMIA_2-
10
RXA2N
USB_DM 218
HDMIA_2+
11
RXA2P
USB_DP 219
12
HPLUGA
13
AVDD_33_2
14
REXT
DI[0] 232
I2S_WS_DVB
HDMIA_SDA
15
DDCDA_SDA
DI[1] 233
I2S_CLK_DVB
C154 HDMIA_SCL
16
DDCDA_SCL
DI[2] 234
I2S_DATA_DVB
HDMIA_HPD
R491
47k
R492
47k
10R
R396
U110
HDMIA_C+
24LC02
CEC
1
2 A1
VCC 8
HDMIA_5V
R391
10R
HDMIB_0HDMIB_C+
1 A0
10R
R390
HDMIB_1HDMIB_0+
USB20_REXT 191
RXACKN
1
R1263
1k
R389
10R
HDMIA_C-
4k7
R257
10R
R394
C153
100n
10V
TP106
R388
10R
10R
R387
TP134
HDMIB_2HDMIB_1+
R386
10R
TP132
TP133
R385
10R
HDMI1
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Q179
BC848B
R1264
1k
R1281
4k7
AVDD_33
2
ICLK 231
R412
390R
USB_CID 220
Pin196
Pin216
Pin236
3V3_HDMI
VDDP
C
C155
100n
10V
C156
100n
10V
C157
100n
10V
282 VDDC5
DI[3] 235
283 RXBCKN
VDDP5 236
284 RXBCKP
DI[4] 237
285 AVDD_33_5
DI[5] 238
HDMIB_0-
286 RXB0N
DI[6] 239
HDMIB_0+
287 RXB0P
DI[7] 240
288 GND
DI[8] 241
HDMIB_1-
289 RXB1N
DI[9] 242
HDMIB_1+
290 RXB1P
100n
10V
HDMIB_CPin6
Pin13
C158
100n
10V
Pin285
C159
100n
10V
AVDD_33
C160
100n
10V
F124
3V3_VCC
AVDD_USB
330R
2
HDMIB_2-
292 RXB2N
HDMIB_2+
293 RXB2P
294 HPLUGB
HDMIA_2-
HDMIB_HPD
3
Q123
BC848B
R630
1k
HDMIB_SDA
295 DDCDB_SDA
HDMIB_SCL
296 DDCDB_SCL
BAV70
D193
HDMIA_1+
HDMIA_1-
5V_VCC
HDMIA_5V
TP411
CEC
R11
10R
2 A1
2
HDMIA_C-
HDMIA_SCL
HDMIA_SDA
HDMIA_HPD
4k7
R1282
1
WP 7
HDMI_WP2
24LC02
HDMIA_C+
VCC 8
U193
1 A0
3 A2
SCL 6
HDMIA_SCL
4 VSS
SDA 5
HDMIA_SDA
TP410
TP409
HDMIA_0-
C1069
100n
10V
3V3_HDMI
HDMIA_0+
R9
10R
R8
10R
R17
10R
R16
10R
R12
10R
R14
10R
TP412
R13
10R
R18
10R
HDMIA_2+
HDMIA_5V
47k
R494
2
1
R493
47k
R632
1k
HDMI2
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
VDDP
R258
4k7
CN122
R10
10R
R15
10R
291 GND18
R629
1k
HDMI Receiver In_A
C173
100n
10V
VDDC
HDMIB_C+
HDMIB_5V
AVDD_33
SHEET:4 OF:18
SCH NAME :HDMI&USB

DRAWN BY :SADIK
A3
SEHIT
14-10-2009_09:10
AX M
10
5V_STBY
R277
4k7
3V3_STBY
LED1
U138
MST6WB7GQ-3
R276
4k7
3V3_STBY
3V3_STBY
LED&VFD
3V3_STBY
600R
F230
1
VFD_CLK_STBY
VFD_DATA_STBY
S118
220R
R43
R526
10k
D148
C608
IR_IN
600R
R274
4k7
DVB_RESET
C5V6
Q131
BC848B
STBY_ON/OFF_NOT
2
R608
22k
GAIN_SW1
3V3_VCC
R288
3V3_VCC
4k7
DVB/YPBPR_SW
R268
3V3_VCC
4k7
DVB_IRQ
Q125
BC848B
Q148
Q149
GPIOL[4]
PWM0 208
60
XOUT
PWM1 209
220R
R381
VDDP
OVER_CUR_DETECT
For Internal CPU Selection
BACKLIGHT_DIM
For Internal CPU Selection
4k7
3V3_STBY
R524
3V3_STBY
R279
10k
4k7
3V3_STBY
R287
SDA
4k7
3V3_STBY
R286
SCL
4k7
3V3_STBY
R289
TX/SDA
61
XIN
DDCR_SDA 210
98
GPIOD[0]
DDCR_SCL 211
GPIOD[1]
DDCA_SDA 212
100 GPIOD[2]
DDCA_SCL 213
101 GPIOD[3]
INT 214
102 GPIOD[4]
IRIN 215
103 GPIOD[5]
GPIOB[0] 221
104 GPIOD[6]
GPIOB[1] 222
105 GPIOD[7]
PWM2 223
106 GPIOD[8]
PWM3 224
107 GPIOD[9]
GND14 225
108 VDDP1
VDDP4 226
RX/SCL
R1280
4k7
PIN272
MECH_SWITCH
C178
100n
10V
PIN226
3V3_VCC
R269
4k7
R270
4k7
3V3_STBY
PIN110
AMP_MUTE
4k7
R1279
IPOD_GPIO1
3V3_STBY
VDDP
109 GND6
GPIOT[0] 227
110 VDDC1
GPIOT[1] 228
111 GPIOD[10]
GPIOT[2] 229
112 GPIOD[11]
GPIOT[3] 230
OPTION2
VDDC
1
PROTECT
R161
47R
R162
47R
HWRESET 243
5V_TOLERANT 114 GPIOD[13]
VDDP7 272
115 GPIOD[14]
GND17 273
HDMI_WP2
116 GPIOD[15]
GPIOE[3] 274
HDMI_WP1
117 GPIOD[16]
GPIOE[2] 275
118 GPIOD[17]
GPIOE[1] 276
3V3_STBY
C174
100n
10V
VFD_CLK_STBY
DVB_RXD
DVD_IR_ON/OFF
KEYBOARD_STBY
600R
F280
C1037
1
CN114
3V3_VCC
10V
100n
C182
VDDP
R1248
47R
HP_DETECT
5V_TOLERANT
VFD_DATA_STBY
R840
4k7
R858
4k7
TK_SUPPLY
1
4u7
TP383
HDMIB_5V
R283
4k7
R264
4k7
3V3_STBY
PROTECT_PANEL
100n
3V3_VCC
5V_TOLERANT
2
R857
1k
149 GPIOR[0]
GPIOE[0] 277
150 GPIOR[1]
GPIOM[0] 278
151 GPIOR[2]
GPIOM[1] 279
152 GPIOR[3]
GPIOM[2] 280
153 GPIOR[4]
GPIOM[3] 281
R261
4k7
R262
4k7
3V3_STBY
3V3_STBY
1
2 MAX810
GND RST MAX809LTR
VCC
U130
C1129
3
22u
25V
SDA_NVM
SCL_NVM
R964
47R
USB_ENA_A
3V3_STBY
R1036
4k7
C183
1
5V_VCC
Reset IC supplyi 3V3 stbyden
ANT_CTRL
10V
100n
R1265
1k
VFD_CLK_STBY
VFD_DATA_STBY
R395
1k
HDMIA_5V
R1268
4k7
DVB_TXD
R356
100R
2
3V3_STBY
C1036
1
1
N.C.
R292
4k7
F188
R167
47R
3V3_VCC
3V3_VCC
220p
50V
TP159
113 GPIOD[12]
4k7
R271
R291
4k7
S299
4k7
R278
600R
DVD_IR
R1283
22k
C176
100n
10V
D152
C5V6
F231
R1330
47k
SW_UPDATE_SELECT D174
3V3_STBY
R724
100k
C177
100n
10V
D150
1
C5V6
C5V6
3V3_STBY
MECH_ONBOARD
C598
4k7
R294
NVM_WP
3V3_STBY
IR_IN
KEYBOARD_ONBOARD
IR_IN
4k7
R290
C175
100n
10V
IDTV_SW
R1269
4k7
VDDC
PIN108
1N4148
KEYBOARD & TOUCHPAD
BC848B
Q178
R742
20k
VDDP
S125
59
DVD_SENSE
D155
SAR3 207
220R
R382
LED1
BC858B
LED2
R757
4k7
S117
GPIOL[3]
1
2
R422
10k
2
1
58
STBY_ON/OFF
BC858B
5V_STBY
GPIOL[2]
SAR2 206
3V3_STBY
SC1_PIN8
57
99
3
1
KEYBOARD_STBY
PROG_EN
1
3V3_STBY
SAR1 205
3V3_VCC
10k
R531
10k
R528
Q130
BC848B
4k7
R293
GPIOL[1]
3V3_STBY
B
1
R267
4k7
27p
50V
27p
50V
3
2
2
5V_STBY
R421
10k
3V3_STBY
F225
1
STBY_ON/OFF_NOT
S193
R748
3V3_STBY
47R
3V3_STBY
SIF_CTL
4k7
R265
CN119
600R
S119
C446
27p
50V
VFD_CSB
F229
C5V6
56
SAR0 204
X104
600R
R527
10k
D149
2
F228
C5V6
GPIOL[0]
C447
1
R552
10k
14.31818MHZ
R110
1M
D130
2
55
1
LED2
7
N.C.
2
CN106
VFD_CSB
5V_TOLERANT 154 GPIOR[5]
DVD_IPOD_SW
155 GPIOR[6]
CN130
DVD_IR_ON/OFF
3V3_VCC
IPOD_GPIO3
CN142
1
3
2
4
TK_SUPPLY
PUSH V+ AND VVOL+
TV/AV
VOL-
R1292
5k1
R1305
3k9
R233
4k7
S123
R352
100R
R353
100R
5V_STBY
TP110
TP109
TP108
TP112
S194
R232
4k7
HC4052 DISABLE
HC4052 ENABLE
SW_UPDATE_SELECT
0
DVB_SW_UPDATE
1
ANALOG_SW_UPDATE
Q126
BC848B
C529
1
220p
50V
MEGA_DCR
R234
4k7
C531
1
R354
100R
R355
100R
Q127
BC848B
TP350
TP353
TP307
DIMMING
2
PROG_EN
SW_UPDATE_SELECT
RESET_7101
SW_UPDATE_SELECT
BACKLIGHT_DIM
4k7
R284
17mb37-1
DRAWN BY :SADIK SEHIT
A3
SHEET:5 OF:18
SCH NAME :CONTROLLER
220p
50V
Q147
BC858B
C530
1
5V_STBY
TP111
220p
50V
PROG_EN
0
1
NVM_WP
SCL_NVM
SDA_NVM
TX/SDA
TX/SDA_SC
UART_TXD
8
7
6
5
100n
10V
16
15
14
13
12
11
10
9
VCC
WC
SCL
SDA
10u
10V
RX/SCL
VCC
1Y2
1Y1
1Z
1Y0
1Y3
S0
S1
2
2
2Y0
2Y2
2Z
2Y3
2Y1
E
VEE
GND
E0
E1
E2
VSS
5V_VCC
R745
1k
S195
S196
RX/SCL_SC
1
2
3
4
5
6
7
8
1
2
R281
4k7
4k7
R280
1
R282
4k7
BC848B
Q128
UART_RXD
S121
1
2
3
4
3V3_VCC
3V3_STBY
PDP_IRQ
1
C180
U127
M74HC4052
S18
R1345
4k7
C1163
100n
10V
R1333
2k7
1
2
1
R1289
1k2
R1331
470R
R1332
270R
1
DEBUG SOCKET
100n
10V
U103
24C32
SW2
SW3
4
2
SW6
4
2
SW1
SW4
SW5
2
1
2
C181
159 GPIOR[10]
STBY
3
P-
158 GPIOR[9]
USB_OCD
P+
PROG_EN
R164
47R
R163
47R
5V_STBY
TX/SDA
KEYBOARD_ONBOARD
2
RX/SCL
4k7
R1277
AT THE SAME TIME FOR MENU
CN145
157 GPIOR[8]
5V_STBY
S120
AMP_SHDN
156 GPIOR[7]
C383
N.C.
1
KEYBOARD_ONBOARD
IPOD_GPIO2
3V3_STBY
R31
47R
3V3_STBY
MECH_ONBOARD
R1266
4k7
R1278
4k7
14-10-2009_16:25
AX M
121 AD[2]
AVDD_MI_3 162
122 AD[3]
MDATA[0] 163
MDATA[0]
C201
100n
10V
C202
100n
10V
C200
100n
10V
C199
100n
10V
C198
100n
10V
C197
100n
10V
C196
100n
10V
123 WRZ
MDATA[1] 164
MDATA[1]
124 RDZ
GND9 165
125 ALE
MDATA[2] 166
MDATA[2]
BADR1
126 BADR[1]
MDATA[3] 167
MDATA[3]
BADR0
127 BADR[0]
AVDD_MI_4 168
DVD_SPDIF
3V3_VCC
8
7
6
5
R296
4k7
S220
BKL_ON/OFF
PIN131
PIN147
PIN162
PIN168
PIN173
PIN179
PIN184
PANEL_VCC_ON/OFF
SCK
SDI
VDDC
1
3V3_VCC
TP160
SERIAL FLASH
C194
100n
10V
PIN129
C195
100n
10V
R295
4k7
S216
PIN203
R795
10k
BACKLIGHT_ON/OFF
R357
100R
BKL_ON/OFF
128 RASZ
MDATA[4] 169
MDATA[4]
3V3_VCC
VDDC
129 VDDC2
MDATA[5] 170
MDATA[5]
130 GND7
MDATA[6] 171
MDATA[6]
131 AVDD_MI_1
MDATA[7] 172
MDATA[7]
C1145
BKL_ON/OFF
VDDM
132 CASZ
CASZ
2
VDD_DMQ
MDATA[0]
MDATA[1]
MDATA[2]
MDATA[3]
R4 5
R3 6
R2 7
R1 8
100R
R1310
3
4
4
3
2
1
5
6
7
VDD_DMQ
MDATA[4]
MDATA[5]
MDATA[6]
MDATA[7]
4 R4 5
3 R3 6
2 R2 7
1 R1 8
100R
R1312
VDD1
DQ0
VDDQ1
DQ1
DQ2
VSSQ1
DQ3
DQ4
VDDQ2
10
11
12
DQ5
DQ6
MDATA[8]
134 WADR[11]
MDATA[9] 175
MDATA[9]
MADR[10]
135 WADR[10]
GND10 176
MADR[9]
136 WADR[9]
MDATA[10] 177
MDATA[10]
54
MADR[8]
137 WADR[8]
MDATA[11] 178
MDATA[11]
DQ15
53
MADR[7]
138 WADR[7]
AVDD_MI_6 179
VDDM
VSSQ4
52
MADR[6]
139 WADR[6]
MDATA[12] 180
MDATA[12]
MADR[5]
140 WADR[5]
MDATA[13] 181
MDATA[13]
MADR[4]
141 WADR[4]
MDATA[14] 182
MDATA[14]
MADR[3]
142 WADR[3]
MDATA[15] 183
MDATA[15]
MADR[2]
143 WADR[2]
AVDD_MI_7 184
VDDM
VSSQ2
VSS3
DQ14
51
DQ13
50
VDDQ4
49
4 R4 5
3 R3 6
2 R2 7
1 R1 8
100R
R1309
VDD_DMQ
MDATA[15]
MDATA[14]
MDATA[13]
MDATA[12]
DQ12
48
DQ11
47
MADR[1]
144 WADR[1]
DQS1 185
VSSQ3
46
MADR[0]
145 WADR[0]
DQM1 186
DQ10
45
DQ9
44
4 R4 5
3 R3 6
2 R2 7
1 R1 8
100R
R1311
146 GND8
MDATA[11]
MDATA[10]
MDATA[9]
MDATA[8]
147 AVDD_MI_2
VDDM
F157
3V3_VCC
DQ8
SPI_SCK 198
330R
VDD2
VSS2
41
WEZ
CASZ
RASZ
BADR[0]
BADR[1]
E
MADR[0]
MADR[1]
MADR[2]
MADR[3]
R1324
100R
R1338
22R
R1337
22R
R1336
22R
15
DQML
NC2
40
16
WE#
DQMH
39
R1335
22R
R1334
22R
17
18
CAS#
RAS#
CLK
38
CKE
37
19
CS#
NC1
36
20
BA0
A11
35
21
BA1
A9
34
22
A10
A8
33
23
A0
A7
32
R1315
100R
R1 8
R2 7
R3 6
R4 5
1
2
3
4
24
A1
A6
31
25
A2
A5
30
26
A3
A4
29
27
VDD3
VSS1
28
R1323
100R
UDM
Place MCLKE Clock resistor close to MSTAR Pin
MCLK
1
R1322
100R
MVREF 190
MCLK
MCLKE
R1316
100R
1
R1
SCK
SPI_SDI 199
7 R2 2
SDI
SPI_SCZ 200
6 R3 3
SCZ
SPI_SDO 201
5 R4 4
SDO
GND13 202
MCLKE
VDDC3 203
R1314
100R
R1 8
R2 7
R3 6
R4 5
1
2
3
4
R1313
100R
1 R1 8
2 R2 7
3 R3 6
4 R4 5
PIN1
F287
1
VDDM
C193
100n
10V
WARNING!!!DON'T USE VIA FOR MCLK AND
VDDC
C1112
1n
50V
PIN27
VDD_DMC
60R
C1077
220u
6V3
C1066
100n
10V
PIN3
C1067
100n
10V
PIN9
C1068
100n
10V
PIN43
PIN49
VDD_DMQ
60R
1
2
PIN14
F286
VDDM
C1045
100n
10V
C1076
220u
6V3
C1065
100n
10V
C1063
100n
10V
C1062
100n
10V
C1064
100n
10V
DATA SIGNALS

DRAWN BY :NDER GEN
A3
SHEET:6 OF:18
SCH NAME :MEMORY INTERFACE
C501
1n
50V
E
MADR[7]
MADR[6]
MADR[5]
MADR[4]
D
2
MADR[11]
MADR[10]
MADR[9]
MADR[8]
VDD_DMC
R499
100R
MCLKE 189
42
VDD_DMQ
VDDM
UDM
MCLK 188
43
14
VDD_DMC
LDM
DQ7
148 AVDD_MIPLL
C213
100n
10V
MCLKZ 187
VDDQ3
13
VDDM
MADR[11]
U195
MT48LC4M16A2TG8E
VDD_DMC
AVDD_MI_5 173
MDATA[8] 174
8MB SDRAM
1
133 WEZ
WEZ
MEMORY
VDDM
RASZ
R794
10k
Q157
BC848B
VDDM
C469
10u
10V
R535
10k
VDDM
330R
3V3_STBY
R761
4k7
VCC
HOLD#
SCLK
SI
R365
100R
3V3_STBY
3V3_VCC
2
330R
C605
10u
10V
1u
6V3
SDO
CS#
SO
WP#
GND
C184
100n
10V
R536
10k
C5V1
F150
TP115
TP114
TP113
1
1
2
3
4
LDM
DQS0 161
SPDIF_OUT
D169
U132
MX25L512
DQM0 160
5
120 AD[1]
F125
SCZ
119 AD[0]
DVB_SPDIF
TP116
TP119
TP118
TP117
U138
MST6WB7GQ-3
14-10-2009_09:10
AX M
220n
10V
C538
2n2
50V
D124
10k
R1241
1
D127
1N4148
HP_DETECT
S296
2
1
C625
2n2
50V
1
2
C453
Q150
BC858B
BC848B
Q133
R541
10k
BC848B
C668 Q132
100n
50V
R542
10k
R722
10k
3k9
R236
AMP_MUTE
HP_L
S126
R729
100k
4k7
R424
C633
8V_VCC
100u
16V
3V3_VCC
AMP_EN
600R
220p
50V
R801
22R
R212
100k
INBP 5
F191
4 VSS
5V_VCC
INBN 6
50V
1n
C502
S127
1u
16V
R211
100k
2
1
220p
50V
C122
TDA1308T
JK110
D125
C540
OUTB 7
3 INAP
C665
D126
C386
10u
10V
U128
2 INAN
220n
10V
VDD 8
R238
20k
R423
4k7
HP_R
C537
2n2
50V
1 OUTA
C632
R237
20k
100u
16V
8V_VCC
1n
50V
MUTE_HP_L
2
2
C123
S128
16V
100u
3
2
1
1N4148
C541
6
5
4
1N4148
C503
9
8
7
R123
15k
R1223
15k
C624
2n2
50V
5k1
R1291
3k3
R1290
1N4148
MUTE_HP_R
R800
22R
12V_VCC
VDD_AUDIO
POP NOISE CIRCUIT

5V_VDD_AUDIO
HEADPHONE AMPLIFIER
R546
10k
HP_DETECT
MUTE_HP_R
3
OUTP
SDB
R544
10k
C385
1
1
5V_VCC
10u
10V
C3
C2
INN
GNDB
C1
VDD1
B3
VDDA
B2
OUTN
BC848B
Q134
PT2333
B1
A3
GNDA
SDB
INP
A2
A1
60R
F4
C3
C2
C1
OUTP
U191
INN
GNDB
VDD1
VDDA
B2
OUTN
PT2333
B1
A3
A2
A1
INP
GNDA
U192
B3
2.5 WATT OPTION
MUTE_HP_L
C1133
1u
16V
POP_MUTE
D1
S22
VDD_AUDIO
SK24
S20
12V_VCC
C12
330u
35V
1N4148
C1043
10u
10V
R545
10k
D2
C1042
10u
10V
24V_VCC
5V_VDD_AUDIO
R44
47k
60R
F6
R_OUT_N
C1116
1n
50V
C3
2u2
10V
150k
R40
60R
15K
5V_VDD_AUDIO
2
2u2
10V
C6
47u
F5
BC848B
Q135
150k
R42
R_AUDIO_N
R_AUDIO_P
47u
R_OUT_P
C5
10V
2u2
C1057
100n
10V
150k
R1317
AMP_EN
L1
150k
R41
C1132
1u
16V
L_OUT_N
150k
R39 50V
C1117
1n
C4
2u2
10V
F7
60R
C1115
50V
1n
L_OUT_P
47u
R1319
150k
C1056
100n
10V
2
L_AUDIO_N
AMP_EN
L2
47u
15K
L4
MAIN_R_AUDIO
L_AUDIO_P
C1114
50V
1n
L3
MAIN_L_AUDIO
S23
18V_VCC
5V_VDD_AUDIO
5V_VCC
F3
1
S17
VDD_AUDIO
C13
S279
CN115
L_OUT_P
C19
100n
C10
1u
16V
5V_VDD_AUDIO
C11
1u
16V
OUTL-2
OUTL-1
BOOT
MUTE
10
SHDN
11
REGEN
PVDD2
30
12
COM
PGND2
29
13
AGND1
PGND1
28
14
AGND2
PVDD1
27
15
REG
OUTR+2
26
MAX9736B
U1
10V
OUTL+2
32
OUTL+1
31
R_AUDIO_N
C18
100n
10V
L_AUDIO_P
VDD_AUDIO
L_AUDIO_N
C16
100n
50V
S14
100n 50V
1
2
C15
AMP_EN
10k
R25
10k
MONO
R27
5V_VCC
FBL
5V_VDD_AUDIO
15K
R24
10k
INL
MAIN_L_AUDIO
NC1
R_AUDIO_P
NC2
16V
1u
C1131
R1320
150k
L_OUT_N
AMP_SHDN
OPTIONAL
CN3
OUTR-2
R_OUT_P
OUTR+1
R_AUDIO_P
R_AUDIO_N
L_AUDIO_P
L_AUDIO_N
25
24
OUTR-1
23
22
C1P
C1N
21
20
MOD
FBR
VS
19
16
18
C9
1u
16V
17
5V_VDD_AUDIO
INR
1
S15
NC3
R20
100R
S16
BC848B
Q2
S12
5V_Audio
5V_VDD_AUDIO
10V
220u
C1134
1u
25V
R28
10k
60R
MAIN_L_AUDIO
MAIN_L
AUDIO INPUTS
R30
20k
S298
BC848B
Q1
R1318
150k
15K
R_OUT_N
100n
50V
MAIN_R_AUDIO
MAIN_R_AUDIO
S13
16V
1u
C1130
S11
R19
100R
R29
20k
C14
R26
10k
MAIN_R
5V_VDD_AUDIO
SHEET:7 OF:18
SCH NAME :AUDIO

A3
15-10-2009_16:06
AX M
R1209
1k
DIGITAL_IF1V0_FE
C1157
220u
6V3
C356
C849
100n
DIGITAL_IF+
C225
100n
10V
2
IF_M
IF_P
R331
10k
1V_QAM
3V3_QAM
33
GPIO2
GPIO3/SCLT
34
35
GPIO1/AGC1
36
GPIO0/AGC2
37
VDD3
38
GND3
39
VDD_IO_3V3_3
40
GNDAS_AD
41
INM
INP
42
43
VCCAISO_D
44
INCM
45
REFM
47
46
REFP
C_D6
TS_DATA[5]
29
3 R3 6
C_D5
TS_DATA[4]
28
4 R4 5
C_D4
VDD_IO_3V3_2
27
GND2
26
VDD2
25
TS_DATA[3]
24
TS_DATA[2]
23
2 R2 7
C_D2
3 R3 6
C_D1
4 R4 5
R1342
1
8
R1
3V3_QAM
3 R3 6
C_STRT
M_CKOUT
17
4 R4 5
SDA
C_D0
C_ERR
16
15
14
13
GND1
12
11
CLK_TST
10
64
SCL
18
VDD_IO_3V3_4
GPIO5/CS1
C_VAL
M_SYNC
GND4
63
GPIO6/CS0
2 R2 7
VDD_IO_3V3_1
M_VALID
19
62
VDD1
20
N_RESET
M_ERR
GPIO7/AUX_CLK
VDD4
C_CLK
C188
15p
50V
100R
R312
R311
100R
S234
S235
IDTV_SW
4k7
R469
1
FE1_SDA
FE1_SCL
R463
4k7
3V3_QAM
3V3_QAM
3V3_QAM
R803
4k7
RESET_DVB
33p
50V
3V3_QAM
C1041
100n
10V
IDTV_SW
C_RESET
R1018
4k7
R1098
33R
R239
4k7
R171
33R
SCL_TUN_DVB
Q171
BC847B
100n
16V
C906
C907
IF_AGC_T
R1167
180R
1V_QAM
R909
10k
IF_AGC_T
Q170
BC847B
3V3D_FE
C700
100n
10V
IF_AGC_C
F255
C699
100n
10V
1V0_FE
3 B0
A 4
F128
6V3
100u
IP_1
330R C1161
22u
6V3
F256
3V3_QAM
2
C223
100n
10V
C207
100n
10V
1V0_FE
C206
100n
10V
1V0D_FE1
220R
2
D165
C750
100n
10V
C749
100n
10V
C748
100n
10V
IF_AGC_DVB
2V5A_FE
TP161
BA159
F
1
C1159
6V3
220u
3V3_VCC
330R C1160
22u
6V3
F127
1
IF_AGC_DVB
S239
1V_QAM
2V5_QAM
330R
C721
100n
10V
S240
F237
IF_AGC_C
IF_AGC_T
BA159
D164
C283
10u
10V
C221
100n
10V
C725
100n
10V
C217
100n
10V
C216
100n
10V
C215
100n
10V
C214
100n
10V
C220
100n
10V
VESTEL PROJECT NAME :17mb37

DRAWN BY :ERTUG BAL
A3
SHEET:8 OF:18
SCH NAME :DVB COFDM & QAM
place this cap close to pin#56
5V_VCC
R1037
4k7
3V3_VCC
C1151
1
2
S256
VCC 5
FSA3157
10n
16V
C758
100n
16V
S 6
2 GND
IF_AGC_T
C927
1 B1
U182
1V0A_FE1
220R
100n
10V
100n
10V
C723
100n
10V
C1033
R1038
4k7
330R C1162
22u
6V3
INCM_1
10n
16V
F238
1
3V3_VCC
C743
R1063
1k
R1062
1k
C756
1
2V5A_FE
IM_1
C912
C757
DIGITAL_IF+
C
C_D3
AGC_S1
16V
10n
DIGITAL_IF-
1V_QAM
R426
8
R1
61
3V3_QAM
100n
16V
2 R2 7
1u
6V3
10u
16V
30
21
IF_AGC_C
C1027
REFM_1
C_D7
TS_DATA[6]
TS_DATA[0]
1V_QAM
1V_QAM
27MHz
33p
50V
10u
10V
C695
100n
16V
C1022
C1031
R427
33R
8
R1
TS_DATA[1]
X108
1V0A_FE1
C1028
100n
16V
REFP_1
VDD10REG
R314
100R
R313
100R
3V3D_FE
C1023
1u
6V3
31
VBASE
R908
10k
100n
16V
2V5A_FE
100p
50V
C1032
TS_DATA[7]
2V5A_FE
2V5A_FE
IP_1
INCM_1
IM_1
REFM_1
REFP_1
1n
50V
C946
100n
16V
R1153
30k
C911
C799
32
60
100n
16V
4p7
50V
22
C936
GNDA_AD12
48
2
VCCA_AD12
10u
16V
C930
100n
C830
1
RF_AGC_DVB
C908
100n
16V
C910
R117
150R
C227
100n
10V
R1168
180R
C909
VDDA_2V5_4
3V3D_FE
R910
10k
16
XTAL_I
15
14
XTAL_O
VDDA_2V5_3
13
VDDA_1V
12
IP
11
10
IM
INCM
9
REFM
8
REFP
VDDA_2V5_2
6
VDDA_ISO
QM
QP
VDDA_2V5_1
TEST
RF_LEVEL
100n
16V
64
1V0D_FE1
R911
10k
GNDA_OSC
3V3_QAM
59
TMS
AGC_IF
17
SCL_TUN_DVB
1
58
18
4k7
R298
TCK
AGC_RF
TRST
VDD_3V3_7
63
19
C228
100n
10V
33p
50V
3V3D_FE
SCLT
VDD_1V_1
BC817-25
Q103
SDA_TUN_DVB
TDO
VDD_1V_8
57
GPIO4/SDAT
U109
STV0297E
62
VCCA_OSC
GPIO9
1V0D_FE1
20
56
2V5_QAM
C305
2V5_QAM
SDA_TUN_DVB
61
ZO
27MHZ
TDI
21
VCCD_PLL
55
SDAT
R332
10k
DVB-C
DEMODULATOR
GPIO2
R1043
4k7
54
GPIO8
VDD_3V3_1
C304
GPIO3
22
GNDA_PLL
GNDD_PLL
33p
50V
3V3D_FE
R1042
4k7
R1083
100R
R1084
100R
51
VCCA_PLL
1V0D_FE1
VCCD_AD12
53
2V5_QAM
23
50
1k
X101
AUX_CLK
GNDD_AD12
52
F264
2V5_QAM
49
GPIO9
60
24
1V_QAM
100n
59
CS0
VDD_1V_2
FE1_SDA
3V3D_FE
C905
GPIO4
U152
STV0362
25
FE1_SCL
26
1V0D_FE1
R1077
100R
R1078
100R
R407
1k
CS1
58
IF_AGC_C
4p7
50V
2V5_QAM
33p
50V
GPIO0
27
C935
100n
33p
50V
28
BA159
C937
VDD_3V3_2
DVB-T
DEMODULATOR
RESET_DVB
C941
GPIO7
C224 100n
3V3_VCC
100n
16V
53
10V
2V5_QAM
C657
10u
16V
100n
100n
16V
29
GPIO5
IF_P
RESET_T
C1019
D0
SDA
VDD_3V3_6
IF_CM
33
34
VDD_3V3_3
D1
35
36
D2
D3
GPIO8
C929
3V3D_FE
1V0D_FE1
37
38
VDD_1V_4
39
D4
40
VDD_3V3_4
D5
41
42
D6
43
44
52
57
100n
16V
45
30
3V3D_FE
C1026
46
SCL
56
A
IF_CM
S266
C1025
100n
16V
C1024
VDD_1V_6
VDD_1V_7
10n
16V
BCP56-16
Q175
S267
31
GPIO6
R1061
1k
R1060
1k
C658
R1141
47k
VDD_1V_3
55
IF_M
C384
Q176
BC846B
NOT_RESET
1V0D_FE1
4 R4 5
3 R3 6
2 R2 7
R1117
33R
8
R1
1
4 R4 5
3 R3 6
2 R2 7
3V3D_FE
16V
10n
100n
16V
C945
3V3_VCC
C904
R928
10k
R 4
10u
16V
3V3_VCC
32
54
C1021
D7
51
CLK_OUT
1V0D_FE1
VDD_1V_5
VDD_3V3_5
STR_OUT
50
D/NOT_P
3V3D_FE
47
48
ERROR
100n
16V
C1020
GPIO1
A 5
D166
49
C928
TS_DATA0_1
TS_DATA1_1
TS_DATA2_1
TS_DATA3_1
TS_DATA4_1
TS_DATA5_1
TS_DATA6_1
R1116 3p9
33R
8
R1
TS_DATA7_1
1
2
3 C
R1059
220R
1n
50V
4 R4 5
3 R3 6
2 R2 7
R1341
33R
8
R1
C916
1V0D_FE1
U174
TS431AIL
TSBYTECLK_1
TSPKTCLK_1
TSVALID_1
TSPKTERR_1
14-10-2009_09:10
AX M
LMI SYSTEM DDR
VDD_S_LMI_2V6
VDD1
VSS3
66
S_LMIDATA[0]
DQ0
DQ15
65
VDD_S_LMI_2V6
VDDQ1
VSSQ5
64
S_LMIDATA[1]
DQ1
DQ14
63
S_LMIDATA[2]
DQ2
DQ13
62
VSSQ1
VDDQ5
61
S_LMIDATA[3]
DQ3
DQ12
60
S_LMIDATA[4]
DQ4
VDD_S_LMI_2V6
VDDQ2
S_LMIDATA[5]
10
S_LMIDATA[6]
11
DQ6
12
VSSQ2
S_LMIDATA[7]
B
VDD_S_LMI_2V6
DQ10
57
DQ9
56
VDDQ4
55
DQ7
DQ8
54
14
NC1
NC7
53
15
VDDQ3
VSSQ3
52
U156
LDQS
UDQS
HY5DU561622D
51
NC2
NC6
50
18
VDD2
VREF
49
19
NC3
VSS2
48
S_LDQM[0]
20
LDM
UDM
47
S_LWE
21
WE#
CLK#
46
S_LCAS
22
CAS#
CLK
45
S_LRAS
23
RAS#
CKE
44
S_LCS
24
CS#
NC5
43
25
NC4
A12
42
S_LBANK[0]
26
BA0
A11
41
S_LBANK[1]
27
BA1
A9
40
S_LMI_AD[10]
28
A10/AP
A8
39
S_LMI_AD[0]
29
A0
A7
38
S_LMI_AD[1]
30
A1
A6
37
S_LMI_AD[2]
31
A2
A5
36
S_LMI_AD[3]
32
A3
A4
35
VDD_S_LMI_2V6
33
VSS1
34
VDD3
33R
R4 5
R3 6
R2 7
R1 8
R442
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R441
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R439
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R438
R315
100R
R193
33R
R186
33R
R188
33R
S_LMI_DATA0
S_LMI_DATA1
S_LMI_DATA2
S_LMI_DATA3
4
3
2
1
S_LMI_DATA4
S_LMI_DATA5
S_LMI_DATA6
S_LMI_DATA7
58
17
VDD_S_LMI_2V6
VSSQ4
13
16
S_LDQS[0]
DQ5
DQ11
59
S_LMI_DATA8
S_LMI_DATA9
S_LMI_DATA10
S_LMI_DATA11
S_LMI_DATA12
S_LMI_DATA13
S_LMI_DATA14
S_LMI_DATA15
S_NOTLCLK
VDD1
VSS3
66
S_LMIDATA[8]
DQ0
DQ15
65
VDD_S_LMI_2V6
VDDQ1
VSSQ5
64
S_LMIDATA[9]
DQ1
DQ14
63
S_LMIDATA[10]
DQ2
DQ13
62
VSSQ1
VDDQ5
61
S_LMIDATA[11]
DQ3
DQ12
60
S_LMIDATA[12]
DQ4
VDD_S_LMI_2V6
VDDQ2
S_LMIDATA[18]
S_LMIDATA[13]
10
S_LMIDATA[17]
S_LMIDATA[14]
11
DQ6
12
VSSQ2
S_LMIDATA[23]
S_LMIDATA[22]
S_LMIDATA[21]
VDD_S_LMI_2V6
S_LMIDATA[20]
S_LMIDATA[19]
VDD_S_LMI_2V6
VDD_S_LMI_2V6
S_LMI_NOTCLK
S_NOTLCLK
R1003
1k
R1001
1k
C250
100n
10V
C249
100n
10V
C248
100n
10V
DQ10
57
DQ9
56
VDDQ4
55
DQ7
DQ8
54
14
NC1
NC7
53
15
VDDQ3
VSSQ3
52
16
U154
LDQS
UDQS
HY5DU561622D
17
NC2
18
51
NC6
50
VDD2
VREF
49
19
NC3
VSS2
48
LDM
UDM
47
CLK#
46
CLK
45
20
S_NOTLCLK
S_LWE
21
WE#
S_LCAS
22
CAS#
S_LRAS
23
RAS#
CKE
44
S_LCS
24
CS#
NC5
43
25
NC4
A12
42
S_LCLK
S_LCKEN
S_LMI_AD[12]
S_LMI_AD[11]
S_LBANK[0]
26
BA0
A11
41
S_LMI_AD[9]
S_LBANK[1]
27
BA1
A9
40
S_LMI_AD[8]
S_LMI_AD[10]
28
A10/AP
A8
39
S_LMI_AD[7]
S_LMI_AD[0]
29
A0
A7
38
S_LMI_AD[6]
S_LMI_AD[1]
30
A1
A6
37
S_LMI_AD[5]
S_LMI_AD[2]
31
A2
A5
36
32
A3
A4
35
VSS1
34
S_LMI_AD[3]
S_LMI_AD[4]
VDD_S_LMI_2V6
33R
R4 5
R3 6
R2 7
R1 8
R452
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R451
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R443
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R445
4
3
2
1
S_LMIDATA[16]
S_LMIDATA[17]
S_LMIDATA[18]
S_LMIDATA[19]
33
VDD3
S_LMI_ADDR0
S_LMI_NOTCS0
S_LMI_NOTBANK1
S_LMIDATA[20]
S_LMIDATA[21]
S_LMIDATA[22]
S_LMIDATA[23]
S_LMI_ADDR10
S_LMI_ADDR3
S_LMI_ADDR2
S_LMI_ADDR1
S_LMIDATA[24]
S_LMIDATA[25]
S_LMIDATA[26]
S_LMIDATA[27]
S_LMI_ADDR4
S_LMI_ADDR9
S_LMI_ADDR12
S_LMI_ADDR11
S_LMIDATA[28]
S_LMIDATA[29]
S_LMIDATA[30]
S_LMIDATA[31]
S_LMI_ADDR7
S_LMI_ADDR8
S_LMI_ADDR5
S_LMI_ADDR6
DDR IC'LERE YAKIN OLMALI

& C289 DDR PIN33'LERE YAKIN OLMALI
STi7101'E YAKIN OLMALI
VE R? BIRBIRINE YAKIN OLMALI
S_LMI_NOTBANK0
S_LMI_NOTRAS
S_LMI_NOTCAS
S_LMI_RDNOTWR
S_LMI_DQS0
S_LMI_DQM0
S_LMI_DQM2
S_LMI_DQS2
S_LCKEN
C676
10u
10V
S_LMI_DQS1
S_LMI_DQM1
S_LMI_DQM3
S_LMI_DQS3
VDD_S_LMI_2V6
2
58
13
S_LMI_VREF
VSSQ4
S_LDQM[1]
S_LMI_DATA28
S_LMI_DATA29
S_LMI_DATA30
S_LMI_DATA31
S_LCLK
DQ5
DQ11
59
S_LDQM[2]
S_LMIDATA[12]
S_LMIDATA[13]
S_LMIDATA[14]
S_LMIDATA[15]
VDD_S_LMI_2V6
S_LMI_VREF
S_LMI_DATA24
S_LMI_DATA25
S_LMI_DATA26
S_LMI_DATA27
S_LDQS[1]
S_LDQS[2]
S_LMIDATA[8]
S_LMIDATA[9]
S_LMIDATA[10]
S_LMIDATA[11]
R315
C288
C???
C254
C277
S_LMIDATA[15]
S_LMIDATA[16]
S_LMI_DATA20
S_LMI_DATA21
S_LMI_DATA22
S_LMI_DATA23
S_LMI_CLK
S_LMI_CKEN
S_LMIDATA[4]
S_LMIDATA[5]
S_LMIDATA[6]
S_LMIDATA[7]
S_LCLK
LMI SYSTEM DDR

VDD_S_LMI_2V6
S_LMI_DATA16
S_LMI_DATA17
S_LMI_DATA18
S_LMI_DATA19
S_LMIDATA[0]
S_LMIDATA[1]
S_LMIDATA[2]
S_LMIDATA[3]
C289
10u
10V
33R
R4 5
R3 6
R2 7
R1 8
R450
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R444
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R446
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R437
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R183
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R434
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R435
4
3
2
1
LMI VIDEO DDR

VDD_V_LMI_2V6
VDD1
VSS3
66
V_LMIDATA[23]
DQ0
DQ15
65
VDD_V_LMI_2V6
VDDQ1
VSSQ5
64
V_LMIDATA[22]
DQ1
DQ14
63
V_LMIDATA[21]
DQ2
DQ13
62
VSSQ1
VDDQ5
61
V_LMIDATA[20]
DQ3
DQ12
60
V_LMIDATA[19]
DQ4
VDD_V_LMI_2V6
VDDQ2
S_LMIDATA[26]
V_LMIDATA[18]
10
DQ5
S_LMIDATA[25]
V_LMIDATA[17]
11
DQ6
12
VSSQ2
S_LMIDATA[31]
S_LMIDATA[30]
S_LMIDATA[29]
VDD_S_LMI_2V6
S_LMIDATA[28]
S_LMIDATA[27]
VDD_S_LMI_2V6
V_LMIDATA[16]
S_LMIDATA[24]
VDD_V_LMI_2V6
V_LDQS[2]
S_LDQS[3]
VDD_V_LMI_2V6
S_LMI_VREF
DQ11
59
VSSQ4
58
DQ10
57
DQ9
56
VDDQ4
55
13
DQ7
DQ8
54
14
NC1
NC7
53
15
VDDQ3
VSSQ3
52
16
U153
LDQS
UDQS
HY5DU561622D
17
NC2
18
50
VDD2
VREF
49
19
NC3
VSS2
48
LDM
UDM
47
CLK#
46
CLK
45
S_LDQM[3]
V_LDQM[2]
20
S_NOTLCLK
V_LWE
21
WE#
V_LCAS
22
CAS#
V_LRAS
23
RAS#
CKE
44
V_LCS
24
CS#
NC5
43
25
NC4
A12
42
S_LCLK
S_LCKEN
S_LMI_AD[12]
S_LMI_AD[11]
V_LBANK[0]
26
BA0
A11
41
S_LMI_AD[9]
V_LBANK[1]
27
BA1
A9
40
S_LMI_AD[8]
V_LMI_AD[10]
28
A10/AP
A8
39
S_LMI_AD[7]
V_LMI_AD[0]
29
A0
A7
38
S_LMI_AD[6]
V_LMI_AD[1]
30
A1
A6
37
S_LMI_AD[5]
V_LMI_AD[2]
31
A2
A5
36
S_LMI_AD[4]
V_LMI_AD[3]
32
A3
A4
35
VDD_V_LMI_2V6
33
VSS1
34
VDD3
LMI VIDEO DDR

1
VDD1
VSS3
66
V_LMIDATA[31]
DQ0
DQ15
65
VDD_V_LMI_2V6
VDDQ1
VSSQ5
64
V_LMIDATA[30]
DQ1
DQ14
63
V_LMIDATA[29]
DQ2
DQ13
62
VSSQ1
VDDQ5
61
V_LMIDATA[28]
DQ3
DQ12
60
V_LMIDATA[27]
DQ4
VDD_V_LMI_2V6
VDDQ2
V_LMIDATA[5]
V_LMIDATA[26]
10
V_LMIDATA[6]
V_LMIDATA[25]
11
DQ6
12
VSSQ2
V_LMIDATA[0]
V_LMIDATA[1]
V_LMIDATA[2]
VDD_V_LMI_2V6
V_LMIDATA[3]
V_LMIDATA[4]
VDD_V_LMI_2V6
V_LMIDATA[24]
V_LMIDATA[7]
VDD_V_LMI_2V6
51
NC6
VDD_V_LMI_2V6
V_LDQS[3]
V_LDQS[0]
VDD_V_LMI_2V6
V_LMI_VREF
DQ5
DQ11
59
VSSQ4
58
DQ10
57
DQ9
56
VDDQ4
55
13
DQ7
DQ8
54
14
NC1
NC7
53
15
VDDQ3
VSSQ3
52
UDQS
51
16
U155
LDQS
HY5DU561622D
17
NC2
NC6
50
18
VDD2
VREF
49
19
NC3
VSS2
48
LDM
UDM
47
V_LDQM[0]
V_LDQM[3]
20
V_NOTLCLK
V_LWE
21
WE#
CLK#
46
V_LCAS
22
CAS#
CLK
45
V_LRAS
23
RAS#
CKE
44
V_LCS
24
CS#
NC5
43
25
NC4
A12
42
V_LCLK
V_LCKEN
V_LMI_AD[12]
V_LMI_AD[11]
V_LBANK[0]
26
BA0
A11
41
V_LMI_AD[9]
V_LBANK[1]
27
BA1
A9
40
V_LMI_AD[8]
V_LMI_AD[10]
28
A10/AP
A8
39
V_LMI_AD[7]
V_LMI_AD[0]
29
A0
A7
38
V_LMI_AD[6]
V_LMI_AD[1]
30
A1
A6
37
V_LMI_AD[5]
V_LMI_AD[2]
31
A2
A5
36
V_LMI_AD[4]
V_LMI_AD[3]
32
A3
A4
35
VDD_V_LMI_2V6
33
VSS1
34
VDD3
V_LMIDATA[8]
V_LMIDATA[10]
VDD_V_LMI_2V6
V_LMIDATA[11]
V_LMIDATA[12]
V_LMIDATA[13]
V_LMIDATA[14]
VDD_V_LMI_2V6
V_LMIDATA[15]
V_LDQS[1]
V_LMI_VREF
V_LDQM[1]
V_NOTLCLK
V_LCLK
V_LMI_AD[12]
V_LMI_AD[11]
V_LMI_AD[9]
V_LMI_AD[8]
V_LMI_AD[7]
V_LMI_AD[6]
V_LMI_AD[5]
V_LMI_AD[4]
V_LMI_CKEN
S_LBANK[1]
S_LMI_AD[10]
S_LMI_AD[3]
S_LMI_AD[2]
S_LMI_AD[1]
V_LMI_ADDR11
V_LMI_ADDR3
V_LMI_ADDR2
V_LMI_ADDR1
S_LMI_AD[4]
S_LMI_AD[9]
S_LMI_AD[12]
S_LMI_AD[11]
V_LMI_ADDR4
V_LMI_ADDR12
V_LMI_ADDR9
V_LMI_ADDR10
V_LMI_ADDR8
V_LMI_ADDR7
V_LMI_ADDR6
V_LMI_ADDR5
S_LMI_AD[7]
S_LMI_AD[8]
S_LMI_AD[5]
S_LMI_AD[6]
S_LBANK[0]
S_LRAS
S_LCAS
S_LWE
V_LMI_NOTBANK1
V_LMI_NOTBANK0
V_LMI_NOTRAS
V_LMI_NOTCAS
S_LDQS[0]
S_LDQM[0]
S_LDQM[2]
S_LDQS[2]
V_LMI_DQS2
V_LMI_DQM2
V_LMI_DQM0
V_LMI_DQS0
S_LDQS[1]
S_LDQM[1]
S_LDQM[3]
S_LDQS[3]
V_LMI_DQS3
V_LMI_DQM3
V_LMI_DQM1
V_LMI_DQS1
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1105
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1115
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1107
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1104
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1106
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1112
33R
4 R4 5
3 R3 6
2 R2 7
1 R1 8
R1114
V_LMI_AD[0]
V_LCS
V_NOTLCLK
V_LCKEN
V_LMI_CLK
V_LMI_AD[11]
V_LMI_AD[3]
V_LMI_AD[2]
V_LMI_AD[1]
V_LMI_AD[4]
V_LMI_AD[12]
V_LMI_AD[9]
V_LMI_AD[10]
V_LMI_AD[8]
V_LMI_AD[7]
V_LMI_AD[6]
V_LMI_AD[5]
V_LMI_NOTCLK
V_LMI_RDNOTWR
R318
C289
C???
C260
C278
R318
100R
R182
33R
R189
33R
R190
33R
V_LCLK
V_LCLK
V_LMI_DATA0
V_LMI_DATA1
V_LMI_DATA2
V_LMI_DATA3
1
2
3
4
R453
33R
R1 8
R2 7
R3 6
R4 5
V_LMI_DATA4
V_LMI_DATA5
V_LMI_DATA6
V_LMI_DATA7
1
2
3
4
R432
33R
R1 8
R2 7
R3 6
R4 5
V_LMI_DATA8
V_LMI_DATA9
V_LMI_DATA10
V_LMI_DATA11
1
2
3
4
V_LMI_DATA12
V_LMI_DATA13
V_LMI_DATA14
V_LMI_DATA15
1
2
3
4
V_NOTLCLK
V_LWE

DDR PIN33'E YAKIN OLMALI
STi7101'E YAKIN OLMALI
VE R? BIRBIRINE YAKIN OLMALI
V_LMIDATA[0]
V_LMIDATA[1]
V_LMIDATA[2]
V_LMIDATA[3]
V_LMI_DATA16
V_LMI_DATA17
V_LMI_DATA18
V_LMI_DATA19
1
2
3
4
R436
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[16]
V_LMIDATA[17]
V_LMIDATA[18]
V_LMIDATA[19]
V_LMIDATA[4]
V_LMIDATA[5]
V_LMIDATA[6]
V_LMIDATA[7]
V_LMI_DATA20
V_LMI_DATA21
V_LMI_DATA22
V_LMI_DATA23
1
2
3
4
R433
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[20]
V_LMIDATA[21]
V_LMIDATA[22]
V_LMIDATA[23]
R448
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[8]
V_LMIDATA[9]
V_LMIDATA[10]
V_LMIDATA[11]
V_LMI_DATA24
V_LMI_DATA25
V_LMI_DATA26
V_LMI_DATA27
1
2
3
4
R440
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[24]
V_LMIDATA[25]
V_LMIDATA[26]
V_LMIDATA[27]
R449
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[12]
V_LMIDATA[13]
V_LMIDATA[14]
V_LMIDATA[15]
V_LMI_DATA28
V_LMI_DATA29
V_LMI_DATA30
V_LMI_DATA31
1
2
3
4
R447
33R
R1 8
R2 7
R3 6
R4 5
V_LMIDATA[28]
V_LMIDATA[29]
V_LMIDATA[30]
V_LMIDATA[31]
V_LBANK[1]
V_LBANK[0]
V_LRAS
V_LCAS
V_LDQS[2]
V_LDQM[2]
V_LDQM[0]
V_LDQS[0]
C266
100n
10V
C675
10u
10V
VDD_V_LMI_2V6
V_LDQS[3]
V_LDQM[3]
V_LDQM[1]
V_LDQS[1]
V_LMI_VREF
C273
100n
10V
C247
100n
10V
C677
10u
10V
17mb37
A3
SHEET:9 OF:18
DRAWN BY :HUSEYIN E. CETIN
V_LCKEN
SCH NAME :DDR RAM FOR STi7101
V_LMIDATA[9]
33R
V_LMI_ADDR0
V_LMI_NOTCS0
S_LMI_AD[0]
S_LCS
R1002
1k
R1004
1k
14-10-2009_09:10
AX M
15
S19
3V3_STBY
PIN 13-14 OF CN4 ARE 3V3
5V_STBY
16
F279
1
12V_VCC
C470
47u
16V
18V_VCC
17
12V_VCC
18
19
20
21
22
23
24
25
26
1
2
R249
200k
1
D161
C876
100n
F244
8V_VCC
VOUT
L120
8 VCC
2V6_ST
S269
F8
2
2V5_ST
OUT 1
7 GND
C20
100n
6 FSW
INH 3
5 FB
C761
R1142
2k7
C920
10n
COMP 4
S289
C18V
D186
12V_INV
1
C1051
100n
10V
11
C5V6
60R
1
12V_STBY
12V_VCC
S306
S307
5V_VCC
1
2
PANEL_VCC
60R
F172
12V_IPOD
12V_VCC
60R
5V_STBY
12V_STBY
S300
C1089
220n
25V
C1072
10n
16V
1
2
3
4
C1105
22u
16V
C1104
22u
16V
BS
IN
SW
GND
SS
EN
COMP
FB
JK109
Q181
BC848B
7A/32VDC
2
FS4
1
100n
16V
NC
R1246
10k
3
3
PANEL_VCC_ON/OFF
TP378
R575
10k
C309
100n
10V
C17
22u
16V
Q139
BC848B
C2
22u
16V
PANEL SUPPLY SWITCH
R1293
15k
3V3_STBY
2
C1099
22u
16V
NC
12V_INV
A3
SHEET:10 OF:18
SCH NAME :POWER

DRAWN BY :SADIK
7A/32VDC
R205
47R
5n6 C1081
50V
10u
C1100
22u
16V
12V_PSU
SS33
2
C5V6
MOSFET_CONTROL
FS5
1
L125
60R
D178
D191
R1297
33k
R1276
4k7
C1055
100n
10V
8
7
6
5
100n
10V
C1125
R1304
3k9
U189
MP1583
S301
R1253
47R
F285
3V3_VCC
R566
10k
Q177
BC848B
TP387
FDC642P
Q183
4
1
R1296
33k
2
1
220n
25V
C1085
5V_VCC
7A/32VDC
R1321
2k
MOSFET_CONTROL
R1274
4k7
C1054
100n
10V
F171
4
R1252
47R
25V
220n
C1
F170
1
C1047
FS3
1
C1078
4u7
16V
5V_STBY
C1091
220n
25V
FDC642P
Q104
TP385
TP384
INVERTER SOCKET
TP377
TP149
6
FDC642P
Q182
C1098
C1097
22u 22u
16V 16V
TP386
Q180
BC848B
R1273
4k7
C1053
100n
10V
R1298
33k
1
2
3V3_VCC
1
2
R1249
47R
BACKLIGHT_ON/OFF
DIMMING
MOSFET_CONTROL
S21
R1306
30k
FDC642P
Q184
5V_STBY
10u
SS33
R1245
10k
3V3_STBY
10p
1
1
2
1
L122
D188
1
C759
R929
10k
C918
10n
COMP 4
100n
16V
C1103
22u
16V
5n6 C1080NC
50V
C1108
C1109
22u 22u
16V 16V
ADAPTER OPTIONS
R1299
33k
TP380
8
7
6
5
R1257
1k
C1086
C1102
220n22u
25V 16V
SS
EN
COMP
FB
R1301
3k9
BS
IN
SW
GND
C1122
1
2
3
4
10V
100n
C1046
C1092
C5V6
C1071
10n
16V
U187
MP1583
5V_Audio
10u
SS33
12V_STBY
S303
R1308
30k
2
1
2
1
CN137
L124
D190
MECH_SWITCH
5 FB
C753
47u
16V
12V_VCC
12V_STBY
STBY_ON/OFF_NOT
STBY_ON/OFF
INH 3
2V5_ST
BACKLIGHT_ON/OFF
6 FSW
C1083
16V
100n
R1242
10k
DIMMING
NC
C1093
220n
25V
220n
25V
R1294
33k
R1270
4k7
R1271
4k7
R1275
4k7
R1272
4k7
5n6
50V
C1079
4u7
16V
33k
R1295
8
7
6
5
D180
TP23
SS
EN
COMP
FB
10
12V_VCC
C1088
220n
25V
C1111
22u
16V
BS
IN
SW
GND
R1262
1k
11
12
C1110
22u
16V
1
2
3
4
D179
C5V6
R1303
3k9
C1084
12V_STBY
S305
TP381
TP27
5V_STBY
12V_VCC
1
D181
13
14
D182
C5V6
18V_VCC
15
16
220n
25V
12V_STBY
C1124
U190
MP1583
TP388
C1074
10n
16V
2V5_ST
10u
SYNCH 2
L5985
R930
10k
R1075
10k
C779
10n
16V
R1176
2k
7 GND
12V_STBY
17
12V_PSU
OUT 1
U184
33k
R700
18
8 VCC
220n
25V
5V_PW
3V3_VCC
TP25
3V3_VCC
TP28
12V_STBY
19
L121
12V_VCC
S302
C814
22u
16V
SK24
20
100n
10V
C1058
C815
22u
C618
5V_PW
D162
C875
100n
F243
17IPS17 CONNECTOR
S280
STBY_ON/OFF_NOT
C754
47u
16V
MOSFET_CONTROL
MOSFET_CONTROL
TP26
28
3k9
R1340
3k9
R1339
27
STBY_ON/OFF
10p
1V0_ST
R476
1k
C1052
100n
10V
R378
10k
12V_VCC
10
1V0_ST
SYNCH 2
L5985
R931
10k
R1074
10k
330R
C764
10n
16V
10u
U183
C972
220u
25V
C812
22u
16V
SK24
12V_VCC
OUT 2
GND
C816
22u
TP33
6V3
220u
3 IN
330R
A
1
S134
1n
U122
LM1117
12V_STBY
R1139
390R
12V_STBY
NC
R818
180k
AVDD_33
C306
100n
10V
2V5_ST
R1064
6k8
14
FB 1
C535
1V0_ST
D176
R1152
30k
12
13
R702
33k
12V_STBY
11
U144
6 EN
NC
C575
22u
16V
GND 2
330R
3V3_VCC
7A/32VDC
TP31
5 VINA
1V26_STBY
C579
22u
16V
10
C576
22u
16V
D177
10u
3V3_STBY
10V
10u
SW 3
MP2112
F145
FS6
1
4 VINB
C578
22u
16V
NC
VDDC
C308
100n
10V
10u
25V
47u
16V
5V_VCC
CN144
TP30
6V3
220u
C8
C452
7
L110
S210
3V3_STBY
5
5V_PW
330R
10V
10u
C7
F147
1
24V_VCC
1
3V3_VCC
C408
10V
10u
VDDP
C307
100n
10V
R411
2k
5V_VCC
C410
C409
330R
1V26_STBY
24V_VCC
KEYBOARD_ONBOARD
3V3_STBY
CN4
F146
R22
4k7
R21
4k7
R23
4k7
TP29
PAULO DECOUPLING
A/D DIMMING SELECTION
17PW26 CONNECTOR
C464
SEHIT
15-10-2009_15:59
AX M
U138
MST6WB7GQ-3
GND15 244
VDDC4 245
19" TO 22" FFC OPTIONS
RX_B_0_N
LVA4P 246
RX_B_0_P
LVA4M 247
RX_B_1_N
LVDS CABLE
CN139
1
VDDC
TP402
CN138
TP396
RX_B_1_P
RX_B_0_P
LVA3M 249
RX_A_3_N
RX_B_2_N
RX_B_1_N
RX_A_CLK_P
RX_B_2_P
RX_B_1_P
RX_B_2_N
RX_A_2_P
RX_B_CLK_N
RX_B_2_P
LVA2M 253
RX_A_2_N
RX_B_CLK_P
LVA1P 254
RX_A_1_P
RX_B_3_N
10
LVA1M 255
RX_A_1_N
RX_B_3_P
11
RX_A_0_P
RX_A_0_N
12
LVA0M 257
RX_A_0_N
RX_A_0_P
13
VDDP6 258
LVB4M 261
RX_A_1_N
RX_A_0_N
15
RX_A_1_P
16
LVB3M 263
RX_A_2_N
RX_B_3_N
RX_A_2_P
RX_A_CLK_N
20
LVBCKM 265
RX_B_CLK_N
RX_A_CLK_P
21
RX_A_3_N
22
LVB2P 266
RX_B_2_P
LVB2M 267
RX_B_2_N
LVB1P 268
RX_B_1_P
LVB1M 269
RX_B_1_N
LVB0P 270
RX_B_0_P
LVB0M 271
RX_B_0_N
RX_A_3_P
10
RX_A_1_P
11
12
S295
13
14
15
BACKLIGHT_ON/OFF
TP405
TP406
S290
26
S291
27
RX_A_2_P
17
18
RX_A_CLK_N
19
20
TP403
TP391
TP401
TP394
21
22
13
14
15
16
17
18
19
20
21
22
PANEL_VCC
B
S285
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
OPTION1
43
44
OPTION2
45
46
OPTION3
47
48
49
50
24
OPTION2
RX_A_3_P
25
26
OPTION3
27
28
29
30
10k
R1244
10k
R1243
3V3_VCC
PDP_IRQ
TP400
TP398
RX_A_2_N
1
3V3_VCC
RX_A_CLK_P
TP397
RX_A_3_N
TP399
RX_A_3_P
TP393
OPTION1
23
S288
BACKLIGHT_ON/OFF
S286
MEGA_DCR
1
12
RX_A_3_N
S283
10
RX_A_CLK_N
PANEL_VCC
TP389
RX_A_2_P
25
PANEL_VCC
9
11
16
23
TP407
TP395
RX_A_1_N
24
2
RX_A_1_P
RX_A_CLK_P
RX_A_1_N
RX_A_2_N
19
RX_B_CLK_P
TP408
RX_B_3_P
18
LVBCKP 264
RX_A_0_P
RX_B_3_P
TP390
RX_B_3_N
17
LVB3P 262
RX_A_0_N
RX_A_0_P
C311
100n
10V
LVB4P 260
TP404
RX_B_CLK_P
14
VDDP
GND16 259
RX_B_CLK_N
CN140
RX_B_3_P
TP392
LVA0P 256
PANEL_VCC
RX_A_CLK_N
LVA2P 252
S284
LVACKM 251
LVACKP 250
S287
RX_A_3_P
1
1
LVA3P 248
RX_B_0_N
28
29
PANEL_VCC = 5V
30
SHORT CCT PROTECTION

R706
33k
8V_VCC
PANEL_VCC
PANEL_VCC
2V6_ST
1k
R1260
R705
33k
12V_VCC
Q163
BC848B
3
1
10k
R32
24V_VCC
1V0_ST
S228
LOWER_SUP
R563
10k
R37
33k
1V0_FE
R913
10k
D158
BAW56
R564
10k
R1255
Q162
BC848B
1
2
BC848B
D3
BAW56
LOWER SUPPLY SHORT CCT PROTECTION
R562
10k
2V5_ST
1k
R914
10k
Q151
BC858B
10k
R568
Q136
2
D137
BAW56
TP150
PROTECT
3
1k
R1256
R912
10k
R565
10k
1k
R1000
1k
R1259
3V3_VCC
D159
BAW56
LOWER_SUP
5V_VCC
PANEL_VCC
CN1
1
2
PANEL_VCC = 5V/12V
3V3_STBY
F2
330R
1
2
10k
R7
10k
R6
F1
2
CN2
8
2
10
10k
R571
D136
BAW56
PANEL_VCC
3V3_VCC
OPTION3
PANEL_VCC
3V3_VCC
1
R4
10k
R5
10k
330R
2
1
2
4
11
12
6
13
14
8
15
16
17
10
11
18
12
19
13
20
14
21
5V_TUN
R708
33k
3V3_VCC
S2
RX_A_0_N
R3
10k
RX_A_0_P
RX_A_1_N
RX_A_1_P
RX_A_2_N
RX_A_2_P
RX_A_CLK_N
RX_A_CLK_P
15
22
23
S9
16
24
17
18
25
26
19
27
20
28
21
29
BC848B
RX_A_3_N
RX_A_3_P
S4
S3
10k
R569
Q137
22
23
30
D135
BAW56
PDP_IRQ
PROTECT_PANEL
OPTION1
3V3_VCC
1
S8
10k
R2
2
S5
3V3_VCC
OPTION2
10k
R1
MEGA_DCR
2
S6
1
2
S1
24
25
26
27
28
29
30
PANEL_VCC
PANEL VCC = 5V/12V
SHEET:11 OF:18
SCH NAME :LVDS INTERFACE

A3
14-10-2009_09:09
AX M
S250
3V3D_USB
S259
42
XTAL2
43
XTAL1/CLKIN
44
3V3D_USB
45
3V3D_USB
R1212
12k
46
ATEST/REG_EN
47
RBIAS
GR3/PRTDIS0
17
VDDA33PLL
PRTPWR2
16
OCS3_N
15
PRTPWER3
14
VDDA33_3
13
USBDP3
100n
16V
C900
100n
16V
C836
3V3A_USB
100n
16V
USB_PWR_EN_2
1 OUT
5
U166 IN
2 GND
USB_PWR_A
3V3A_USB
C933
3V3_VCC
5V_USB
1p
5V_USB
R1222
4k7
R1221
4k7
R1220
4k7
5V_USB
STMP2161
3 FAULT
EN 4
R1140
47k
USB_OCD
USB_DN_2
USB_DN_1
22u
16V
C811
Should be close to Pin#40
R1069
100k
USB_DP_2
USB_DN
USB_DP_1
3V3A_USB
USB_DP_1
S233
USB_DN_1
USB_DP
1p
USB_DN
S236
1p
USB_DP
w/o USB Hub Opsiyonu 1
C934
3V3D_USB
R891
10k
12
USBDN3
VSS_2
10
11
USBDN2
9
USBDP2
VDDA33_2
USBDP1
USBDN1
VSS_1
USBDN0
USBDP0
2
R892
10k
C
C931
100n
16V
C894
26
VDDA18PLL
1V8_D
100n
16V
20
C895
GANG_EN
R890
10k
C897
21
100n
16V
GR1/NON_REM0
C1034
10u
10V
100n
16V
22
3V3A_USB
330R
1V8_D
C893
VSS_3
F248
3V3_VCC
C899
VDD18_1
23
100n
16V
24
18
3V3D_USB
Should be close to Pin#45

TEST0
PRTPWR_POL
VSS_7
330R
FE1_SDA
19
VDDA33_1
100n
16V
C896
22u
16V
C818
48
3V3_VCC
25
SDA/SMBDATA
CFG_SEL1
SCL/SMBCLK/CFG_SEL0
27
28
29
30
31
32
33
34
35
F236
FE1_SCL
GR2/NON_REM1
U177
USB2503
5V_USB
C1035
10u
10V
C926
22p
5V_VCC
C898
3V3D_USB
1V8_D
USB_OC_2
R1016
4k7
R950
47R
R939
47R
SELF_PWR
VSS_6
VSS_4
41
VBUS_DET
VDD18_3
OCS2_N
1V8_D
S257
3V3D_USB
22u
16V
USB_PWR_EN_1
1u
6V3
VDD18_2
VDD33CR
40
PRTPWR1
39
OCS1_N
3V3D_USB
CLKIN_EN
36
VSS_5
R1144
1M
24MHz
RESET_N
38
C925
X109
37
TEST1
USB_RESET
22p
C1030
R889
10k
3V3D_USB
USB_OC_1
R893
10k
R1031
4k7
R1032
4k7
C819
R1160
470k
USB_ENA_A
R1035
4k7
5V_USB
USB_OC_1
USB_OC_1
U165
ST2052
USB_OC_2
1
2
3
4
5V_USB
USB_PWR_EN_1
USB_PWR_EN_2
GND
IN
EN1
EN2
OC1
OUT1
OUT2
OC2
8
7
6
5
USB_OC_1
USB_PWR_1
USB_PWR_2
USB_OC_2
w/o USB Hub Opsiyonu 2

USB_DP_2
OPTIONAL USB
S7
USB_DN
USB_DN_2
F250
C1126
S10
USB_DP
10V
10u
CN131
1
USB_PWR_1
330R
USB_DN_1
USB_DP_1
10V
10u
DEFAULT USB
C1127
F249
E
CN132
1
USB_PWR_2
330R
2
USB_DN_2
R1058
10R
F251
1 IO1
2 GND
IO4 6
U167
USB_PWR_A
USB_DP_A
4
5
330R
6
VDD 5
SERVICE USB
AZ099-04S
3 IO2
C1128
USB_DM_A
10V
10u
USB_DP_2
IO3 4
7
8
R1057
10R
17mb37
SHEET:12 OF:18
SCH NAME :USB

A3
14-10-2009_09:09
AX M
BUFADDR_6
FLASH_ADDR3
TS_DATA3_1
BUFADDR_7
U163
1Y2
74LCX244
1A3
2A3
15
2Y2
1Y3
14
1A4
2A2
13
2Y1
1Y4
12
10
GND
2A1
11
S258
5V_VCC
16
5V_CI
BUFADDR_1
FLASH_ADDR5
FLASH_ADDR7
1 B
CD1
3V3_CI
2 A
74LVC1G32
3 GND
Y 4
100n
16V
EMI_BE0
3V3_CI
4k7
R1025
1A1
VCC
20
2OE-
19
FLASH_NOTCSD
CI_IOWR
EMI_NBAA
CD1
3V3_CI
CI_IRQ
CI_WAIT
CI_RESET
R1053
4k7
R1052
4k7
R1023
4k7
R1049
4k7
R1044
4k7
3V3_CI
3V3_CI
2Y4
1Y1
18
1A2
2A4
17
5
6
CI_OE
3V3_CI
3V3_CI
3V3_CI
CI_CLK
68
3V3_CI
CI_WE
2p2
50V
2p2
50V
U161
2Y3
1Y2
74LCX244
1A3
2Y2
C957
15
1Y3
14
1A4
2A2
13
2Y1
1Y4
12
10
GND
2A1
11
2p2
50V
2p2
50V
16
2A3
TSBYTECLK_3
FLASH_NOTWE
R1050
3V3_CI
4k7
FLASH_NOTOE
CI_OE
CI_WE
CI_IOWR
CI_IORD
R34
4k7
R36
4k7
R33
4k7
R35
4k7
3V3_CI
3V3_CI
3V3_CI
3V3_CI
A3
SHEET:13 OF:18
DRAWN BY :ERTUG BAL
34
TS_DATA2_3
CD2
67
BUFDATA_2
R333
10k
32
E
C968
SCH NAME :STi7101 NOR FLASH & CI
65
31
BUFDATA_1
64
30
BUFDATA_0
5V_CI line should be thick !
C967
2
33
TS_DATA1_3
4 R4 5
66
TS_DATA0_3
TSPKTCLK_3
R1
R324
2 R2 7
47R
3 R3 6
63
29
BUFADDR_0
62
TSVALID_3
26
BUFADDR_3
28
25
BUFADDR_4
BUFADDR_1
24
BUFADDR_5
2
1
TS_DATA7_1
R1093
33R
TSBYTECLK_3
BUFADDR_10
FLASH_NOTCSD
42
BUFDATA_7
BUFDATA_6
41
BUFDATA_5
40
BUFDATA_4
C903
100n
16V
C958
CI_IORD
CI_WE
100n
16V
C834
FLASH_NOTCSD
1OE-
39
BUFDATA_3
35
36
2
CN116
100n
16V
CD2
57
FLASH_DATA7
23
B8
GND
BUFADDR_6
FLASH_DATA6
11
BUFADDR_7
12
TS_DATA6_1
B7
56
A8
10
55
BUFDATA_7
22
FLASH_DATA5
21
13
BUFADDR_12
B6
TS_DATA5_1
A7
54
53
BUFDATA_6
20
FLASH_DATA4
19
14
B5
5V_CI
A6
4k7
3V3_CI
R471
TS_DATA4_1
BUFDATA_5
52
FLASH_DATA3
18
B4
74LCX245
R472
4k7
A5
15
A4
FLASH_DATA2
3V3_CI
B3
BUFDATA_4
5V_CI
BUFDATA_3
TS_DATA3_1
FLASH_DATA1
16
51
17
50
B2
U164
17
A3
16
CI_IRQ
BUFDATA_2
TS_DATA2_1
FLASH_DATA0
TS_DATA1_1
B1
49
A2
48
BUFDATA_1
15
FLASH_NOTCSD
18
14
19
CI_WE
OE-
BUFADDR_14
A1
TS_DATA0_1
TSPKTCLK_1
BUFDATA_0
C831
3V3_CI
47
20
13
VCC
BUFADDR_8
DIR
BUFADDR_13
CI_DATA_DIR
CI_IOWR
2A1
CD1
GND
11
46
BUFADDR_11
10
45
2Y1
FLASH_ADDR14
12
1Y4
12
11
13
BUFADDR_9
2A2
CI_IORD
1A4
BUFADDR_10
44
1Y3
FLASH_ADDR13
43
2Y2
14
15
10
2A3
CI_OE
74LCX244
TSPKTERR_1
BUFADDR_9
BUFADDR_11
1A3
R963
47R
TS_DATA7_3
1Y2
16
3V3_CI
2Y3
FLASH_ADDR12
TSPKTERR_3
U162
BUFADDR_8
CI_CLK
17
TSVALID_1
2A4
FLASH_ADDR11
1A2
CI_DETECT
FLASH_NOTCSD
47R
R200
4k7
R241
BUFADDR_14
18
1Y1
TS_DATA6_3
FLASH_ADDR10
2OE-
2Y4
S249
3V3_CI
TS_DATA5_3
BUFADDR_13
1A1
19
TS_DATA4_3
FLASH_ADDR9
20
3 R3 6
47R
2 R2 7
R323
R1
1
8
BUFADDR_12
VCC
1OE-
38
FLASH_ADDR8
TS_DATA3_3
TSBYTECLK_1
TSPKTCLK_1
4 R4 5
C_CLK
4 R4 5
FLASH_NOTCSD
37
C_STRT
VCC 5
U157
TSPKTERR_1
TSVALID_1
3V3_CI
BUFADDR_3
TS_DATA1_1
2 R2 7
10R
3 R3 6
C_VAL
CI_DATA_DIR
FLASH_ADDR6
C832
R1172
1
8
R1
3V3_CI
R956
47R
R1022
4k7
BUFADDR_2
CD2
C_ERR
100n
16V
2Y3
C841
FLASH_ADDR4
10u
16V
17
C1095
2A4
CI_REG
R199
47R
TS_DATA0_1
1A2
1 A
5
VCC
2 B
3 GND Y 4
FLASH_NOTOE
EMI_NBAA
R1045
3V3_CI
4k7
61
C_D0
4 R4 5
BUFADDR_0
BUFADDR_2
18
U171
74V1G08
60
TS_DATA2_1
C_D1
2 R2 7
10R
3 R3 6
C_D2
1Y1
R1021
4k7
3V3_CI
27
R1174
1
8
R1
2Y4
3V3_CI
22u
CI_WAIT
C_D3
L118
3V3_VCC
FLASH_NOTCSD
100n
16V
FLASH_ADDR2
TS_DATA4_1
19
C844
TS_DATA5_1
2OE-
CI_RESET
4 R4 5
BUFADDR_5
1A1
3V3_CI
59
C_D4
FLASH_ADDR1
TS_DATA6_1
58
C_D5
2 R2 7
10R
3 R3 6
BUFADDR_4
TS_DATA7_1
20
10u
16V
C_D6
R1173
1
8
R1
VCC
C1094
C_D7
1OE-
100n
16V
FLASH_ADDR0
100n
16V
FLASH_NOTCSD
C846
C845
100n
16V
C829
14-10-2009_09:10
AX M
NOR FLASH
FLASH_ADDR17
A14
BYTE
47
VCC_F
A13
VSS2
46
A12
DQ15A-1
45
A11
DQ7
44
FLASH_DATA7
A10
DQ14
43
FLASH_DATA14
A9
DQ6
42
R894
10k
R941
47R
R948
47R
R943
47R
A19
DQ5
40
A20
DQ12
39
R1055
4k7
FLASH_DATA13
FLASH_DATA5
FF_OE_NOT
OE
VCC
20
Q0
Q7
19
NAND_WP_NOT
100n
16V
41
NAND_R_NOT
VCC_F
NAND_E_NOT
NC
14
VPP/WP
FLASH_ADDR18
FLASH_ADDR8
FLASH_ADDR7
FLASH_ADDR6
FLASH_ADDR5
FLASH_ADDR4
FLASH_ADDR3
FLASH_ADDR2
Boot Straps For NOR Flash
VCC_F
DQ11
36
FLASH_DATA11
NAND_AL
DQ3
35
FLASH_DATA3
NAND_CL
M29W640
FLASH_DATA4
FLASH_ADDR1
D0
D7
18
FLASH_ADDR2
D1
D6
17
Q1
Q6
16
Q2
Q5
15
D2
D5
14
D3
D4
13
U168
74LCX374
RB
DQ10
34
FLASH_DATA10
16
A18
DQ2
33
FLASH_DATA2
17
A17
DQ9
32
FLASH_DATA9
Q3
Q4
12
18
A7
DQ1
31
FLASH_DATA1
10
GND
CK
11
19
A6
DQ8
30
FLASH_DATA8
20
A5
DQ0
29
FLASH_DATA0
21
A4
28
FLASH_NOTOE
A3
VSS1
27
23
A2
26
FLASH_NOTCSA
FLASH_RDNOTWR
24
A1
A0
25
FLASH_ADDR1
NAND_OR_OUT_2
22
FLASH_ADDR15
VCC
37
15
S241
FLASH_ADDR19
38
FLASH_ADDR14
FLASH_ADDR13
FLASH_ADDR12
FLASH_ADDR10
FLASH_ADDR9
FLASH_ADDR8
FLASH_ADDR7
FLASH_ADDR6
FLASH_ADDR5
FLASH_ADDR4
FLASH_ADDR3
FLASH_ADDR2
FLASH_ADDR1
FLASH_NOTCSA
R916
10k
R918
10k
R917
10k
R915
10k
R899
10k
R897
10k
R898
10k
R921
10k
R920
10k
R919
10k
R922
10k
R924
10k
R925
10k
R903
10k
R902
10k
R907
10k
R906
10k
R905
10k
R904
10k
R923
10k
FLASH_ADDR3
VCC_F
NC2
NC28
47
NC3
NC27
46
NC4
NC26
45
NC5
I/O7
44
FLASH_DATA7
I/O6
43
FLASH_DATA6
FLASH_DATA5
FLASH_DATA4
E0
E1
E2
VSS
VCC
WC
SCL
SDA
8
7
6
5
F254
5V_VCC
60R
FE1_SCL
FE1_SDA
VCC 5
I/O5
I/O4
41
NC25
40
10
NC7
NC24
39
11
NC8
NC23
38
VDD2
37
U169
TP376
TP375
VCC_F
13
VSS1
VSS2
36
14
NC9
NC22
35
15
NC10
NC21
34
NAND_CL
16
CL
NC20
33
NAND_AL
17
AL
I/O3
32
FLASH_DATA3
NAND_W_NOT
R896
10k
R895
10k
18
I/O2
31
FLASH_DATA2
FLASH_DATA1
FLASH_DATA0
NAND512-A
FE1_SCL
FE1_SDA
19
WP
I/O1
30
20
NC11
I/O0
29
21
NC12
NC19
28
22
NC13
NC18
27
23
NC14
NC17
26
24
NC15
NC16
25
VCC_F
U158
2 A
74LVC1G32
3 GND
Y 4
1 NC
RB
42
VDD1
NC
3V3_CI
NC6
FF_CLK
VCC_F
1 B
12
C843
13
1
2
3
4
FF_CLK
VCC 5
VCC_F
U178
FLASH_ADDR4
2 A
74LVC1G04
3 GND
Y 4
F_ADDR4_INV
3V3_CI
FAST FLASHPROGRAMMING
VCC_F
R1013
4k7
FLASH_NOTCSB
3V3_CI
FLASH_ADDR4
NAND_OR_OUT_1
3V3_CI
FLASH_NOTCSB
F_ADDR4_INV
3V3_CI
NAND_OR_OUT_2
100n
16V
S243
S242
DQ4
U172
RP
NAND_E_NOT
100n
16V
FLASH_ADDR22
VCC_F
FLASH_WP
VCC_F
12
48
100n
16V
RESET_7101
11
FLASH_DATA12
C853
FLASH_WE
10
C828
FLASH_ADDR21
C851
DQ13
NC29
1A
VCC
14
1B
4B
13
FLASH_NOTOE
1Y
4A
12
NAND_OR_OUT_1
2A
4Y
11
U175
74LVC32
2B
3B
10
2Y
3A
3Y
GND
VCC_F
VCC_F
FLASH_RDNOTWR
R1051
4k7
U170
74V1G08
1 A
5
VCC
2 B
3 GND Y 4
100n
16V
FLASH_ADDR20
A8
FLASH_DATA6
C840
FLASH_ADDR9
NC1
U151
24C32
FLASH_DATA15
VCC_F
7
FLASH_ADDR10
EEPROM
NAND FLASH
VCC_F
60R
100n
16V
FLASH_ADDR11
48
C852
FLASH_ADDR12
C850
FLASH_ADDR13
A16
100n
16V
FLASH_ADDR14
A15
100n
16V
FLASH_ADDR15
F253
3V3_VCC
C842
FLASH_ADDR16
100u
16V
100n
16V
C892
C826
VCC_F
FLASH_WE
NAND_R_NOT
FLASH_RDNOTWR
NAND_OR_OUT_1
NAND_W_NOT
3V3_CI
3V3_CI
SHEET:14 OF:18
SCH NAME :STi7101 FLASH & EEPROM

DRAWN BY :ERTUG BAL
A3
14-10-2009_09:10
AX M
LMI SYSTEM
A
S_LMI_ADDR0
M4
S_LMI_ADDR1
N5
V1
LMISYSDATA[1]
V2
S_LMI_ADDR2
N4
LMISYSADD[2]
LMISYSDATA[2]
W1
S_LMI_ADDR3
P5
LMISYSADD[3]
LMISYSDATA[3]
W2
S_LMI_ADDR4
U4
LMISYSADD[4]
LMISYSDATA[4]
Y1
S_LMI_ADDR5
V5
LMISYSADD[5]
LMISYSDATA[5]
Y2
S_LMI_ADDR6
V4
LMISYSADD[6]
LMISYSDATA[6] AA1
S_LMI_ADDR7
W5
LMISYSADD[7]
LMISYSDATA[7] AA2
S_LMI_ADDR8
W4
LMISYSADD[8]
LMISYSDATA[8]
E2
S_LMI_ADDR9
U5
LMISYSADD[9]
LMISYSDATA[9]
E1
S_LMI_ADDR10
P4
LMISYSADD[10]
LMISYSDATA[10]
F2
S_LMI_ADDR11
T5
LMISYSADD[11]
LMISYSDATA[11]
F1
S_LMI_ADDR12
T4
LMISYSDATA[12]
G2
LMISYSADD[1]
LMISYSADD[12]
S_LMI_DQM0
AB2 LMIS_DMASK0
S_LMI_DQM1
J1
LMIS_DMASK1
S_LMI_DQM2
AC1 LMIS_DMASK2
S_LMI_DQM3
K2
S_LMI_DQS0
AB1 LMIS_DSTROBE0
LMISYSDATA[13]
G1
LMISYSDATA[14]
H2
3
LMISYSDATA[15]
U160
LMIS_DMASK3
LMISYSDATA[16]
STI7101YWC
LMI VIDEO
LMISYSDATA[0]
LMISYSADD[0]
V_LMI_ADDR0
E10 LMIVIDADD[0]
LMIVIDDATA[0] A14
S_LMI_DATA1
V_LMI_ADDR1
D10 LMIVIDADD[1]
LMIVIDDATA[1] B14
S_LMI_DATA2
V_LMI_ADDR2
E9
S_LMI_DATA3
V_LMI_ADDR3
D9
S_LMI_DATA4
V_LMI_ADDR4
S_LMI_DATA5
S_LMI_DATA0
LMIVIDADD[2]
V_LMI_DATA2
LMIVIDADD[3]
LMIVIDDATA[3] B15
V_LMI_DATA3
D6
LMIVIDADD[4]
LMIVIDDATA[4] A16
V_LMI_DATA4
V_LMI_ADDR5
E6
LMIVIDADD[5]
LMIVIDDATA[5] B16
V_LMI_DATA5
S_LMI_DATA6
V_LMI_ADDR6
D5
LMIVIDADD[6]
LMIVIDDATA[6] A17
V_LMI_DATA6
S_LMI_DATA7
V_LMI_ADDR7
E5
LMIVIDADD[7]
LMIVIDDATA[7] B17
V_LMI_DATA7
S_LMI_DATA8
V_LMI_ADDR8
D4
LMIVIDADD[8]
LMIVIDDATA[8]
A1
V_LMI_DATA8
V_LMI_ADDR9
E7
LMIVIDADD[9]
LMIVIDDATA[9]
B2
S_LMI_DATA10
V_LMI_ADDR10
D8
LMIVIDADD[10]
LMIVIDDATA[10]
A2
S_LMI_DATA11
V_LMI_ADDR11
E8
LMIVIDADD[11]
LMIVIDDATA[11]
B3
S_LMI_DATA12
V_LMI_ADDR12
D7
LMIVIDDATA[12]
A3
H1
S_LMI_DATA16
V_LMI_DQM3
S_LMI_DATA17
V_LMI_DQS0
S_LMI_DQS1
J2
LMIS_DSTROBE1
LMISYSDATA[18] AE1
S_LMI_DQS2
AC2 LMIS_DSTROBE2
LMISYSDATA[19] AE2
S_LMI_DQS3
K1
LMIS_DSTROBE3
LMISYSDATA[20] AF1
S_LMI_NOTBANK0
K4
LMISYSBKSEL[0]
LMISYSDATA[21] AF2
S_LMI_DATA21
S_LMI_NOTBANK1
L5
LMISYSBKSEL[1]
LMISYSDATA[22] AG1
S_LMI_CLK
U1
LMISYSCLK
LMISYSDATA[23] AG2
S_LMI_CKEN
R1150
120k
Y5
LMISYSCLKEN
LMISYSDATA[24]
L2
R1
LMISYSREF
LMISYSDATA[25]
L1
S_LMI_VREF
H5
LMISYSVREF
LMISYSDATA[26]
M2
S_LMI_NOTCAS
J4
NOTLMISYSCAS
LMISYSDATA[27]
M1
A6
A5
S_LMI_DATA19
V_LMI_DQS2
S_LMI_DATA20
V_LMI_DQS3
LMIVIDDATA[13]
B4
LMIVIDDATA[14]
A4
B19 LMIV_DSTROBE2
LMIVIDDATA[19] B21
B7
LMIV_DSTROBE3
LMIVIDDATA[20] A22
LMIVIDDATA[23] B23
V_LMI_DATA23
C11 LMIVIDVREF
LMIVIDDATA[26]
A8
S_LMI_DATA27
V_LMI_NOTCAS
D15 NOTLMIVIDCAS
LMIVIDDATA[27]
B9
AK26
TP262
AN22
EMIDMAREQ[0]
SYSITRQ[2]
AK27
TP261
AL22
EMIDMAREQ[1]
SYSITRQ[3]
AK28
D21
AL6
NC2
TDI
D22
AM5
NC3
TDO
E22
NC4
TMDSREF
T32
NC5
U160
TMDSTX0N
STI7101YWC
AP9
NC6
TMDSTX0P
T33
C30
NC7
TMDSTX1N
R34
L31
NC8
TMDSTX1P
R33
AM31
NC9
TMDSTX2N
P34
E16
NMI
TMDSTX2P
P33
V_LMI_DATA24
V_LMI_DATA25
NOT_TRST
TMDSTXCN
U34
NOTASEBRK
TMDSTXCP
U33
TMS
E21
NOTRESETIN
SYSB_CLKOSC
R887
10k
R1076
100R
DVB_IRQ
R957
47R
CI_IRQ
R879
10k
R882
10k
TCK
TDI
TDO
R1124
75R
T34
A29
R883
10k
V_LMI_DATA21
E17
TCK
SYSB_CLKIN_ALT
AN27
NC1
SYSB_CLKIN
E27
G5
RESET_7101
R881
10k
A13 LMIVIDCLK
V_LMI_VREF
SYSITRQ[1]
D19
V_LMI_CLK
S_LMI_DATA26
DAA_C2A
V_LMI_DATA20
S_LMI_DATA23
S_LMI_DATA25
AK25
E20
V_LMI_DATA22
B8
SYSITRQ[0]
NOTRST
S_LMI_DATA22
LMIVIDDATA[25]
DAA_C1A
AP5
NOTASEBRK
LMIVIDDATA[22] A23
LMIVIDDATA[24]
AN5
V_LMI_DATA19
E13 LMIVIDBKSEL[1]
B12 LMIVIDREF
SYSCLKOUT
D20
V_LMI_NOTBANK1
V_LMI_CKEN
R1151
120k
ATATXP
AN9
V_LMI_DATA18
V_LMI_NOTBANK0
S_LMI_DATA24
AN30
V_LMI_DATA17
LMIVIDDATA[21] B22
A7
SYSBCLKOSC
V_LMI_DATA16
D14 LMIVIDBKSEL[0]
D13 LMIVIDCLKEN
SYSBCLKINALT
V_LMI_DATA15
LMIVIDDATA[18] A21
SYSA_CLKIN
ATATXN
V_LMI_DATA14
LMIV_DSTROBE1
SYSBCLKIN
ATARXP
V_LMI_DATA13
LMIVIDDATA[17] B20
C1
AP27
AP30
V_LMI_DATA12
B5
ATARXN
SYSACLKIN
AN31
V_LMI_DATA11
A20
ATAREF
AP31
V_LMI_DATA10
LMIVIDDATA[15]
MISCELLANEOUS
AM30
V_LMI_DATA9
U160
LMIV_DMASK3
LMIVIDDATA[16]
STI7101YWC
A18 LMIV_DSTROBE0
V_LMI_DQS1
S_LMI_DATA18
LMIV_DMASK1
A19 LMIV_DMASK2
V_LMI_DQM2
S_LMI_DATA15
LMISYSDATA[17] AD2
B6
V_LMI_DQM1
S_LMI_DATA14
LMIVIDADD[12]
B18 LMIV_DMASK0
V_LMI_DQM0
S_LMI_DATA13
AD1
V_LMI_DATA1
LMIVIDDATA[2] A15
S_LMI_DATA9
R1130
470R
R886
10k
R880
10k
R888
10k
R885
10k
V_LMI_DATA0
TMDSTX0N
TMDSTX2N
TMDSTX0P
TMDSTX2P
TMDSTX1N
TMDSTX1N
TMDSTX1P
TMDSTX1P
TMDSTX2N
TMDSTX0N
TMDSTX2P
TMDSTX0P
TMDSTXCN
TMDSTXCN
2 R2 7
10k
3 R3 6
TMDSTXCP
TMDSTXCP
4 R4 5
RTCCLKIN
TMUCLK
E18
NOTLMISYSCLK
LMISYSDATA[28]
N2
DCUTRIGGERIN
D17
TRIGGERIN
USBDM
AP25
DCUTRIGGEROUT
R878
10k
D18
TRIGGEROUT
USBDP
AN25
E19
WDOGRSTOUT
USBREF
AM25
USB_DN
USB_DP
R1005
12k
R1020
4k7
R1054
4k7
R1048
4k7
R871
10k
R901
10k
R900
10k
R875
10k
R877
10k
R873
10k
R872
10k
R876
10k
R874
10k
V_LMI_DATA26
S_LMI_NOTCS0
L4
NOTLMISYSCS[0]
LMISYSDATA[29]
N1
TP251
M5
NOTLMISYSCS[1]
LMISYSDATA[30]
P2
S_LMI_NOTRAS
K5
NOTLMISYSRAS
LMISYSDATA[31]
P1
V_LMI_DATA27
S_LMI_DATA28
V_LMI_NOTCLK
B13 NOTLMIVIDCLK
LMIVIDDATA[28]
S_LMI_DATA29
V_LMI_NOTCS0
D11 NOTLMIVIDCS[0]
LMIVIDDATA[29] B10
S_LMI_DATA30
TP250
S_LMI_DATA31
V_LMI_NOTRAS
A9
LMIVIDDATA[30] A10
V_LMI_DATA30
E14 NOTLMIVIDRAS
LMIVIDDATA[31] A11
V_LMI_DATA31
S231
JTAG_PIN1
V_LMI_DATA29
E11 NOTLMIVIDCS[1]
3V3_VCC
C742
100n
V_LMI_DATA28
1
1A
1k
2
1Y
6A
13
2A
6Y
12
3V3_VCC
F258
14
VCC
3V3_VCC
3V3_VCC
CI_WAIT
3V3_VCC
S_LMI_RDNOTWR
J5
NOTLMISYSWE
LMIS_GNDCOMP
R2
E15 NOTLMIVIDWE
V_LMI_RDNOTWR
S232
LMIV_GNDCOMP B11
NOTASEBRK
TSBYTECLK_1
CI_CLK
Q168
BC847B
R1033
4k7
UART_TXD
Q167
BC847B
11
5A
74HCU04
3A
5Y
10
3Y
4A
GND
4Y
FLASH_ADDR18
CI_REG
PONRST
TXD_CON
1A
VCC
14
1Y
6A
13
XTAL1
2A
6Y
12
XTAL2
2Y
5A
11
XTAL2
R965
47R
3A
C739
100n
10V
C992
10u
F274
R1072
27k
Q165
BC847B
3V3_VCC
R970
1k
C940
33p
50V
RXD_CON
SYSA_CLKIN
6
7
S245
UART_RXD
X107
TP366
SYSB_CLKOSC
CN135
RXD_CON
30MHz
C921
22p
50V
1
2
UART DEBUG
TXD_CON
S238
UART_TXD
R1169
120R
C922
22p
50V
CLOCKS
TP365
U180
74HCU04
3Y
GND
5Y
10
4A
4Y
SYSB_CLKIN
C737
100n
10V
RESET_7101
R870
10k
3V3_VCC
NOTJTAGRST
XTAL1
JTAG
Q166
BC847B
2V5_ST
1k
R1066
3k3
R1068
3k3
R1065
3k3
RESET_DVB
R1129
2k2
UART_RXD
2Y
FLASH_WAIT
R1067
3k3
12V_VCC
C854
100n
16V
R1119
75R
U181
R998
1k
Q169
BC847B
XTAL2
XTAL2
R966
47R
XTAL1
SYSB_CLKIN_ALT
R1143
1M
3
VCC
U159
GND RST
LM809
1
2
R1071
3k9
CI_REG
NOTJTAGRST
NOTASEBRK
JTAG_PIN1
TDI
TCK
TMS
DCUTRIGGERIN
DCUTRIGGEROUT
CN136
2
DCUTRIGGERIN
DCUTRIGGEROUT
NOTASEBRK
TMS
10
TCK
11
12
TDI
13
14
TDO
15
16
NOTJTAGRST
17
18
NOTRST
19
20
PONRST
3V3_VCC
DVB_RESET
R375
10k
R185
33R
RESET_DVB
RESET
C251
100n
10V
17mb37
A3
SHEET:15 OF:18
MISC
3V3_VCC
SCH NAME :STi7101 LMI,
NOTRST
3V3_VCC
X106
C924
22p
50V
FLASH_ADDR18
C821
100u
16V
C738
100n
10V
XTAL2
30MHz
C923
22p
50V
FLASH_WAIT
JTAG_PIN1
F247
1
4 R4 5
R1154
1
8
R1
3V3_VCC
U2
2 R2 7
10k
3 R3 6
TMS
R884
10k
D16
3V3_VCC
S_LMI_NOTCLK
R1155
1
8
R1
14-10-2009_09:10
AX M
A
C693
10u
R1343
10k
1
8
R1
2 R2 7
3 R3 6
4 R4 5
R1089
33R
VIDDIGOUT0 L34
A27 AUDANAMLOUT
VIDDIGOUT1 L33
MII_TXD1
FLASH_ADDR2
A28 AUDANAMROUT
VIDDIGOUT2 K34
MII_TXD2
FLASH_ADDR3
B27 AUDANAPLOUT
VIDDIGOUT3 K33
MII_TXD3
FLASH_ADDR4
B28 AUDANAPROUT
VIDDIGOUT4 J34
MII_TX_EN
FLASH_ADDR5
C28 AUDANAVBGFIL
VIDDIGOUT5 J33
MII_MDIO
FLASH_ADDR6
D29 AUDDIGDATAIN
VIDDIGOUT6 H34
MII_MDC
FLASH_ADDR7
E28 AUDDIGLRCLKIN
VIDDIGOUT7 H33
MII_RX_CLK
FLASH_ADDR8
D28 AUDDIGSTRBIN
VIDDIGOUT8 U30
MII_RXD0
FLASH_ADDR9
E26 AUDLRCLKOUT
VIDDIGOUT9 T31
MII_RXD1
FLASH_ADDR10
VIDDIGOUT10 T30
MII_RXD2
FLASH_ADDR11
A25 AUDPCMOUT0
B
4 R4 5
10k
3 R3 6
R1344
2 R2 7
B25 AUDPCMOUT1
R1
8
R1090
33R
R1079
100R
DVB_SPDIF
VID_OUT_BLUE
VID_OUT_CVBS
VID_OUT_GREEN
VIDDIGOUT11 R31
1
VIDDIGOUT12 R30
U160
VIDDIGOUT13
STI7101YWC
I2S_CLK_DVB
FLASH_ADDR1
MII_TXD0
MII_RXD3
FLASH_ADDR12
MII_TX_CLK
FLASH_ADDR13
MII_COL
FLASH_ADDR14
C25 AUDPCMOUT2
P31
D25 AUDPCMOUT3
VIDDIGOUT14 P30
MII_CRS
FLASH_ADDR15
E25 AUDPCMOUT4
VIDDIGOUT15 N31
MII_MDINT
FLASH_ADDR16
E24 AUDSCLKOUT
VIDDIGOUTHS M33
MII_RX_DV
FLASH_ADDR17
D24 AUDSPDIFOUT
VIDDIGOUTVS M34
MII_RX_ER
FLASH_ADDR18
E34 VIDANAB0OUT
VIDANAIDUMPCV1 C33
A34 VIDANAC1OUT
VIDANAIDUMPG0 F33
FLASH_ADDR20
C34 VIDANACV1OUT
VIDANAIDUMPR0 D33
FLASH_ADDR21
F34 VIDANAG0OUT
VIDANAIDUMPY1 B33
B31 VIDANAGREXT0
VIDANAR0OUT D34
B32 VIDANAGREXT1
VIDANAREXT0 A31
E33 VIDANAIDUMPB0
VIDANAREXT1 A32
A33 VIDANAIDUMPC1
VIDANAY1OUT B34
FLASH_ADDR19
FLASH_ADDR22
4 R4 5
AL9
should be close to ST7101
AP20
3 R3 6
33R
2 R2 7
AK10
EMIADDR[2]
EMIDATA[1]
AP19
AL10
EMIADDR[3]
EMIDATA[2]
AP18
R1
1
8
R1113
4 R4 5
AK11
EMIADDR[4]
EMIDATA[3]
AP17
AL11
EMIADDR[5]
EMIDATA[4]
AP15
3 R3 6
33R
2 R2 7
AK12
EMIADDR[6]
EMIDATA[5]
AP14
AL12
EMIADDR[7]
EMIDATA[6]
AP13
R1
1
8
R1109
R4
4
5
AK13
EMIADDR[8]
EMIDATA[7]
AP12
AL13
EMIADDR[9]
EMIDATA[8]
AN20
3 R3 6
33R
2 R2 7
AK14
EMIADDR[10]
EMIDATA[9]
AN19
AL14
EMIADDR[11]
EMIDATA[10]
AN18
VID_OUT_CVBS
VID_OUT_RED
VID_OUT_GREEN
VID_OUT_BLUE
EMIDATA[11]
AN17
R1
1
8
R1118
4 R4 5
AL15
EMIDATA[12]
AN15
EMIADDR[13]
3 R3 6
33R
2 R2 7
AK17
EMIADDR[14]
AN14
AL17
U160
EMIDATA[13]
STI7101YWC
EMIADDR[15]
EMIDATA[14]
AN13
R1
1
8
R1108
R4
4
5
AK18
EMIADDR[16]
EMIDATA[15]
AN12
3 R3 6
33R
2 R2 7
AK19
AL19
R1
1
8
R1110
R944
47R
R945
47R
AK20
AL20
EMIBUSGNT
R1008
VDD_3V3
4k7
R968
FLASH_RDNOTWR
47R
F257
5V_VCC
VID_OUT_RED
F259
PR_OUT
S275
VID_OUT_BLUE
S270
VID_OUT_GREEN
1
2
3
4
220n
10V
C810
C1149
16V
10u
IN1
IN2
IN3
+VCC
PB_OUT
OUT1
OUT2
OUT3
GND
R1157
75R
R1158
75R
R1156
75R
8
7
6
5
PR_OUT
PB_OUT
Y_OUT
Y_OUT
should be close to U129
1k
C988
68p
50V
F260
1k
C990
68p
50V
F261
1k
C991
68p
50V
DVB_PR
C987
68p
50V
22u
DVB_Y
C986
68p
50V
C736
100n
10V
S265
10p
L119
VID_OUT_CVBS
1u2
C994
150p
50V
EMIFLASHCLK
AN21
EMIADDR[18]
NOTEMIBAA
AP21
EMIADDR[19]
NOTEMIBE[0]
AP11
EMIADDR[20]
NOTEMIBE[1]
AN11
EMIADDR[21]
NOTEMICSA
AK9
NOTEMICSB
AL8
EMIADDR[17]
EMIADDR[22]
AL21
EMIADDR[23]
NOTEMICSC
AM8
AM21
EMIBUSGNT
NOTEMICSD
AP8
AM20
EMIBUSREQ
NOTEMICSE
AK8
AN10
EMIRDNOTWR
NOTEMILBA
AP22
AK22
EMITRDY/WAIT
NOTEMIOE
AP10
FL_DATA1
C_RESET
FL_DATA2
DVB_TXD
R1099
33R
FL_DATA3
FL_DATA4
FL_DATA5
FL_DATA6
FL_DATA7
FL_DATA8
AGC_S1
FL_DATA9
FF_OE_NOT
FL_DATA10
FL_DATA11
NAND_WP_NOT
FL_DATA12
FLASH_WP
FL_DATA13
USB_RESET
R1082
100R
R1100
33R
R1092
33R
R1095
33R
R1085
33R
FL_DATA14
FL_DATA15
FE1_SCL
TP280
R967
47R
R959
47R
R969
47R
R934
47R
R936
47R
R958
47R
R1007
4k7
R1009
4k7
R946
47R
R955
47R
FE1_SDA
EMI_NBAA
R952
47R
R953
47R
EMI_BE0
FLASH_ADDR0
FLASH_NOTCSA
AM32
PIO0[0]
PIO3[0]
AE32
AP33
PIO0[1]
PIO3[1]
AE34
AN33
PIO0[2]
PIO3[2]
AE33
AP34
PIO0[3]
PIO3[3]
AD34
AN34
PIO0[4]
PIO3[4]
AD33
AM33
PIO0[5]
PIO3[5]
AC34
AM34
PIO0[6]
PIO3[6]
AC33
AL32
PIO0[7]
PIO3[7]
AB34
AL34
PIO1[0]
PIO4[0]
AD32
AL33
PIO1[1]
PIO4[1]
AD30
AK34
PIO1[2]
PIO4[2]
AD31
FLASH_NOTCSB
FLASH_NOTCSD
VDD_3V3
AK33
PIO1[3]
PIO4[3]
AC30
AJ34
U160
PIO1[4] PIO4[4]
STI7101YWC
AC31
AJ33
PIO1[5]
PIO4[5]
AB30
AH34
PIO1[6]
PIO4[6]
AB31
AH33
PIO1[7]
PIO4[7]
AA30
AJ30
PIO2[0]
PIO5[0]
AB33
AJ31
PIO2[1]
PIO5[1]
AA34
AH30
PIO2[2]
PIO5[2]
AA33
Y34
AH31
PIO2[3]
PIO5[3]
AG30
PIO2[4]
PIO5[4]
Y33
PIO5[5]
AA31
AG31
PIO2[5]
AE31
PIO2[6]
PIO5[6]
Y30
AE30
PIO2[7]
PIO5[7]
Y31
A
R942
47R
R937
47R
R940
47R
R938
47R
IR_7101
CI_RESET
UART_RXD
UART_TXD
B
R949
47R
ETH_RESET
R951
47R
DVB_IRQ
R954
47R
RESET_T
CI_DETECT
R1210
USB_OC_1
47R
R1211
47R
USB_PWR_EN_1
FLASH_NOTWE
FLASH_NOTOE
TRANSPORT STREAM
TS_DATA0_1
AH5 TSIN0DATA[0]
TSIN2DATA[0] AP1
TS_DATA0_3
TS_DATA1_1
AG4 TSIN0DATA[1]
S244
DVB_CVBS
C752
47p
50V
Q172
BC857B
VDD_3V3
R927
10k
R926
10k
R1019
4k7
R1039
4k7
R1012
4k7
R1024
4k7
EMIBUSGNT
C995
150p
50V
R1015
4k7
R1047
4k7
R1056
4k7
R1046
4k7
R1034
4k7
R1014
4k7
R1217
4k7
TSIN2DATA[1] AN2
3V3_VCC
TS_DATA1_3
TS_DATA2_1
AK1 TSIN0DATA[2]
TSIN2DATA[2] AN1
3V3_VCC
TS_DATA2_3
TS_DATA3_1
AK2 TSIN0DATA[3]
TSIN2DATA[3] AM2
FLASH_WAIT
3V3_VCC
TS_DATA3_3
TS_DATA4_1
AJ1 TSIN0DATA[4]
TSIN2DATA[4] AM1
FLASH_NOTCSA
3V3_VCC
TS_DATA4_3
TS_DATA5_1
AJ2 TSIN0DATA[5]
TSIN2DATA[5] AL2
FLASH_NOTCSB
FLASH_NOTCSD
3V3_VCC
TS_DATA5_3
TS_DATA6_1
AH1 TSIN0DATA[6]
TSIN2DATA[6] AL1
3V3_VCC
TS_DATA6_3
TS_DATA7_1
AH2 TSIN0DATA[7]
TSIN2DATA[7] AL3
3V3_VCC
TS_DATA7_3
C_D0
AE5 TSIN1DATA[0]
TSIN0ERROR AH4
TSPKTERR_1
FL_DATA0
FL_DATA8
FL_DATA1
FL_DATA9
R1102
1 R1 8
2 R2 7
3 R3 6
4 R4 5
FL_DATA2
FL_DATA10
FL_DATA3
FL_DATA11
33R
R1111
1 R1 8
2 R2 7
3 R3 6
4 R4 5
FL_DATA4
FL_DATA12
FL_DATA5
FL_DATA13
33R
R1101
1 R1 8
2 R2 7
3 R3 6
4 R4 5
FLASH_DATA4
FLASH_DATA12
FLASH_DATA5
FLASH_DATA13
FL_DATA6
FL_DATA14
FL_DATA7
FL_DATA15
33R
R1103
1 R1 8
2 R2 7
3 R3 6
4 R4 5
FLASH_DATA6
FLASH_DATA14
FLASH_DATA7
FLASH_DATA15
FLASH_DATA0
FLASH_DATA8
FLASH_DATA1
FLASH_DATA9
FE1_SCL
FE1_SDA
RESET_T
UART_RXD
UART_TXD
ETH_RESET
USB_PWR_EN_1
R792
10k
3V3_STBY
FLASH_DATA2
FLASH_DATA10
FLASH_DATA3
FLASH_DATA11
R793
10k
IR_7101
Q158
BC848B
IR_IN
TSBYTECLK_3
C751
47p
50V
U160
TSIN1DATA[1]
STI7101YWC TSIN1ERROR
AD4
C_D2
AD5 TSIN1DATA[2]
TSIN2ERROR AP2
TSPKTERR_3
C_D3
AC4 TSIN1DATA[3]
TSIN0PACKETCLK AJ4
TSPKTCLK_1
C_D4
AC5 TSIN1DATA[4]
TSIN1PACKETCLK AF4
C_STRT
C_D5
AB4 TSIN1DATA[5]
TSIN2PACKETCLK AP3
TSPKTCLK_3
C_D6
AB5 TSIN1DATA[6]
TSIN1BYTECLK AG5
C_CLK
C_D7
AA4 TSIN1DATA[7]
TSIN2BYTECLK AM3
TSBYTECLK_3
TSBYTECLK_1
AK6 TSIN0BYTECLK
TSIN1BYTECLKVALID AF5
C_VAL
AJ5 TSIN0BYTECLKVALID
TSIN2BYTECLKVALID AN3
TSVALID_3
TSVALID_1
AE4
SCH NAME :STi7101 A/V, PIO, EMI, TS
C_ERR
33R
C_D1
VDD_3V3
5V_AV
C789
100p
50V
DVB_PB
C989
68p
50V
R1164
220R
R1165
220R
R1166
220R
C917
VDD_3V3
VDD_3V3
L117
5V_VCC
AK21
DVB_RXD
FL_DATA0
VID_OUT_BLUE
VID_OUT_RED
VID_OUT_RED
VID_OUT_BLUE
VID_OUT_GREEN
5V_AV
AL18
EMIADDR[12]
C5V1
1k
VID_OUT_GREEN
S271
U173
TSH343
D170
VID_OUT_CVBS
VDD_3V3
EMIADDR[1]
AK15
TP281
VID_OUT_RED
R1163
7k5
R1162
7k5
should be close to U129

R1224
150R
R1226
150R
R1227
150R
R1225
150R
PIO
EMIDATA[0]
FLASH_WAIT
R1146
150R
R1147
150R
R1149
150R
R1148
150R
EMI
C27 AUDANAIREF
D26 AUDPCMCLKOUT
R1091
33R
I2S_DATA_DVB
AUDIO & VIDEO
R1159
560R
I2S_WS_DVB
A3
SHEET:16 OF:18
14-10-2009_09:10
AX M
VDD_CKGA
V_LMI_DLL_VDD
S_LMI_DLL_VDD
VDD_CKGB
VDD_CKGA
8
VDD_SATA_OSC_1V0
USB_VDD_1V0
VDD_S_LMI_2V6
VDD_V_LMI_2V6
VDD_ANA_2V5
VDD_CKG_2V5
VDD_CKG_2V5
VDD_CKG_2V5
F266
VDD_1V0
1k
C728
100n
10V
S_LMI_DLL_VDD
C791
100p
50V
VDD_3V3
VDD_1V0
B
F265
VDD_1V0
1k
C729
100n
10V
V_LMI_DLL_VDD
C790
100p
50V
C981
1u
6V3
C735
100n
10V
F246
1V0_ST
330R
USB_VDD_1V0
C801
100p
50V
F270
VDD_AF_2V5
C797
100p
50V
10u
10V
1k
C1156
2V5_ST
C730
100n
10V
C978
1u
6V3
C732
100n
10V
VDD_SATA_OSC_1V0
C794
100p
50V
C977
1u
6V3
C733
100n
10V
USB_VDD_2V5
C793
100p
50V
C976
1u
6V3
C731
100n
10V
VDD_SATA_OSC_2V5
C792
100p
50V
C993
10u
10V
C734
100n
10V
VDD_CKGA
C798
100p
50V
C1154
10u
10V
C726
100n
10V
VDD_ANA_2V5
C795
100p
50V
C974
470u
6V3
C702
100n
10V
VDD_S_LMI_2V6
C767
10n
16V
C973
470u
6V3
C704
100n
10V
VDD_V_LMI_2V6
C765
10n
16V
C1153
10u
10V
C719
100n
10V
C717
100n
10V
F269
1V0_ST
1k
F268
2V5_ST
1k
F267
2V5_ST
1k
F273
1V0_ST
1k
F262
2V5_ST
1k
F239
2V6_ST
330R
330R
VDDE3V3_11
VDDE3V3_12
VDDE3V3_13
VDDE3V3_14
VDDE3V3_15
VDDE3V3_16
VDDE3V3_17
VDDE3V3_18
VDDE3V3_19
VDDE3V3_20
TMDSVDDE3V3
USBVDDB3V3
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
AUD_GNDA
AUD_GNDAS
DGNDPLL80V0
FS0_GNDA
FS0_GNDD
GND_ANA_1
GND_ANA_2
U160
STI7101YWC
F276
2V5_ST
1k
2V6
8V
TP227
TP228
TP273
TP249
TP238
TP226
F277
1k
C1152
10u
10V
C713
100n
10V
C804
100p
50V
VDD_CKGB
C803
100p
50V
C720
100n
10V
2V6_ST
VDDM
VDD_DMC
VDD_DMQ
VDD_S_LMI_2V6
VDD_V_LMI_2V6
F252
1V0_ST
60R
C782
220u
6V3
F242
C709
100n
10V
C716
100n
10V
C777
10n
16V
C715
100n
10V
VDD_1V0
C780
10n
16V
2V5
TP248
TP247
TP255
TP252
TP256
TP258
TP277
TP246
F241
3V3_VCC
330R
C788
220u
6V3
C1155
100n
10V
C772
10n
16V
C706
100n
10V
C771
10n
16V
C705
100n
10V
VDD_3V3
C774
10n
16V
2V5_ST
VDD_CKG_2V5
VDD_AF_2V5
VDD_ANA_2V5
VDD_SATA_OSC_2V5
USB_VDD_2V5
2V5A_FE
2V5_QAM
3V3
TP198
TP276
TP275
TP225
TP232
TP231
TP266
TP230
TP229
TP235
TP234
TP236
3V3_VCC
AVDD_AU
AVDD_USB
3V3_HDMI
VDD_3V3
3V3_ETH
3V3A_USB
3V3D_FE
3V3_QAM
VCC_F
3V3_CI
3V3D_USB
TP143
8V_VCC
TP242
TP142
5V_STBY
TP202
VDDC
1V26_STBY
5V_STBY
3V3_STBY
TP239
TP240
TP144
12V
TP201
12V_VCC
VDDP
AVDD_33
3V3_STBY
1V0
TP260
TP259
TP243
TP257
TP244
TP279
TP278
TP237
TP253
TP254
USB_VDD_1V0
VDD_CKGA
VDD_CKGB
VDD_SATA_OSC_1V0
VDD_1V0
1V0D_FE1
1V0A_FE1
1V_QAM
S_LMI_DLL_VDD
V_LMI_DLL_VDD
5V
TP197
TP241
TP274
TP233
TP158
5V_VCC
5V_CI
5V_SPDIF
5V_AV
5V_TUN
A3
SHEET:17 OF:18
SCH NAME :STi7101 POWER

P13
P14
P15
P16
P19
P20
P21
P22
R14
R15
R16
R19
R20
R21
T15
T16
T17
T18
T19
T20
U15
U16
U17
U18
U19
U20
V15
V16
V17
V18
V19
V20
W15
W16
W17
W18
W19
W20
Y14
Y15
Y16
Y19
Y20
Y21
AA13
AA14
AA15
AA16
AA19
AA20
AA21
AA22
AB13
AB14
AB15
AB20
AB21
AB22
AK29
AK30
AK31
AL31
AM22
AN26
AN32
AP26
AP32
1V26_STBY
VDD_CKG_2V5
C808
100p
50V
1V0_ST
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
N22
N21
N20
N15
N14
N13
H3
AP6
AP4
AN6
AN4
AL5
AL4
AK5
AK4
AM6
AM4
AJ3
AH3
AG3
AF3
AE3
AD3
T3
R5
R4
R3
P3
N3
M3
L3
K3
J3
E23
D23
C24
C23
C22
C21
C20
C19
C18
C17
C16
C15
C14
B24
A24
U31
V30
AK32
AJ32
AH32
AG34
AG33
AG32
D32
AP23
AL23
V33
U32
P32
N32
V32
V34
N33
N34
R32
AP28
AM27
AN28
AL27
AM28
C12
G3
J32
K32
F32
E32
F31
F30
C32
H31
L32
J31
M31
F240
2V6_ST
AK24
AM9
AM10
AM11
AM12
AM13
AM14
AM15
AP7
AN8
W30
AL24
F4
F5
G4
N16
N17
N18
N19
P17
P18
R13
R17
R18
R22
T13
T14
T21
T22
U13
U14
U21
U22
V13
V14
V21
V22
W13
W14
W21
W22
Y13
Y17
Y18
Y22
AA17
AA18
AB16
AB17
AB18
AB19
AF30
AK16
AL16
AM16
AM17
AM18
AM19
AN16
AP16
A30
B30
K31
C31
G31
D27
M32
GND_7
GND_6
GND_5
GND_4
GND_3
GND_2
GND_1
GNDE_49
GNDE_48
GNDE_47
GNDE_46
GNDE_45
GNDE_44
GNDE_43
GNDE_42
GNDE_41
GNDE_40
GNDE_39
GNDE_38
GNDE_37
GNDE_36
GNDE_35
GNDE_34
GNDE_33
GNDE_32
GNDE_31
GNDE_30
GNDE_29
GNDE_28
GNDE_27
GNDE_26
GNDE_25
GNDE_24
GNDE_23
GNDE_22
GNDE_21
GNDE_20
GNDE_19
GNDE_18
GNDE_17
GNDE_16
GNDE_15
GNDE_14
GNDE_13
GNDE_12
GNDE_11
GNDE_10
GNDE_9
GNDE_8
GNDE_7
GNDE_6
GNDE_5
GNDE_4
GNDE_3
GNDE_2
GNDE_1
AGNDPLL80V0
USBVSSP
USBVSSBS
TMDSVSSX
TMDSVSSSL
TMDSVSSP
TMDSVSSD
TMDSVSSCK
TMDSVSSC2
TMDSVSSC1
TMDSVSSC0
TMDSGNDE
SATAVSST
SATAVSSREF
SATAVSSR
SATAVSSOSC
SATAVSSDLL
LMIVIDDLL_VSS
LMISYSDLL_VSS
GNDE_VID_ANA
GNDE_PLL80_ANA
GNDE_FS0_ANA
GNDE_AUD_ANA
GNDE_4FS_ANA
DA_SD_0_GNDA
DA_HD_0_GNDA
CKGB_4FS1_GNDD
CKGB_4FS1_GNDA
CKGB_4FS0_GNDD
CKGB_4FS0_GNDA
VDD_3V3
VDDE3V3_10
VDDE3V3_9
VDDE3V3_8
VDDE3V3_7
VDDE3V3_6
VDDE3V3_5
VDDE3V3_4
VDDE3V3_3
VDDE3V3_2
VDDE3V3_1
VDDE2V5_VID_ANA
VDDE2V5_PLL80_ANA
VDDE2V5_FS0_ANA
VDDE2V5_AUD_ANA
VDDE2V5_4FS_ANA
VDDE2V5_5
VDDE2V5_4
VDDE2V5_3
VDDE2V5_2
VDDE2V5_1
USBVSSP2V5
USBVSSC2V5
USBVDDP2V5
USBVDDBC2V5
SATAVDDOSC2V5
CKGB_4FS1_VCCA
CKGB_4FS0_VCCA
CKGA_PLL2_AVDDPLL2V5
CKGA_PLL2_AGNDPLL2V5
CKGA_PLL1_AVDDPLL2V5
CKGA_PLL1_AGNDPLL2V5
CKGA_PLL_VDDE2V5
AVDDPLL80V0
AUD_VCCA
FS0_VCCA
DA_SD_0_VCCA
DA_HD_0_VCCA
LMIVIDVDDE2V5_10
LMIVIDVDDE2V5_9
LMIVIDVDDE2V5_8
LMIVIDVDDE2V5_7
LMIVIDVDDE2V5_6
LMIVIDVDDE2V5_5
LMIVIDVDDE2V5_4
LMIVIDVDDE2V5_3
LMIVIDVDDE2V5_2
LMIVIDVDDE2V5_1
LMISYSVDDE2V5_11
LMISYSVDDE2V5_10
LMISYSVDDE2V5_9
LMISYSVDDE2V5_8
LMISYSVDDE2V5_7
LMISYSVDDE2V5_6
LMISYSVDDE2V5_5
LMISYSVDDE2V5_4
LMISYSVDDE2V5_3
LMISYSVDDE2V5_2
LMISYSVDDE2V5_1
USBVDDP
USBVDDBS
TMDSVDDX
TMDSVDDSL
TMDSVDDP
TMDSVDDD
TMDSVDDCK
TMDSVDDC2
TMDSVDDC1
TMDSVDDC0
TMDSVDD
SATAVDDT[1]
SATAVDDT[0]
SATAVDDREF
SATAVDDR[1]
SATAVDDR[0]
SATAVDDOSC
SATAVDDDLL
LMIVIDDLL_VDD
LMISYSDLL_VDD
FS0_VDDD
DVDDPLL80V0
CKGB_4FS1_VDDD
CKGB_4FS0_VDDD
CKGA_PLL2_DVDDPLL1V0
CKGA_PLL2_DGNDPLL1V0
CKGA_PLL1_DVDDPLL1V0
CKGA_PLL1_DGNDPLL1V0
AK23
AF34
AF33
AF32
AF31
G34
G33
C26
B26
A26
H32
E29
E31
D31
G32
AN7
AM7
AL7
AK7
AK3
AM23
AN23
AN24
AM24
AM26
L30
M30
C2
D2
B1
D1
C3
N30
B29
C29
E30
D30
E12
D12
C13
C10
C9
C8
C7
C6
C5
C4
AC3
AB3
AA5
AA3
Y4
Y3
W3
V3
U3
T2
T1
AP24
AL25
W33
AA32
AC32
AB32
W32
W34
Y32
W31
V31
AP29
AN29
AL30
AL28
AM29
AL26
AL29
A12
H4
G30
K30
H30
J30
E4
E3
F3
D3
5
USB_VDD_2V5
VDD_SATA_OSC_2V5
VDD_CKG_2V5
VDD_ANA_2V5
VDD_CKG_2V5
VDD_AF_2V5
VDD_ANA_2V5
VDD_CKG_2V5
VDD_3V3
14-10-2009_09:10
AX M
3V3_ETH_A
3V3_ETH_A
3V3_ETH
R1190
1k
R1186
1k
R1189
1k
R1181
1k
R1178
1k
33
RXD4_RX_ER
MDIX_DIS
30
TXD4_TX_ER
RIP
29
RESET
28
PWR_DWN
27
TX_EN
R1170
10R
31
R1132
47R
R1133
47R
TEST_SE
34
LED_S
35
LED_C
36
LED_L
37
LED_TR
38
LED_R10
39
VDD
40
41
MDIO
GNDE2
MDC
42
43
44
45
46
CF2
TX_CLK
54
MII_TX_EN
32
TR1
S230
S229
ETH_TXP
ETH_TXN
VCCA3
IREF
GNDA3
VCCA2
X1
X2
CFG0
GNDA2
64
VCCA1
CFG1
R1188
NC1
R1187
63
GNDA1
GNDA5
24
TXN
23
14
11
10
1
R1125
75R
22
3V3_ETH_A
TXP
21
ETH_TXP
GNDA4
20
RXP
19
RXN
18
ETH_RXN
VCCA4
17
3V3_ETH_A
TX-
RX+
GND1
GND2
RX-
GND3
GND4
13
12
R1121
75R
R1126
75R
ETH_TXN
NC2
TX+
Place these capacitors

close to transformer
R1120
75R
S255
VDD2
FDE
MDINT
62
MF0
R999
3V3_ETH
CRS
61
MF1
MII_MDINT
COL
MF2
MII_CRS
60
MF3
59
25
ETH_RXN
TXD3
MF4
MII_COL
GNDE1
S247
C890
58
MII_TXD3
3V3_ETH
TXD2
26
15n
50V
57
MII_TXD2
U186
STE100P
TXD1
TEST
C1005
56
MII_TXD1
TXD0
15
R1134
47R
R1131
47R
55
16
2
4
ETH_RESET
ETH_RXP
MII_TXD0
RESET_DVB
JK108
53
MII_TX_CLK
RXD3
52
RXD2
51
VDD1
GNDE3
RXD1
50
B
SCLK
1n
1kV
S262
RX_CLK
C996
MII_RX_ER
49
RXD0
MII_RX_CLK
RX_DV
47
48
Place these resistors

close to STE100P
100n
16V
MII_MDIO
MII_MDC
MII_RXD3
MII_RXD2
MII_RXD1
3V3_ETH
MII_RXD0
MII_RX_DV
3V3_ETH
ETH_RXP
Ethernet lines must be 100ohm differential pairs
16
15
14
13
12
11
10
R1191
R1192
3V3_ETH_A
R1207
220k
R1208
5k1
3V3_ETH_A
S263
3V3_ETH_A
3V3_ETH
4
3
100n
16V
C866
10u
6V3
100n
16V
C1017
22p
50V
C859
3V3_ETH_A
1k
1
2
C1016
22p
50V
F278
3V3_VCC
25MHz
C1004
X1
R1193
R1194
3V3_ETH
R1197
R1198
3V3_ETH
R1185
R1195
R1184
3V3_ETH
R1179
R1180
R1182
R1196
3V3_ETH
3V3_ETH
3V3_ETH
R1183
R1145
1M
E
F271
100n
16V
C1014
100n
16V
C891
10u
6V3
3V3_ETH
1k
C998
3V3_VCC
SHEET:18 OF:18
SCH NAME :ETHERNET

DRAWN BY :ERTUG BAL
A3
14-10-2009_09:10
AX M
C1037
C819
U151
R889
C899
C933
C895
C1034
X109
R1031
R1032
R1016
R950
R939
S250
R1160
C1030
F248
R1220
R1211
C1035
C1068
S257
S259
F287
C1077
R1314 R1313 R1315
CN132
U167
Q136
R562
Q151
D135
S228
D3
F250
C537
C632
R801
JK110
R111
D121
R252
C545 R680
R623
R505
C136
F191
C547
C520
R210
Q140
R231
R594
R209
Q116
R127
C587
C541
U128
C123 C633
R238 R424
Z102
C540
Z101
R211
R423
L104
C364
C363
C467
CN122
R8
R9
U115
C137
R126
C586
CN131
D136
C145
C142
R748
R110
C416
R351
R653 R145 C423

R652 R144 C422
R664 R140 C435
R649 R141 C433
R859 C425
X104
R11
R632
R17
R16
R493 R494
C913
C914
R476
C452
R378
F279
F212
C470
C138 R511
JK106
C532
R624
S105
C1158
C360
C134
F159
JK102
C112
D114
S104
C111
D113
R622 R503
R501
D172
R482
R167
TH101
Q115
R163
C174
F188
D152
C1007
C116
D150
C366
R242
C602
R464
R752
F118
C229
R400
S192
S217
C115
C479
Q117
U123
S120 R164
C598
C442
F208
R637
C480
F209
R638
C441
F211
C473
C474
L116
C600
C854
R1119
R1067
C439
C438
R712
C437
S238 R1129
D104
F216
D185
C113
C1029
S308
R408 R460
R1033
S245 R970
C477 F198
C365
R1291
F116
C972
R506
R584
D101
SC101
R682
C624
C625
R1290
Q144
C626
Q168
D112
C1061
F194
L101
R483
R595
C122
Q167
R640 R128
C103
D111
R646
Q165
C106
D115
C940
R644
C1060
C1059
C478
R1300
L114
R38
C128
R1072
D117
F293
C440 R639
Q134
U122
D146
R641
R507 R349
D116
D102
R120
R643
C1138
R1254 R1329
C1075
S306
R133 C420
R134 C419
C159
R412
C152
C151
C150
R1164
R1165
Q123
CN121
R232
R1345
C1163
S121
S195 S196
C529 S194
S18
C180
R280
R282
JK108
U112
CN118
C105
C104
C107
D106
D140
Q135
R284
R1251
R1250
CN141
R1166
C917
C736
U129
U127
R1125
R1121
C1079
D186
S302
S19
C140
R255
R596
C108
F195
F196
R545
C502
R237
Q128
R711
S299
R1330R1268
R213
C484
R219
C1126
C665
R212
D126
C448
R254
R1240
F197
R473 R474
U193
C1139
S307
R392 R491
R393
R492
S262
R999
U186
R1134
R1131
R1170
C1005
R1328
R1325
C996
R1326
C1049
R281
Q178
D145
R14
R12
R18
R13
R15
R10
R411
C1137
F292
D193
R745
R233
C530
S123
R352
R353
R354
R355
JK109
R1269
C1140
F291
Q147
Q127
C383
R1126R1120
S292
S278
R234
C531
Q184
F185
C386
R1282
S255
S293
S277
R391
R390
R389
R394
R388
R387
R386
R385
F259
Q126
R1249
R1295
C1084
R1294
C361
C1069
TR1
Q180
U194
C1135
C1136
R1273
C1053
F261
C1006
C890 S247
F207
R1267
C1050
F290
F288
C1093
FS5
FS4
Q149
R1327
F289
L119
C1133
S125
R381
R531
C475
D194
R1285
L117
U191
F7
Q158
Q130
S117
R382
D187
C1121
C1090
FS1
JK111
R792
R793
Q148
R528
CN143
C443
R661
C987
C147
F151
D167
C1044 R1286
R1235 C1113
R1236 R1234
C1143 R1239
R1238 R1237
C1144 C1119
S294 R1288 R1287
S276 C1141 R1232
R1229 R1228 C1118
R1231 R1230 C1120
S281 C1142 R1233
S282 R1284
R276
R421
R662
C444
C986
F260
R1133
R1132
X1
C866
R28
C1017 R1145
R217
C488
D184
F204
F205 C489 R216
L2
R43
R1187
R1192
R1191
R1188
C12
S13
R26
R29
C14
C453
C1042
F5
C1115
S17
F4
Q2
R20
S12
R41
CN115
C5
C1117
R44
R30
D183
C445
R1190
R1186
R1189
R1181
R1178
C1016
S16
R39
R683
C989
R663
C369
C129
C538
R629 R396
C1149
U1
C368
F186
R253 C510
C447 C446
U110
C4
C18
C1056
C1132
L1
C3
C19
U192
C1134
F6
C6
R1320
C1131
C13
D130
D148
D149
D1
R526
C1116
F3
D147
C153
R257
F120
C659
C148
C306
C752
C1130
S298
R42C1114
L3
CN106
R1318
R1319
S279
R40
CN119
Q131
L4
C608 R422
CN3
C995
R1224
C994
D2
C1057
R1317
R1223
R564
R544
F2
C409
S265 S244
C668
C1127
F249
R565
R569
R706
D125
R1248
F145
R563
C503
R965
F187
C554
R229
R420
R228
C555
R419
R598
R686 R520
C661 R519
C499 R599
C660
C498
C149
S106
R966
R1058
C1128
R800
U180
C155
R268
R288
R757
C1043
R277
S118
F225
C818
C1062
C1064
C1067
R1324
R1338
R1337
R1336
R1335
C1063
U138
Q172
F228 R552
R527
S119
R1036
R964
C178
F251
C469
R271
R270 R269
F125
C739
C974
R1334
R357 R295
S220 R296
C308
F229
R1057
R1069
R1140
R1035
C194
U166
C182
R356
R724
C154
C973
F230
C926R1144C925 C898
R893
R1212
R1210
F255
C1066
C1065
R1266
R264
R857
R858
R1323
R1322
R499
C157
C173
R119
D155
C611
R1265
U130
C311
R1065
R1071
R125 C546
X106
C924R1143 C923
U155
R318
U153
C799
C1023
R803
U109
R1060
C904
R1061
F274
C992
R6 F1 S2
R3
R5
F157
F286
C821
C738
F239
R448
R735
R449
C135
R440 R1114
R384
R447
L111
R453
R1309 R1311 R1312 R1310
R278
C176
C183
C1129
TU102
R432
C790
R1151
R436 R1112
R1316
C213
C202
C1045
U159
R189
R182
R1162
R1163
R1089
R1159
R1090
C1155
R1091 C706
CN1
R433
D174
C1076
C1151
C782
CN140
CN138
CN139
U165
R294
R290
R289
R286
R287
R524
R279
R293
U154
CN2
S283
S295
R892
C836
R891
R315
F247
S290
S291
S1
S3
S4
U195
R313
R314
C304 C305
R439 R438 R435
S23
S5
S6
C1041
X101
R443 R445
R1155 R1154
C1078
C20
C753
R890
C893
U156
R186 R193
U160
R239
R1098
C224
C929
C897
U177
S236
S233
F128
C658 C657
R434
S20
S234
S235
R171
C931
C934
C894
C1161
R442 R441
R1124
C896
Q175
C283
D164
F127
C225 R298
R452 R451
C774
C1051
R1270
CN144
D137
R705 R568
FS6
C1091
R937
R942
F236
C1157
R1342
R332 R331
C206
F241
F242
C811
U174
R1209
C849
C916
R426
C188
R427
Q170
R200
R1082
R1100
R1055
S242 R1095
R1085
C788
R37 R32
S22
R22
R23
R21
C1162
F256
C221
R323
R967
C735
C977
C793
R946
C842
R1099
R880
R886
R885
R888
R1130
C754
R1103
R1111
Q176
R1059
R1341
R1173 R1174 R1172
R33
R35
R34
R969
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R1168 R910
R1084 R1083
R1043 R1042
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C937 S266
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R906
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R1039
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R1272 R608
TU101
R502
CN130
F215
F234
C359
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F231
JK101
JK104
Q102
CN114
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S303
C1086
Q162 Q163
Q162 Q163
C1071
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D158
D159
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R1169 C922
R894
R948
F268
C801
R1092R941
C981
C978
C764
L120
L120
D161
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R795
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TP394
TP401
TP401
TP391
TP389
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TP403TP407
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D176
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1
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TP400
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C759
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R1079
C812
U178
R1005 C733
C792
C732
C976
C731
R879
R882
R1047
R1139
D177
C920
TP253
TP251
C761
C794
C780
R884
R878
C1154
R1147
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C1088
U190 C1074
C1058
C1098
C1097
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C1080
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C1083
R1340
R1339
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R1009
F265
F266
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R881
R887
TP250
TP254
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C765
C704
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C1108
C1109
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R1303 C1124
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C578
C576
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C1072
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R450
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TP233
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TP400
TP394
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TP202
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1
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TP231
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R1198 R1197
R1194 R1193
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R1180 R1179
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C815
D127
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S127
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Q119
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F119
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R753
R777 R221 R674
R620
Q154
Q154
TP409
C273
L121
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F276
D162
R1226
TP233
TP23
U184
F172
U173
Q150
D127
C717
R571
R1225
D170
R1241
S128
TP23
F244
F262
C719
TP252
TP252
C677
R1227
Q121
Q121
Q120
D124
TP31
C876
R931
C816
R1105
TP227
TP29
TP31
U183
C1153
TP232
TP26
TP26
TP30
TP30
TP29
1
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U183
TP247
TP226
D124
F257
R546
S270
S275
S271
Q150
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R1074
C808
TP247
TP226
TP134
TP134
R467
R1106
TP256
TP28
TP198
TP25
TP24
C772
C771
C705
R1
R872
CN136
Q169
Q169
TP307
R871
R998
R900
R274 R375
TP307
R185 C251 Q166

R1068
C737
S231
TP296
TP410
TP409
TP410
R1003
C248
C676
U181
R901 S232
R1020R1054
Q166
R685
U117
C646
F219
R684
C663
Q133
R750
R236
S296
R729 R542
C385
R751
R522
R521
C371
R722
R829
C630
R736 R675
C118
R689
R153
TP133
TP133 Q133
TP296
C378
R1115
R1104
TP227R1107
TP201
TP28
TP256
TP243
TP254
TP250
C372
TP132
Q132
R1281
C158
R1264
Q179
Q179
R258
R630
R404
R659
R658
U117
TP240
TP225TP132
R1263
C418 R138
C421 R137
C160
C424 R146 R654
C434 R142 R650
C432 R143 R651
R687
C143
C417 R139 R666
C612 R773
C430
C431
C491
C429
R831
R830
R655 R147 C427
R148 C426
R657 R403 C490
R656 R149 C428
TP225
R155
R1344 R1343
C709
TP201
F246
F267
Q139
R660
C130
C131
C132
C636
C597
C620
R690
C144
Q132
U103
F184
C656 R513 C493 R607
TP276
R870
TP240
R667
R665
C803
C720
C804
C713
TP33
TP33
F269
TP404
C645 R515 C495 R605
R676
C662 R737 C119
C408
TP106
C742
Q120
C177
TP106
F8
1
F258
R225 R416 C551
TP244
TP243
F277
C728 C729
C791
C921
U178
R952
R1015
R940
R1066 R938
R1034
R949
R1014
R951
R1056 R954
TP257
C716
C250
TP244
R943
R896
R895
C777
F252
U181
F146
R224 C550 R415

C642 R517
C496 R518
C497 R601
C643 R600
C644 R516 C494 R603
C655 C492 R514 R606
TP276
C374
C650 R738F217
C175
TP112
TP112
R953
TP281
TP261
TP261
R1076
TP257
R1046
TP251
TP253
R875
C375
C631
TP239
TP239
C307
TP242
R223 C552 R227 R418

R226 R417
C553
U103
TP281
C702
TP259
F273
CN136
U118
U118
R678
C121
R692
TP159
C367
R1048
TP159
F147
TP242
R413
R222 C548
C549 R414
R262
R261
R926
R1019
C767
R437
R446
TP114
TP115
TP114
C649 R739
C410
TP109TP110
TP110R627
TP259
C993
R1280
R677
C120
R691
R761
TP115
C156
R742
R1283
R1279
R291 R161
R292 R162
C843
U168
TP262
R927
R1150
C840
TP260
TP280
R1008
TP258 TP260
TP258
TP280
C1156
TP119
TP118
U132
TP228
R535
C196
C197
R536
C501
C193
TP275
C195
TP275
C198
C199
C200
R283
R1261
R1278
R1277
F150
C605
C181
TP150
R1108 R1110
R1118
U175
R188
F124
C726
S300
S301
C1089
C1104
R1293 R1321
C1047
TP255
U162
R1025 C832
F270
C751
TP113
D169
TP108
R840
R395
TP108
C201
TP109
TP150
R1113 R1109
C930
TP116
D169
U175
C715
C228
C227 R117
C905
R407
TP255
R918
R365
TP228
C852
TP24
TP118
U161
TP119
Q103
U132
TP113
TP117
TP160
TP116C184
TP380
U158 U168
U158
R1051
C853
TP262
C797
C725
C215
TP249
U162
R1255
R1256
TP380
U170
TP238
C830
Q103
C1112
TP160
U171
C831
R914
TP381
TP248
U187
TP387
TP387
TP235
C289
TP238
F264
U171
U187
D188
D177
TP117
C928
TP246
C1103
D188
TP235
U161
U190
TP388
TP388
U164
1
R916
C214
TP237
TP246
TP273
R920
S256
C216
TP249
TP234
TP234
TP241
C223
TP237
TP273
TP161
C217
C207
S7
R924
R922
R919
U163
C1102
C1111
TP198TP25
R469
R312
R463
R311
TP229
D191
U163
C829
TP241
R1037 R1038
C1033 C743
TP161
TP229
S10
U144
U182
C834 R1050
C220
TP266
U182
S240
S239
C935 C936
TP266
R1246
R1304 C1125
C1081
TP378
TP279
C1110
C1099
D190
D191
R917 R925
R923
R956
C927
TP376
TP375
C758
C912
C911
C946
C699
C748
C749
TP378
TP230
TP279
C756
C757
C384
C356
TP381
TP236
TP230
C700
C579
TP248
U189
TP277
TP277
TP236
TP144
C1100
TP142
C575
TP376
CN116
TP375
C1105
TP144
TP142
TP278
TP278
R1207
TP353
TP353
TP385
TP21 TP347
TP334 TP385
TP21
TP411
TP412
TP411
TP334
TP412
TP377
TP384
TP384
CN122
TP377
TP143
TP298
TP6
TP350
TP104
TP12
TP304
TP303
TP366
TP305
TP304
TP10
TP303
TP4
TP305
TP301
TP289 TP301
TP289
TP383
TP383
TP300
TP302
TP300
TP299
TP302
TP336
TP360
TP355
TP359
TP335
TP17
TP19
TP10
TP362
TP357
TP363
TP358
TP5
TP11
TP5
TP11
TP9
TP16TP9
TP8
TP8
TP284
TP284
TP13
TP2
TP13
TP14
TP20
TP17TP2
TP20
TP19
TP16
TP18
TP293
TP151
TP14
TP352
TP354
TP358
TP363
TP357
TP362
TP294
TP151
TP12
TP4
TP22
TP336
TP335
TP293
TP15
TP274
TOP
TP359
TP351
TP15
TP274
CN145
TP287
TP356
TP352
TP197
TP197
TP354
CN145
TP351TP360
TP355
TP361
TP287
TP291
TP288
TP346
TP294
TP288
CN135
TP291
TP290
TP282
TP282
TP290
TP361
TP306
TP1
TP22
TP306
TOP
TP356
CN135
TP158
TP158
TP3
TP7
TP6
TP1
TP350
TP346
TP104
TP366
TP365
TP365
TP295
TP297
TP382
TP3
TP7
TP101
TP103
TP102
BARKOD
TP295 TP297
TP382
TP105
TP105
TP101
TP298
TP283
TP103
TP111
TP283
TP347
TP348
TP102
TP111
TP143
TP348
TP18
TP292
TP292
TP299
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TABLE OF CONTENTS

12.1 IF Filter for Audio Applications Epcos K9656M ..................................................... 41

16.5.3 Absolute Maximum Ratings..................................................................................... 58

General description of TDTC-G101D:

Digital Half-NIM tuner for COFDM

3. AUDIO AMPLIFIER STAGE WITH MAX9736(8-10WATT)

The MAX9736A/B Class D amplifiers provide high-performance,thermally efficient

Wide 8V to 28V Supply Voltage Range

3.4.1. Electrical Characteristics

3.4.2. Operating Specifications

AUDIO AMPLIFIER STAGE WITH PT2333(2.5 WATT)

Video IF for Multi-Standard Analog TV

6. MPEG-2/MPEG-4 DVB Decoder (STi7101)

The figure below shows the architecture of the Sti7101.

The STx7101 is a single-chip, high definition video decoder including:

_ motion and detail adaptive deinterlacer

_ UHF remote receiver input interface

Absolute Maximum Ratings

I/O specifications 3.3 volt pads

I/O specifications 2.5 volt pads

7 DVB-T Demodulator (COFDM)

7.1 General description:

7.3 Absolute Maximum Ratings

7.4 Pin description:

8 DVB-C DEMODULATOR STV0297E

The STV0297E is a complete single-chip QAM (quadrature amplitude modulation)

Decodes ITU-T J.83-Annexes A/C and DVB-C bit streams

Absolute Maximum Ratings

9 HY5DV281622DT-5 DDR SDRAM 128M

The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR)

3.3V for VDD and 2.5V for VDDQ power supply

Absolute Maximum Ratings

10 HY5DU561622ETP-5 DDR SDRAM 256M

11.3 Absolute Maximum Ratings

11 STE100P Ethernet PHY

- Provides Full-duplex operation on both 100Mbps and 10Mbps modes

11.3 Absolute Maximum Ratings

TV IF audio filter with two channels

12.2 IF Filter for Video Applications Epcos K3958M

TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz

132048-Bits Serial EEPROM 24LC02

Operating voltage: 2.4V~5.5V

13.3 Electrical Specifications

1432K Smart Serial EEPROM 24C32

Voltage operating range: 4.5V to 5.5V

Schmitt trigger, filtered inputs for noise suppression

11.3 Absolute Maximum Ratings and Electrical Characteristics

15512K CMOS Serial Flash MX25L512

Input Data Format

11.3 Absolute Maximum Ratings

Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

2.85V Model for SCSI-2 Active Termination

Absolute Maximum Ratings

Analog multiplexing and demultiplexing

Absolute Maximum Ratings

Bi-directional Protection for Four Lines in a Single TSOP-5 Package

Absolute Maximum Ratings

The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM),

1 MILLION ERASE/WRITE CYCLES

Absolute Maximum Ratings

16.5 TL062 16.5.1

Low-power JFET-input operational amplifier