CAD for VLSI Design - 1

Welcome to Lecture 3

Outline of this Lecture

Introduction to CMOS Transistor Theory
Working of P type and N type transistors Construction of basic gates using transistors Construction of General Boolean Circuits using transistors

Introduction
CMOS Complimentary Metal Oxide Silicon Technology Constructing Circuits using CMOS Technology Complementary use of both polarity devices on the same substrate Low power dissipation

MOS Transistors
Silicon a semiconductor, forms the starting material MOS (Metal Oxide Silicon) structure created by superimposing several layers of conducting, insulating, and transistor forming materials

MOS Construction
Chemical processing steps
Oxidation of silicon Diffusion of impurities to give it certain conduction characteristics (doping) Etching of aluminum for interconnection

For conduction, free charge carrying bodies like electron/holes to be available and is caused by doping If electrons carry charge (n-type/nMOS) and holes carry charge (p-type/pMOS)

MOS Layers
After Fabrication the MOS structure would have distinct layers
Diffusion (doped silicon) Polysilicon Aluminum

These layers are separated by insulating layers

P-type Device

N-type Device

Working of transistors
N-type: If gate is 0 the source is disconnected from the drain and if gate is 1, source is connected to the drain P-type: If gate is 0 the source is connected to the drain and if gate is 1, source is disconnected from the drain.

Transistor Structure
It works like a switch. Depends on the voltage applied at the Gate Gate is a conducting material polysilicon The insulator is silicon dioxide N-type 0 on Gate makes it open and 1 closes P-type 1 on Gate makes it open and 0 closes open state is a high impedance state

Signal Strengths
The signal may have varying strengths classified as weak 0 and strong 0, weak 1 and strong 1 The transistors output strength depends upon the type of input and the type of transistor. Desirable to always have strong signals

MOS Transistor Switches

High Impedance State

When gate of n-type is 0 and gate of ptype is 1 Resolution of Gate output levels Z+0 = 0; Z + 1 = 1; Z + Z = Z 1 + 0 = indeterminate 1+1=1 0+0=0

Transmission Switch

The Inverter

Logic Switches

The NAND Gate

The NOR Gate

Some salient features

For all input combinations to the gates discussed so far, there is always a path from VDD or VSS to the output and the full supply voltages appear at the output Fully restored Logic family For all input combinations to the gates discussed so far, there is never a direct path between VDD and VSS this is the basis for the low static power dissipation for CMOS

General Boolean Function

Try this Out

Z = NOT(((A.B) + C).D)

Questions and Answers

References
Samir Palnitkar, Verilog HDL, Pearson Education, Chapter 1. Neil H.E. Weste and Kamran Eshraghian, Principles of CMOS VLSI DESIGN A Systems Perspective, Second edition, Addison Wesley, Chapter 1. Thank You