UNDERSTANDING SMALL SIGNAL TRANSISTOR AMPLIFIER

RAJU BADDI
The transistor schematic amplifier circuit is diagram in of the 1. small This signal bipolar is

shown

Figure

configuration

commonly called the common emitter amplifier or simply CE amplifier. R 1 and R2 provide the quiescent biasing for the transistor BE junction. C i is the capacitor used to couple the input signal to be amplified to the amplifier. It serves to maintain the baising voltage constant together with isolating the signal source from the amplifier biasing circuit. RE also serves to setup the necessary biasing for the output stage by determining the quiescent current through the collector resistor RC. CE serves to provide a very low impedance path to the alternating current(a.c) appearing in the BE circuit due to the signal by having a large capacitive value and thus maintaining a constant voltage voltage appears junction. property transistor large upon BE this in VS the emitter circuit. The capacitors Ci and CE make it possible that the signal completely the BE the the the By of that across

emitter current suffers changes(~100A) small junction changes and in that is the is having a Fig 1: Schematic circuit diagram of CE amplifier.

voltage(~mV) across the current to

almost(99.5%) completely transfered collector amplification realised. By circuit,

resistance whose value is in k it is possible to produce voltage changes across the collector resistor RC on the order of ~100mV. Thus 1

realizing voltage gains of the order of ~100. CC is the dc blocking capacitor for the output stage. It subtracts the dc biasing voltage at the collector. This article aims at understanding the functioning of this amplifier. Various gain characteristics and the necessary like the input/output are impedances, voltage biasing conditions

discussed in detail. First we try to understand the input impedance as seen by the input signal V S. VS is on the order of ~mV. When V S=0 it means the -ve terminal of the capacitor Ci is connected to ground. Under this condition the biasing voltage at the base of the transistor is, V CC R2 R1R2

VB =

(1)

The capacitor is normally charged to this voltage. It can be taken, as will be argued quantitatively shortly,that the capacitor essentially behaves as a battery of voltage VB with very low internal resistance. Further we assume that due to the high current gain of the transistor the the base current is negligibly small. However in practice IB gives rise to a small reduction in V B by <100mV, due to its flow through R 1. But neglecting IB does not hamper the understanding of CE amplifier seriously. assumptions by also the input another is IB due With the circuit signal VS these seen is IB

shown in Figure 2. There is current entering the node N1 but its magnitude change in negligible to VS to is the Fig 2: Circuit seen by the input signal VS, towards calculating the input impedance of the CE amplifier. compared to i1 and i2. Further negligibly small due

high current gain property of the transistor. We now write

the expression for the current iS due to the net resistance as seen by the signal VS and hence is the input impedance of the CE amplifier.

iS =

V B V S V V B V S CC R2 R1

(2)

expanding and rewriting we see that, VS R1R2 V B V CC R2 VS = R1 R2 /R1R2 R1 R2 R1 R2 /R1R2

iS =

(3)

Using equation (1) for VB the 2nd term in the above expression has been dropped. The denominator is nothing but a resistance formed by R1 and R2 in parallel with each other. Thus the input impedance of the CE amplifier is R1||R2. We now quantitatively argue why the voltage of the capacitor Ci can be considered to be essentially constant for small signal voltages ~mV. For typical values of R 1, R2 ~10k the resistance seen by the signal is R1||R2 = 5k. Let Ci be 10F, then we see that for a typical signal votage of 1mV for 1ms this means a charge flow of :
3 VS 10 3 9 t = 10 = 0.210 C 3 R1 ||R2 510

QC = i S t =

(4)

A charge of 0.2nC produces a voltage change of

0.2109 /C i

on Ci. For

Ci = 10x10-6F we see this voltage is 0.02mV, i.e 2% of the input signal. Further we have assumed that the signal voltage of 1mV is contant for a period of 1ms, but this normally does not happen. If the signal had a contant voltage of 1mV for 1ms one of the possible forms of signals is a square wave of frequency 500Hz. Here the time constant RCi is 0.05 or the inverse of that is 20Hz a signal frequency of 500Hz is just 25 times the inverse of the RC constant at the input stage. If we assume that the input signal has a frequency atleast 100 times to that given by the inverse of RCi then the voltage changes on Ci will be further 4 times smaller and hence can be completely neglected even for a rectangular wave form. For sinusoidal waveform due to change in signal strength with time the voltage changes on Ci will be further less over a period of 1/2 cycle. Hence it is normally assumed that Ci acts as a dc blocking capacitor and only lets a.c to pass through it

at low impedance(normally taken to be zero). But it should be kept in mind that this is true only very much above the critical frequency 1/RC. We next consider the effect of voltage variation in the BE loop of the transistor formed by R2, BE junction and RE||CE. Due to the presence of biasing voltage VB the potential difference across R E when no signal is present is approximately VB-0.7. It should be noted that the transistor has the ability to adjust the current in the emitter circuit drastically by tiny changes(~10mV) in its BE junction voltage. This will become clear when we use the Eber-Molls equation for the BE junction. So the current can be mainly thought to be determined by passive components RE and the voltage divider bias R1 and R2. In this simple analysis without much loss of generality we assume the base to be at a quiescent voltage of VB. This means a current of IE=(VB-0.7)/RE through the emitter resistance RE. For typical values of R1=R2=10k and RE=1k we have IE=4.3mA. Most of the emitter current flows to the collector and produces a voltage drop of IERC across the collector resistance. So the collector of the transistor is at a voltage of V CCIERC. This voltage partly C be also E covers the is voltage very drop across as CE any the terminals of the transistor the remaining is dropped across R E||CE. The voltage its drop It between should and terminals that important changes in the voltage across RE and RC are accomodated by a change in value. noted this is possible because current through the emitter-collector does not depend much above about 0.1V. It can be thought of as the voltage drop across CE terminals is a kind of store from which the RE and RC keep borrowing and returning voltage according to the input signal strength and phase. To have faithful and proper amplification of the input signal it should be observed that sufficient voltage drop or store is available across the CE terminals apart from providing the low voltage of about 0.1V for operation of the transistor itself. It should also be noted that this is a inverting amplifier i.e an increase in signal strength increases the current through the emitter circuit and it means an increase in the collector current. This leads to more voltage drop across RC and hence the voltage at the collector has to drop! and not increase. The +ve phase of the input signal appears as a -ve phase in the output 4

waveform and viceversa. Without transistor terminals CE between R E and RC this kind of a voltage change is not possible at the collector. If only RE and RC were connected in series and a current had to increase the voltage drop across RE would increase and not decrease. It is the voltage stored across the CE terminals that makes the voltage at the collector to decrease even though the current through the emitter resistance itself has increased and hence the voltage dropped across it has also increased. The voltage stored across CE terminals takes care to provide the additional drops to both R E and RC. Ironically the effect of increase of current through RC is that it demands extra voltage drop across it and this is against increasing voltage drop across RE. On also the other hand more the current drop through across RE it! itself Both has increased store. When a signal voltage VS is present it should be noticed that this extra voltage is directly dropped across the BE junction. Due to the presence of large capacitor CE(~100F)in parallel with the emitter resistance RE voltage changes across RE||CE are not possible for the same reasons as previously discussed in the case of C i. Hence the only place where this extra voltage VS can be accomodated is the BE junction of the transistor in the closed loop R 2-BE-RE||CE. This in turn means a serious current change in the emitter circuit which is easily handeld by CE by providing it a very low impedance path. Hence this extra current apart from the biasing current that is flowing through R E flows completely through CE facing almost zero resistance in it. This is only possible on short time scales much smaller than R ECE. For example for typical values of RE=1k and CE=100F this time scale is 103x100.10-6 = 0.1s. A signal of 10Hz frequency changes on this time scale. If we could restrict to input signals of frequency atleast greater than 100 times this frequecny i.e >1kHz we can completely neglect the voltage changes across RE||CE happening due to the appearance of signal in the R2-BE-RE||CE loop. We next consider the Eber-Molls equation for the BE current as a function of BE voltage given by, demanding voltage these

increments in voltage drops across RE and RC come from the CE voltage

IE = I S e

V BE VT

= IS e

V BE VT

VS VT

(5)

where VBBE is the quiescent biasing voltage across the BE junction. I S is the transport saturation current having a typical value of 18x10 -15A for BC549. VT = T/11600 is the thermal voltage whose value is normally taken to be 26mV at room temperature of 300K. Since V S is on the order of ~mV it is sufficiently small compared to V T. This invites for an approximation which after absorbing the first exponential term in (5) into IS' can be written as,
VS VT

IE = I S ' e

= I S '1

VS VT

(6)

IS' is the quiescient emitter current IE. The changes in the emitter current IE as a function of signal voltage VS can be written as, VS VT

IE = IS '

(7)

Since almost all of the emitter current flows to the collector, IE also flows to the collector to produce an voltage drop of this differential current IERC across RC. For the example considered with IE = 4.3mA and VS = 1mV we see that IE = 4.3x10-3x1/26 = 165A. Suppose RC = 1k then this would produce a voltage change of 165mV across R C i.e a voltage gain of ~165!. The dc blocking capacitor C C is normally charged to VCC-IERC and has a value such that the currents flowing through it do not produce any appreciable changes in its voltage on time scales of signal variation for the same reasons as discussed before for Ci and CE. We next calculate the output impedance as seen by the amplified signal from the transistor. For this we consider the collector of the transistor to be a varying voltage source with zero internal resistance. As can be seen the emitter and collector are essentially unconnected, a voltage change across RE cannot directly affect the current through RC unless the current in the emitter IE itself changes. 6

Similarly a voltage change across RC cannot affect the emitter current IE. It is tantamount to saying that the changes in the RC current are due to changes in the collector terminal voltage rather than the changes in the emitter current. As can be seen an increase in the collector current happens when there is a reduction in the collector voltage and a decrease in the collector current happens when there is a increase in the collector voltage. With this model shown in Figure 3 it is easy to calculate the output impedance as seen by the amplified signal VSA. The current iC flowing through the collector resistor RC is given by,
A V CC V C V S B = RC

iC

(8)

while RL is,

the

current

flowing

through the load resistance

VA S iL = RL

(9)

Fig 3: Circuit as seen by the amplified signal voltage VSA.

so the current through the collector ic is the difference of (8) & (9)

ic =

V CC V B V S V S RC RL

(10)

The terms can be rearranged and written as, V V B R RL i c = CC VA C S RC RC RL

C

(11)

The first term is the biasing current which normally flows when the signal VS=0. The extra current is the second term arising due to the amplified signal VSA. It should be noted that the amplified signal sees a -ve dynamic resistance i,e current decreases when the source voltage

increases and current increases when the source voltage decreases. This -ve dynamic resistance is RC and RL connected in parallel as can be infered from the second term of (11). The second term is the current that arises due to the amplified voltage V SA and RC||RL is the output impedance. VA S RC RL /RC RL

i,e.

iS =

(12)

In the derivation of the gain of the amplified signal we have here neglected the emitter resistance of the transistor which is on the order of a few hundred m. Hence the a.c current flowing through C E experiences this. This causes a reduction in the gain of the amplifier which can be ~10%.