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Product Description
Stanford Microdevices SXH-189 amplifier is a high efficiency GaAs Heterojunction Bipolar Transistor (HBT) MMICs housed in low-cost surface-mountable plastic package. These HBT MMICs are fabricated using molecular beam epitaxial growth technology which produces reliable and consistent performance from wafer to wafer and lot to lot. These amplifiers are specially designed for use as driver devices for infrastructure equipment in the 5-2000 MHz cellular, ISM, WLL and narrowband PCS applications. Its high linearity makes it an ideal choice for multi-carrier as well as digital applications.
SXH-189
5-2000 MHz Medium Power GaAsHBT Amplifier
Product Features Patented High Reliability GaAs HBT Technology High 3rd Order Intercept : +39 dBm typ.
at 1960 MHz Surface-Mountable Power Plastic Package
dBm
P1dB Gain(dB)
P1dB
Gain(dB)
850 MHz
1960 MHz
Parameters: Test Conditions: Z0 = 50 Ohms, Ta = 25C Output Power at 1dB Compression Small signal gain Input VSWR Third Order Intercept Point Noise Figure f = 850 MHz f =1960 MHz f = 850 MHz f =1960 MHz f = 850 MHz f =1960 MHz f = 850 MHz f =1960 MHz f = 850 MHz f =1960 MHz V s = 8V Rbias = 27 ohms Vdevice 5V
Units dB m dB m dB dB dB m dB m dB dB mA C/W
Min.
Max.
17.5
Id Rth, j-l
80
100 108
130
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford Microdevices product for use in life-support devices and/or systems. Copyright 2000 Stanford Microdevices, Inc. All worldwide rights reserved.
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EDS-101247 Rev D
850 MHz Application Circuit Data, Icc=110mA, T=+25C, Rbias=27 ohm, Vs=8V
Note: Tuned for Output IP3 P1dB vs Frequency Gain vs. Frequency
25 24
dBm
25 23
25C
dB
23 22 21
-40C
85C
21
25C -40C
19 17 15
85C
20 800
825
850
875
MHz
900
925
950
800
825
850
875
MHz
900
925
950
44
S22
42
dBm
40 38
25C 85C
dB
-40C
S11
S12
36 34 800
850
MHz
900
950
825
850
875
MHz
900
925
950
42 40
dBm Device Current (mA)
38 36 34 0
12
15
4
VS (V)
10
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EDS-101247 Rev D
1960 MHz Application Circuit Data, Icc=110mA, T=+25C, Rbias=27 ohm, Vs=8V
Note: Tuned for Output IP3 P1dB vs Frequency
25 24
dBm
20 18
-40C 85C
dB
23 22 21 20 1930
25C
16
25C
-40C
14
85C
12 10
1940 1950 1960
MHz
1970
1980
1990
1930
1940
1950
1960
MHz
1970
1980
1990
0 -5
S22
43 41
S11
dBm
-10
dB
25C
39
-40C
85C
S12
37 35 1930
1970
1980
1990
1940
1950
1960
MHz
1970
1980
1990
43
Device Current (mA)
41
25C
dBm
39 37 35 33 0 3 6 9
-40C
85C
12
15
4
VS (V)
10
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EDS-101247 Rev D
68pF
33 nH
100 pF SXH-189
100pF
RFin
RFout
100 pF
33nH
33nH
5.6 pF
100pF
5.6pF
SXH-189
68 pF Rbias=4.3
220
2 6
(Rohm) UMZ1N
1 5
1000 pF
4
Vdev 33 nH
*Note: IP3 performance degraded due to lower (4.5V) device voltage.
100 pF
Z=50, 12.9
UMZ1N 0.1 uF
220 68pF
GND VCC
4.3
SXH-189
5.6 pF
RF IN
1
RF OUT
100pF 5.6pF
750
100pF
NOTE: Reference Application Note AN-023 for more information on Active Current Feedback Bias Circuit.
ALL COMPONENTS 0603 UNLESS NOTED OTHERWISE
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EDS-101247 Rev D
Vs
Rbias
22nH
Z=50, 45.5
68pF
RFin
RFout
68pF
22nH
22nH
68pF
68 pF
SXH-189
1.8 pF
SXH-189
1.8pF
22 pF
220
2 6 1
(Rohm) UMZ1N
1000 pF
4 5 3
1.8 K9 7509 68 pF
Z=50, 45.5
68pF
UMZ1N 0.1 uF
220 22pF
VCC
4.3
SXH-189
1.2 pF
RF IN
1
RF OUT
68pF
750 1.2pF
68pF
NOTE: Reference Application Note AN-023 for more information on Active Current Feedback Bias Circuit.
ALL COMPONENTS 0603 UNLESS NOTED OTHERWISE
http://www.stanfordmicro.com
EDS-101247 Rev D
Absolute Maximum
6V 200mA 1500mW 100mW +150C -40C to +85C -65C to +150C
Part Symbolization The part will be symbolized with a XA2 designator on the top surface of the package.
Package Dimensions
Pin Description
Pin # Function
1 2 B a se GND & Emitter Collector GND & Emitter Base pin. Connection to ground. Use via holes to reduce lead inductance. Place vias as close to ground leads as possible. Collector pin. Same as Pin 2
Description
4
XA2
1 2 3
3 4
Recommended via and mounting hole pattern (For RF Ground and Thermal considerations)
Use multiple plated-through vias holes located close to the package pins to ensure a good RF ground connection to a continuous groundplane on the backside of the board.
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EDS-101247 Rev D