CSA REVISION Part 2

SECTION A: MULTIPLE CHOICE QUESTIONS

1.

The Control Unit also contains several 1-bit registers known as ___________. a) flags b) Accumulator c) base register d) none of the above The two's complement of binary number 11001 is a) 00111 b) 00110 c) 11000 d) 11001 A __________ is equal to approximately one million bytes. a) dekabyte (abbreviated DB) b) gigabyte (abbreviated GB) c) kilobyte (abbreviated KB) d) megabyte (abbreviated MB) The physical connection that makes it possible for data transfer in a computer system is called the __________. a) bus b) interface c) register d) control unit The second generation of computers consists of _______________. a) vacuum tubes b) IC chips c) transistors d) firmware The computer component that controls the actions of other components in order to execute instructions (the program) in the correct sequence is / are the __________. a) I/O interface b) Arithmetic Logic Units c) registers d) Control Unit Which of the following is true regarding the computers memory? a) A computers main memory consists of cells, each of which can hold a single value and each row has a single address. b) Static RAM is a technology used in secondary storage devices. c) PROM is an acronym for Presentable Read Only Memory. d) Memory Capacity is the minimum number of addressable memory locations.

2.

3.

4.

5.

6.

7.

8.

One Gigabyte is ________. a) 1024 bytes (kilobyte) b) 1024 x 1024 x 1024 bytes c) 1024 x 1024 x1024 x 1024 bytes d) None of the above The processor, _________ and I/O Devices are interconnected by means of a common bus. a) Cache Memory b) Auxiliary Memory c) Virtual Memory d) Main Memory What is the purpose of the program counter in Computer systems? a) Hold numbers to add and subtract. b) Hold the address of the current instruction being executed. c) Suspend a processing. d) Initiate thrashing. I/O devices are connected to the CPU through ___________. a) a control line b) the control unit c) an I/O module d) a parity bit

9.

10.

11.

CSA REVISION Part 2

SECTION B: SUBJECTIVE QUESTIONS 1. 2. What is Pipelining? Suppose you wish to send a block of data to a magnet tape for storage using DMA (Direct Memory Access). What FOUR (4) data must be sent to the tape controller before the DMA transfer can take place? Describe Hit ratio in cache memory. Discuss any FOUR (4) memory addressing modes. Explain the registers below: i) PC ii) IR iii) MAR iv) MDR Define program interrupt. What happens when an interrupt take place? How are these interrupts handled? Explain different types of the interrupts. What does CPU after detecting an interrupt signal? What are the main phases of instruction cycle? Explain the function status Register. Define machine language.

3. 4. 5.

6. 7. 8. 9. 10.