An Insight Comparison of Serial Communication Protocols

1,2

Gaurav Khurana1, Umesh Goyal2 Electronics and Electrical Communication Department, PEC University of Technology, Chandigarh, India.

Abstract An Embedded system consists of a large number of integrated circuits. For proper functioning of the system, these Integrated circuits need to communicate with each other. This communication is done using a number of universally accepted protocols as per the system requirement. These protocols include Inter-Integrated Circuit protocol, Serial Peripheral Interface, MOD bus protocol, Controller Area Network bus protocol and others. This paper describes the basics of these protocols and also compares them with the help of some performance parameters like speed, data rate, error handling. Index Terms Modbus, CAN bus, CANopen, I2C, SPI

Fig. 1 bit transfer on I2C bus

I. INTRODUCTION Any Embedded system is generally consisting of one or more micro-processors or micro-controller and a number of peripherals ICs like EEPROM, RTC, watchdog timer and sensors etc. For proper functioning of the system, these ICs need to communicate with microcontroller. Serial communication is preferred for this inter-IC communication because of obvious reason of simplicity, low cost and minimum requirement of I/O pins. Many serial communication protocols like RS-232/RS-485, I2C, SPI, Modbus and CAN bus etc. compete for use in embedded systems. All these protocol has their own advantages and limitations and selection of a particular protocol for an application needs an insight comparison of all available options, so this paper compares some of the popular serial communication protocols and highlights their features and specifications which can make the selection task easier. After the brief introduction of each protocol, this paper will compare these protocols. II. PROTOCOL OVERVIEW A. I2C I2C stands for Inter-Integrated Circuit. I2C is a synchronous master/slave protocol that allows a master device to initiate communication with a slave device. I2C is a two wire (DATA (SDA) and Clock (SCL)) bidirectional communication protocol and Clock is generated by the master to control the data transfer but slow slaves may hold the clock pins low to prevent the data transfer. This is done by a device that has become too busy to accept more data. I2C works by having a pull-up resistor on the line and only devices pull the line low during communication. When the bus is free, both lines are HIGH.

The data on the SDA line must be stable during the HIGH period of the SCL line. The state of the data line can only change when SCL line is LOW.

Fig. 2 START and STOP conditions

HIGH to LOW transition on the SDA line while SCL is HIGH is START condition and LOW to HIGH transition on the SDA line while SCL is HIGH is STOP condition. START and STOP conditions are always generated by the master. The bus is considered to be busy after the START condition. The bus is considered to be free again a certain time after the STOP condition. Data transfer on SDA line as bytes of 8 bit long each. Data is transferred with the most significant bit (MSB) first and each byte has to be followed by an acknowledge bit. There no restriction on the number of bytes transmitted per transfer. Acknowledge is transferred during the 9th clock pulse and during this clock pulse, transmitter releases the SDA line HIGH then receiver must pull down the SDA line to indicate the positive acknowledgement.

transmits a HIGH level, while another master is transmitting a LOW level will switch off its DATA output stage because the level on the bus doesnt correspond to its own level.

Fig. 3 Acknowledgement of I2C bus

When a slave doesnt acknowledge the slave address (for example, its unable to receive or transmit because its performing some real-time function), the data line must be left HIGH by the slave. The master can then generate either a STOP condition to abort the transfer, or a repeated START condition to start a new transfer.

Fig. 6 Arbitration process in I2C Bus

B. SPI C. MOD bus Modbus is a serial communications protocol published by Modicon in 1979. MODBUS Protocol defines a standard message structure with universal recognition and usage regardless of the type of networks over which any two devices communicate. It is a master-slave communication protocol. It describes the process a master uses to request an access to slave, and how the slave will respond to these requests, and how errors will be detected and reported. Master can initiate transactions (called queries) and slave respond by supplying the requested data to the master, or by taking the action requested in the query. The master can address individual slaves, or can initiate a broadcast message to all slaves. Slaves return a message (called a response) to queries that are addressed to them individually. Responses are not returned to broadcast queries from the master. Masters query consists of slave device (or broadcast) address, a function code defining the requested action, any data to be sent, and an error checking field. The slaves response contains fields confirming the action taken, any data to be returned, and an errorchecking field. If the slave makes a normal response, the function code in the response is an echo of the function code in the query. If an error occurred in receipt of the message, or if the slave is unable to perform the requested action, the slave will construct an error message by modifying the function code (set the MSB of function code) to indicate that the response is an error response, and the data bytes contain a code that describes the error.

Fig. 4 Data transfer on I2C bus

I2C is a multi-master protocol and all the masters are capable of generating their clocks so there is a need of clock synchronization and arbitration. Clock synchronization is performed using the wired-AND connection of I2C interfaces to the SCL line.

Fig. 5 Clock Synchronization

The SCL line will be held LOW by the device with the longest LOW period. Devices with shorter LOW periods enter a HIGH wait-state during this time. A master may start a transfer only if the bus is free. Two or more masters may generate a START condition simultaneously then arbitration take place on the SDA line while SCL line is at HIGH level. If first master which

Modbus protocol can be established in two kinds of transmission mode: ASCII mode or RTU mode. In ASCII mode, each 8bit byte in a message is sent as two ASCII characters. In RTU mode, each 8bit byte in a message contains two 4bit hexadecimal characters. The main advantage of RTU mode is that its greater character density allows better data throughput than ASCII for the same baud rate. Modbus protocol has the parity check, besides, the ASCII mode uses the LRC check, and the RTU mode uses 16 CRC check. D. CAN bus The CAN bus was developed by German automotive system supplier Robert Bosch in mid-1980s for automotive applications in automobile systems. CAN is an International Standardization Organization (ISO) defined serial communications bus originally developed for the automotive industry to replace the complex wiring harness with a twowire bus. The specification calls for high immunity to electrical interference and the ability to self-diagnose and repair data errors. These features have led to cans popularity in a variety of industries including building automation, medical, and manufacturing. The can communications protocol, iso-11898, describes how information is passed between devices on a network and conforms to the open systems interconnection (OSI) model that is defined in terms of layers. Actual communication between devices connected by the physical medium is defined by the physical layer of the model. The ISO 11898 architecture defines the lowest two layers of the seven layer OSI/ISO model as the data-link layer and physical layer in figure 1.

period of inactivity before attempting to send a message. CD+AMP mean that collisions are resolved through a bitwise arbitration, based on a pre-programmed priority of each message in the identifier field of a message. The higher priority identifier always wins bus access, that is, the last logic-high in the identifier keeps on transmitting because it is the highest priority. For can, the dominant bit is logic 0 and recessive bit is logic 1.

Fig. 4 Arbitration on a CAN Bus

A CANopen device can be logically structured in three parts. One part provides the CAN interface and another part provides the device's application, which controls e.g. the Input/output (I/O) lines of the device in case of an I/O module. The interface between the application and the CAN-interface is implemented in the object dictionary. The object dictionary is unique for any CANopen device. It is comparable to a parameter list and offers the access to the supported configuration- and process data. To gain access to the object dictionary, each CANopen device has to implement a CANopen protocol stack. This CANopen protocol stack is software, which is usually implemented on the same microcontroller that is used by the device's application software.

Fig. 1 The layered ISO standard 11898 architecture

The CAN communication protocol is a carrier-sense, multiple-access protocol with collision detection and arbitration on message priority (CSMA/CD+AMP). CSMA means that each node on a bus must wait for a prescribed

Fig. 2 Internal Device Structure

III. COMPARISON OF SERIAL PROTOCOLS The protocols described above are compared with each other and the following points have been noted. This comparison between different serial protocols helps us in choosing the best protocol as per the requirement of our application.
TABLE I COMPARISON TABLE

Device Addressing

Parameter
Standardizati on Standardizati on Organization Architecture

I2C
Not Applicable Philips Semiconduct or Master-slave architecture semaphore/t hread architecture SingleMaster or MultiMaster bus 2-wire connection:SDA, SCL

SPI
Not Applicable Motorola

MODbus
Not Applicable Modicon Inc. Application layer messaging protocol

CAN bus
ISO11898: 2003 BOSCH interprise s MasterSlave Architect ure Single Master or MultiMaster bus Configuratio n parameters required

Each device has a unique 7-bit or 10bit address

No Slave addressing

Checksum ensures proper endto-end communicat ion Addresses field contains two characters (ASCII mode) or 8 bits (RTU mode) Valid address in range 1-247 Address 0 used for broadcast Baud rate Mode ASCII or RTU Parity mode CRC

standard 11-bit identified extended 29-bit identifier

Master-slave architecture Single Master

Signalling rate upto 3.4Mbps

several mbits/sec data rates

signaling rates from 125 kbps to 1 Mbps CRC, Bit stuffing, ACK , and others

Physical layer

4-wire connection:SDI, SDO, SCLK, SS

Balanced mode of Transmissio n RS 232 serial interface Implementat ion Peer to peer Communicat ion TCP/IP over Ethernet Two types of message frames are used: ASCII mode and RTU mode Does not give time stamped events. We have sequence of events (without time but not event list with time. Does not provide polled report by exception

2-wire connectio n:CANH, CANL

Error detection

CRC

Performance

Lowest

CRC, no acknowledge ment or flow control mechanisms are provided More than I2C

More

Highest

REFERENCES
[1] I2C Protocol Design for Reusability, Zheng-wei Hu , Information Processing (ISIP), 2010 Third International Symposium on Digital Object Identifier: 10.1109/ISIP.2010.51 Publication Year: 2010 , Page(s): 83- 86. Personal digital assistant (PDA) based I2C bus analysis, Bruce, J. W. , Gray, Matthew Alan ; Follett, Randolph F. Consumer Electronics, IEEE Transactions on Volume: 49 , Issue: 4 Digital Object Identifier: 10.1109/TCE.2003.1261257 Publication Year: 2003 , Page(s): 1482 - 1487. Improvement of I2C Bus and RS-232 Serial Port under Complex Electromagnetic Environment Chai Yan-jie ; Sun Ji-yin ; Gao Jing ; Tao Ling-jiao ; Ji Jing ; Bao Fei-hu Computer Science and Software Engineering, 2008 International Conference on Volume:4 Digital Object Identifier: 10.1109/CSSE.2008.843 Publication Year: 2008 , Page(s): 178- 181

Data layer

link

Three Modes of operation: Standard, Fast, High Speed

Two types of data formats: Standard CAN, Extended CAN

[2]

[3]

Application layer

Umesh Goyal, born on 18 July 1990 at Moga, Punjab, India. He is currently pursuing Masters in Engineering in Electronics Engineering from PEC University of Technology, Chandigarh, India. His Masters in Engineering will be completed by June, 2013. He has completed his Bachelors of Technology in Electronics and Communication Engineering from Chitkara Institute of Engineering & Technology, Punjab, India in year-2011. The major field of his work is related to Electronic Embedded Systems, Digital Signal Processing, System Design.