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Page 1

Introduction

In mathematics a combination is an unordered set, which is a formal way to say that nobody cares which order the items came in. Most games work this way, if you rolled dice one at a time and get a 2 followed by a 3 it is the same as if you had rolled a 3 followed by a 2. The same idea goes with the Combinational Logic Circuits. Combinational Logic Circuits as shown in figure (1), are made up from basic logic NAND, NOR or NOT gates that are "combined" or connected together to produce more complicated switching circuits. These logic gates are the building blocks of combinational logic circuits. An example of a combinational circuit is a decoder, which converts the binary code data present at its input into a number of different output lines, one at a time producing an equivalent decimal code at its output. The outputs of Combinational Logic Circuits are only determined by the logical function of their current input state, logic "0" or logic "1", at any given instant in time as they have no feedback, and any changes to the signals being applied to their inputs will immediately have an effect at the output. In other words, in a Combinational Logic Circuits, the output is dependent at all times on the combination of its inputs and if one of its inputs condition changes state so does the output as combinational circuits have "no memory", "timing" or "feedback loops". Combinational logic circuits can be very simple or very complicated and any combinational circuit can be implemented with only NAND and NOR gates as these are classed as "universal" gates. The three main ways of specifying the function of a combinational logic circuit are: 1. Boolean Algebra This forms the algebraic expression showing the operation of the logic circuit for each input variable either True or False that results in a logic "1" output. 2. Truth Table A truth table defines the function of a logic gate by providing a concise list that shows all the output states in tabular form for each possible combination of input variable that the gate could encounter. 3. Logic Diagram This is a graphical representation of a logic circuit that shows the wiring and connections of each individual logic gate, represented by a specific graphical symbol that implements the logic circuit.

Figure (1)

Page 2

1. Half adder

An adder is a digital circuit that performs addition of numbers. In many computers and other kinds of processors, adders are used not only in the arithmetic logic unit(s), but also in other parts of the processor, where they are used to calculate addresses, table indices, and similar operations. Although adders can be constructed for many numerical representations, such as binary-coded decimal or excess-3, the most common adders operate on binary numbers. In cases where two's complement or ones' complement is being used to represent negative numbers, it is trivial to modify an adder into an adder subtract or. Other signed number representations require a more complex adder. Half adder is a combinational arithmetic circuit that adds two numbers and produces a sum bit (S) and carry bit (C) as the output. If A and B are the input bits, then sum bit (S) is the X-OR of A and B and the carry bit (C) will be the AND of A and B. From this it is clear that a half adder circuit can be easily constructed using one X-OR gate and one AND gate. Half adder is the simplest of all adder circuit, but it has a major disadvantage. The half adder can add only two input bits (A and B) and has nothing to do with the carry if there is any in the input. So if the input to a half adder have a carry, then it will be neglected it and adds only the A and B bits. That means the binary addition process is not complete and thats why it is called a half adder. With the addition of an OR gate to combine their carry outputs, two half adders can be combined to make a full adder. The truth table, schematic representation and XOR//AND realization of a half adder are shown in the figure (2) below.

Figure (2)

Page 3

Half-adders and full adders are the building blocks used in digital computer, automatic data processing, information, information, and control systems and circuits, including electronic and optical integrated circuits. A disadvantage of half-adder is that in multi-digit addition we have to add two bits along with the carry of previous digit addition. Such addition requires addition of 3 bits. This is not possible in half-adders.

NAND gates or NOR gates can be used for realizing the half adder in universal logic and the relevant circuit diagrams are shown in the figures (3) (4) below.

Figure (3)

Figure (4)

Page 4

2. Full adder

The binary adder circuit is an important building block of digital arithmetic circuits. A full adder adds binary numbers and accounts for values carried in as well as out. We can design such a circuit by making a table listing the outputs for all possible input combinations. Note that in each column there is a sum bit which is put at the bottom and a carry bit that is taken to the next column. So we need to specify two output bits for each input combination. A full adder can be constructed from two half adders by connecting A and B to the input of one half adder, connecting the sum from that to an input to the second adder, connecting Ci to the other input and OR the two carry outputs. Equivalently, S could be made the three-bit XOR of A, B, and Ci, andCout could be made the three-bit majority function of A, B, and Ci A one-bit full adder as shown in figure(5), adds three onebit numbers, often written as A,B, and Cin; A and B are the operands, and Cin is a bit carried in from the next less significant stage. The full-adder is usually a component in a cascade of adders, which add 8, 16, 32, etc. binary numbers. The circuit produces a two-bit output, output carry and sum typically represented by the signals Cout and S.

Figure (5)

In this implementation, the final OR gate before the carry-out output may be replaced by an XOR gate without altering the resulting logic. Using only two types of gates is convenient if the circuit is being implemented using simple IC chips which contain only one gate type per chip. . When full adder logic is designed we will be able to string eight of them together to create a byte-wide adder and cascade the carry bit from one adder to the next. From the truth-table, figure (6), the full adder logic can be implemented. We can see that the output S is an EXOR between the input A and the half-adder SUM output with B and CIN inputs. We must also note that the Cout will only be true if any of the two inputs out of the three are HIGH.

Figure (6)

Page 5

Thus, we can implement a full adder circuit with the help of two half adder circuits. The first will half adder will be used to add A and B to produce a partial Sum. The second half adder logic can be used to add CIN to the Sum produced by the first half adder to get the final S output. If any of the half adder logic produces a carry, there will be an output carry. Thus, COUT will be an OR function of the half-adder Carry outputs. Take a look at the implementation of the full adder circuit shown below in figure (7).

Figure (7)

We can add two bits together taking a carry from the next lower order of magnitude, and sending a carry to the next higher order of magnitude. In a computer, for a multi-bit operation, each bit must be represented by a full adder and must be added simultaneously. Thus, to add two 8-bit numbers, you will need 8 full adders which can be formed by cascading two of the 4-bit blocks. The addition of two 4-bit numbers is shown below.

Figure (7)

Page 6

3. Decoder

Decoders are simply a collection of logic gates which are arranged in a specific way so as to breakdown any combination of inputs to a set of terms that are all set to '0' apart from one term. Therefore when one input changes, two output terms will change. Note that these terms are "minterms", remembering that minters use a variable once, and once only. It is a circuit that changes a code into a set of signals. It is called a decoder because it does the reverse of encoding, but we will begin our study of encoders and decoders with decoders because they are simpler to design. A full decoder is a very useful device in computer circuits. You can use it for the AND plane in your own logic circuits, and just leave unconnected the outputs you do not need. In digital electronics, a decoder can take the form of a multiple-input, multipleoutput logic circuit that converts coded inputs into coded outputs, where the input and output codes are different. e.g. n-to-2n, binary-coded decimal decoders. Enable inputs must be on for the decoder to function, otherwise its outputs assume a single "disabled" output code word. The example decoder circuit would be an AND gate because the output of an AND gate is "High"(0) only when all its inputs are "High." Such output is called as "active High output". If instead of AND gate, the NAND gate is connected the output will be "Low" (0) only when all its inputs are "High". Such output is called as "active low output". File:Decoder Example.svg A slightly more complex decoder would be the n-to-2n type binary decoders. These type of decoders are combinational circuits that convert binary information from 'n' coded inputs to a maximum of 2n unique outputs. We say a maximum of 2n outputs because in case the 'n' bit coded information has unused bit combinations, the decoder may have less than 2n outputs. We can have 2-to4 decoder, 3-to-8 decoder or 4-to-16 decoder. We can form a 3-to-8 decoder from two 2to-4 decoders (with enable signals). Combine two or more small decoders with enable inputs to form a larger decoder e.g. 3to-8-line decoder constructed from two 2-to-4-line decoders. Decoder with enable input can function as demultiplexer. It uses all AND gates, and therefore, the outputs are active- high. For active- low outputs, NAND gates are used. It has 3 input lines and 8 output lines. It is also called as binary to octal decoder it takes a 3-bit binary input code and activates one of the 8(octal) outputs corresponding to that code.

Page 7

Two simple decoders that detect the presence of the binary code 0011 are shown. The first has an active HIGH output; the second has an active LOW output:

Decoder circuit would be an AND gate because the output of an AND gate is "High" (1) only when all its inputs are "High." Such output is called as "active High output"

Figure (8)

Figure 8

The NAND gate is connected the output will be "Low" (0) only when all its inputs are "High". Such output is called as "active low output".

Figure (9)

Figure (9)

Page 8

The 74HC154 decoder includes two active LOW chip select lines which must be at the active level to enable the outputs. These lines can be used to expand the decoder to larger inputs.

Figure (10)

A 1 A 2 A

3

CS 1 CS

Figure (10)

The 74HC42 decoder accepts a binary coded decimal input and activates one of ten possible decimal digit indications.

Figure (11)

Figure (11)

Page 9

4. Encoder

A Digital Encoder more commonly called a Binary Encoder takes ALL its data inputs one at a time and then converts them into a single encoded output. So we can say that a binary encoder is a multi-input combinational logic circuit that converts the logic level "1" data at its inputs into an equivalent binary code at its output. Generally, digital encoders produce outputs of 2-bit, 3-bit or 4-bit codes depending upon the number of data input lines. An "n-bit" binary encoder has 2n input lines and nbit output lines with common types that include 4-to-2, 8-to-3 and 16-to-4 line configurations. The output lines of a digital encoder generate the binary equivalent of the input line whose value is equal to "1" and are available to encode either a decimal or hexadecimal input pattern to typically a binary or B.C.D. output code. An encoding circuit must accept data from a large number of input lines and convert it to data on a smaller number of output lines (not necessarily just one).

1

A0 A1 A2 A3

Figure (12)

2 3

4 5 6 7 8

The decimal to BCD is an encoder with an input for each of the ten decimal digits and four outputs that represent the BCD code for the active digit. The basic logic diagram is shown in figure (12). There is no zero input because the outputs are all LOW when the input is zero. One of the main disadvantages of standard digital encoders is that they can generate the wrong output code when there is more than one input present at logic level "1". For example, if we make inputs D1and D2 HIGH at logic "1" both at the same time, the resulting output is neither at "01" or at "10" but will be at "11" which is an output binary Page 10

number that is different to the actual input present. Also, an output code of all logic "0"s can be generated when all of its inputs are at "0" OR when input D0 is equal to one.

One simple way to overcome this problem is to "Prioritise" the level of each input pin and if there was more than one input at logic level "1" the actual output code would only correspond to the input with the highest designated priority. Then this type of digital encoder is known commonly as a Priority Encoder or P-encoder for short. Allocating a priority level to each input. The priority encoders output corresponds to the currently active input which has the highest priority. So when an input with a higher priority is present, all other inputs with a lower priority will be ignored.

Example of an IC encoder:

VCC

Decimal input

BCD Output

This 74HC147 IC encoder device offers additional flexibility in that it is a priority encoder. This means that if more than one input is active, the one with the highest order decimal digit will be active. Figure (13)

GND

Figure (13)

Priority encoders can be used to reduce the number of wires needed in a particular circuits or application that has multiple inputs. For example, assume that a microcomputer needs to read the 104 keys of a standard QWERTY keyboard where only one key would be pressed either "HIGH" or "LOW" at any one time. One way would be to connect all 104 wires from the keys directly to the computer but this would be impractical for a small home PC, but another better way would be to use a priority encoder.

Page 11

Conclusion

As a conclusion, the main important in combinational logic circuits is that it always depends on input where the output is a pure function of the present input only. Standard combinational circuits available in MSI, standard cells in complex VLSI circuits i.e. Adders, Decoders, Encoders, Multiplexers and Demultiplexers. A half adder is a logical circuit that performs an addition operation on two binary digits. The half adder produces a sum and a carry value which are both binary digits. A full adder is a logical circuit that performs an addition operation on three binary digits. The full adder produces a sum and carries value, which are both binary digits. It can be combined with other full adders or work on its own. A decoder is a logic circuit looks at its inputs, determines which binary number is present there, and activates the one output that corresponds to that number; all other outputs remain inactive. An encoder is a combinational logic circuit that accepts an active level on one of its inputs, representing digit, such as a decimal or octal digits, and converts it to a coded output such as BCD or binary.

Page 12

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Page 13

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