EE 3CL4, 9 1 / 31 Tim Davidson Frequency Domain Approach to Compensator Design Lead Compensators Lag Compensators

EE3CL4: Introduction to Linear Control Systems

Section 9: Design of Lead and Lag Compensators using Frequency Domain Techniques

Tim Davidson
McMaster University

Winter 2013

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Outline

1 Frequency Domain Approach to Compensator Design

2 Lead

Compensators

3 Lag

Compensators

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Frequency domain analysis

Analyze closed loop using open loop transfer function

L(s) = Gc (s)G(s)H (s).

Nyquists stability criterion Gain margin: |L(j1 x )| , where x is

the frequency at which L(j ) reaches 180 the frequency at which |L(j )| equals 1

Phase margin, pm : 180 + L(j c ), where c is Damping ratio: pm = f ( ), Settling time related to the bandwidth of the loop

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Bode diagram

L(j ) =

1 j (1 + j )(1 + j /5)

Gain margin 15 dB Phase margin 43

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Compensators and Bode diagram

We have seen the importance of phase margin If G(s ) does not have the desired margin,

how should we choose Gc (s) so that L(s) = Gc (s)G(s) does?

To begin, how does Gc (s ) affect the Bode diagram Magnitude:

20 log10 |Gc (j )G(j )| = 20 log10 (|Gc (j )| + 20 log10 |G(j )|

Phase:

Gc (j )G(j ) = Gc (j ) + G(j )

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Lead Compensators
(s+z ) Gc (s ) = Kcs +p , with |z | < |p |, alternatively,
c 1+s Gc (s ) = K 1+s , where p = 1/ and = p /z > 1 Bode diagram:

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Lead Compensation
What will lead compensation, do? Phase is positive: might be able to increase phase

margin pm
Slope is positive: might be able to increase the

cross-over frequency, c , (and the bandwidth)

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Lead Compensation

c 1+s Gc (s ) = K 1+s By making the denom. real, can show that

Gc (j ) = atan

(1) 1+( )2

1 Max. occurs when = m = = Max. phase angle satises tan(m ) =

zp
1 2

1 Equivalently, sin(m ) = +1 At = m , we have |Gc (j m )| = Kc /

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Bode Design Principles

Set the loop gain so that desired steady-state error

constants are obtained Insert the compensator to modify the transient properties:
Damping: through phase margin Response time: through bandwidth

Compensate for the attenuation of the lead network, if

appropriate To maximize impact of phase lead, want peak of phase near c of the compensated open loop

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Design Guidelines
1

3 4 5

7 8 9

For uncompensated (i.e., proportionally controlled) closed loop, set gain Kp so that steady-state error constants of the closed loop meet specications Evaluate the phase margin, and the amount of phase lead required. Add a little safety margin to the amount of phase lead 1 From this, determine using sin(m ) = +1 Determine the frequency at which open-loop frequency response has magnitude 10 log10 () If we set m to be this frequency, then m will be the cut-off frequency of the compensated loop, and hence we will have maximum phase contribution to the compensated closed loop at the appropriate frequency Choose = 1/(m ) and hence p = m . Choose z = p/. Set Kc = Kp . Compensator: Gc (s) =
Kc (s+z ) s +p .

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Example
Type 1 plant of order 2: G(s ) = s(s5 +2) Design goals: Steady-state error due to a ramp input less than 5% of velocity of ramp Phase margin at least 45 (implies a damping ratio) Steady state error requirement implies Kv = 20. For prop. controlled Type 1 plant: Kv = lims0 sKp G(s ).

Hence Kp = 8.
To nd phase margin of prop. controlled loop we need

to nd c , where |Kp G(j c )| =

6.2rad/s

40 j c (j c +2)

=1

Kp G(j c ) = 90 atan(/2) Hence pm, prop = 18

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Example
pm, prop = 18 . Hence, need 27 of phase lead Lets go for a little more, say 30 So, want peak phase of lead comp. to be 30
1 Solving +1 = sin(30 ) yields = 3 Since 10 log10 (3) = 4.8 dB we should choose m to be

where 20 log10

40 j m (j m +2)

= 4.8 dB

Solving this equations yields m = 8.4rad/s Therefore z = m / = 4.8, p = z = 14.4,

Kc = 3 8
(s+4.8) Gc (s ) = 24 s+14.4 120(s+4.8) Gc (s )G(s ) = s(s +2)(s+14.4) , actual pm = 43.6 Goal can be achieved by using a larger target for

additional phase, e.g., = 3.5

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Bode Diagram

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Step Response

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Ramp Response

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Ramp Response, detail

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Lag Compensators
Gc (s ) = Gc (s ) = >1 We will consider case where Kc = Bode diagrams of lag compensators for two different s
Kc (s+z ) s+p , with |p | < |z |, alternatively, Kc 1+s 1+s , where z = 1/ and = z /p

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What will lag compensation do?

Since zero and pole are typically close to the origin,

phase lag aspect is not really used. What is useful is the attenuation above = 1/ : gain is 20 log10 (), with little phase lag Can reduce cross-over frequency, c , without adding much phase lag Tends to reduce bandwidth

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Qualitative example

Uncompensated system has small phase margin Phase lag of compensator does not play a large role Attenuation of compensator does:

c reduced by about a factor of a bit more than 3 Increased phase margin is due to the natural phase characteristic of the plant

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Lag Compensation

+s Gc (s ) = 11 +s Attenuation above = 1/ is 20 log10 ();

i.e., gain is 20 log10 ()

Phase lag above = 1/ is small

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Bode Design Principles

For lag compensators:

Set the loop gain so that desired steady-state error

constants are obtained Insert the compensator to modify the phase margin:
Do this by reducing the cross-over frequency Observe the impact on response time

Basic principle: Set attenuation to reduce c far enough so that uncompensated open loop has desired phase margin

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Design Guidelines
1

2 3

For uncompensated (i.e., proportionally controlled) closed loop, set gain Kp so that steady-state error constants of the closed loop meet specications Obtain the Bode diagram, evaluate the phase margin. If that is insufcient. . . Determine c , the frequency at which the uncompensated open loop has a phase margin equal to the desired phase margin plus 5 . Now design a lag compensator so that the gain of the compensated open loop at this frequency is 0 dB
Place the zero of the compensator around c /10 to

ensure we get almost full attenuation by the compensator at c Choose so that 20 log10 () is the attenuation needed to reduce the gain of the uncompensated closed loop at c to 0 dB Place the pole at p = z / (s+z ) Choose Kc = Kp /, and hence Gc (s ) = Kcs +p

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Example, same set up as lead design

Type 1 plant of order 2: G(s ) = s(s5 +2) Design goals: Steady-state error due to a ramp input less than 5% of velocity of ramp Phase margin at least 45 (implies a damping ratio) Steady state error requirement implies Kv = 20. For prop. controlled Type 1 plant: Kv = lims0 sKp G(s ).

Hence Kp = 8.
To nd phase margin of prop. controlled loop we need

to nd c , where |Kp G(j c )| =

6.2rad/s

40 j c (j c +2)

=1

Kp G(j c ) = 90 atan(/2) Hence pm, prop = 18

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Example

Since want phase margin to be 45 , we set c such that G(j c ) = 180 + 45 + 5 = 130 . = c 1.5 Required attenuation is 20 dB. Actual curves are around 2 dB lower than the straight line approximation shown Hence = 10. Zero set to be one decade below c ; Pole is z / = 0.015 Gain is Kc = Kp / = 0.8 Hence Gc (s) =
0.8(s+0.15) s+0.015

z = 0.15

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Example: Compd open loop

4(s+0.15) Compensated open loop: Gc (s )G(s ) = s(s+ 2)(s+0.015) Numerical evaluation: new c = 1.58 new phase margin = 46.8 By design, Kv remains 20

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Step Response

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Ramp Response

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Ramp Response, detail