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545 (1)

Sec. 11.1

Fundamental Concepts

545

We may call !p1 the input pole to indicate that it arises in the input network. Similarly, the output pole is given by

!p2 = R 1C : (11.16) D L Since the low-frequency gain of the circuit is equal to gm RD , we can readily write the magnij j ,

tude of the transfer function as:

gm RD Vout = q : Vin 2 1 + ! 2 ! 2  1 + !2 =!p p2 1

(11.17)

Exercise
If !p1

= !p2 , at what frequency does the gain drop by 3 dB?

Compute the poles of the circuit shown in Fig. 11.11. Assume  = 0.

VDD RD Vout RS M1 Vb CL

Example 11.9

V in

C in

Figure 11.11 .

With Vin = 0, the small-signal resistance seen at the source of yielding a pole at

Solution

M1 is given by RS 1=gm,
jj

1 : !p1 =  RS g1 Cin m
jj

(11.18)

The output pole is given by !p2

= RD CL ,1 .
RD such that the output pole frequency is ten times the input

Exercise
How do we choose the value of pole frequency?

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548 (1)

548

Chap. 11

Frequency Response

proportional charge. By contrast, if CF were not a oating capacitor and its right plate voltage did not change, it would experience only a voltage change of V and require less charge. The above study points to the utility of Millers theorem for conversion of oating capacitors to grounded capacitors. The following example demonstrates this principle.

Estimate the poles of the circuit shown in Fig. 11.15(a). Assume 

VDD RD CF V in RS M1 Vout V in RS

Example 11.10

= 0.
VDD RD Vout M1 C in C out

(a)

(b)

Figure 11.15

Noting that M1 and RD constitute an inverting amplier having a gain of ,gm RD , we utilize the results in Fig. 11.14(b) to write:

Solution

Cin = 1 + A0 CF = 1 + gmRD CF

and

(11.29) (11.30)

 CF ; Cout = 1 + g 1 m RD
!in = R 1 S Cin

(11.31)

thereby arriving at the topology depicted in Fig. 11.15(b). From our study in Example 11.8, we have: (11.32) (11.33)

= RS 1 + g1mRD CF

and

!out = R 1 D Cout =  11 : RD 1 + g R CF
m D

(11.34) (11.35)

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550 (1)

550

Chap. 11

Frequency Response

Plotted in Fig. 11.16(b), the response exhibits a roll-off as the frequency of operation falls below 1=R1 C1 . As seen from Eq. (11.37), this roll-off arises because the zero of the transfer function occurs at the origin. The low-frequency roll-off may prove undesirable. The following example illustrates this point.

Example 11.11
Figure 11.17 depicts a source follower used in a high-quality audio amplier. Here,
VDD V in Ci Ri M1 Vout I1 CL

estab-

Figure 11.17

lishes a gate bias voltage equal to VDD for M1 , and I1 denes the drain bias current. Assume  = 0; gm = 1=200 , and R1 = 100 k . Determine the minimum required value of C1 and the maximum tolerable value of CL . Similar to the high-pass lter of Fig. 11.16, the input network consisting of Ri and Ci attenuates the signal at low frequencies. To ensure that audio components as low as 20 Hz experience a small attenuation, we set the corner frequency 1=Ri Ci  to 2  20 Hz, thus obtaining

Solution

C = 79:6 nF:
i

(11.39)

This value is, of course, much to large to be integrated on a chip. Since Eq. (11.38) reveals a 3-dB attenuation at ! = 1=Ri Ci , in practice we must choose even a larger capacitor if a lower attenuation is desired. The load capacitance creates a pole at the output node, lowering the gain at high frequencies. Setting the pole frequency to the upper end of the audio range, 20 kHz, and recognizing that the resistance seen from the output node to ground is equal to 1=gm , we have

!
and hence

p;out

g =C = 2  20 kHz;
m L

(11.40) (11.41)

C = 39:8 nF:
L

(11.42)

An efcient driver, the source follower can tolerate a very large load capacitance (for the audio band).

Exercise

Repeat the above example if I1 and the width of M1 are halved.

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563 (1)

Sec. 11.4

Frequency Response of CE and CS Stages

563

(The Miller approximation fails to predict this zero.) Since CXY (i.e., the base-collector or the gate-drain overlap capacitance) is relatively small, the zero typically appears at very high frequencies and hence is unimportant.12 As expected, the system contains two poles given by the values of s that force the denominator to zero. We can solve the quadratic as2 + bs + 1 = 0 to determine the poles but the results provide little insight. Instead, we rst make an interesting observation in regards to the quadratic denominator: if the poles are given by !p1 and !p2 , we can write

  as2 + bs + 1 = !s + 1 !s + 1 p1 p2  1 2 1 s = ! ! + ! + ! s + 1: p1 p2 p1 p2

(11.74) (11.75)

Now suppose one pole is much farther from the origin than the other: !p2 !p1 . (This is called the dominant pole approximation to emphasize that !p1 dominates the frequency response). ,1 + !,1  !,1 , i.e., Then, !p 1 p2 p1

b = !1 ;
p1
and from (11.72),
j

(11.76)

!p1 = 1 + g R C R + R1 C + R C + C  : m L XY Thev Thev in L XY out

j

(11.77)

How does this result compare with that obtained using the Miller approximation? Equation (11.77) does reveal the Miller effect of CXY but it also contains the additional term RL CXY + Cout  [which is close to the output time constant predicted by (11.59)]. To determine the nondominant pole, !p2 , we recognize from (11.75) and (11.76) that
j

b !p2 = a
j

(11.78)

RL CXY RThev + RThev Cin + RLCXY + Cout  : = 1 + gm R R C C + C C + C C 

Thev L in XY out XY in out

(11.79)

Example 11.17
Using the dominant-pole approximation, compute the poles of the circuit shown in Fig. 11.31(a). Assume both transistors operate in saturation and  6= 0. Noting that CSB 1 , CGS 2 , and CSB 2 do not affect the circuit (why?), we add the remaining capacitances as depicted in Fig. 11.31(b), simplifying the result as illustrated in Fig. 11.31(c), where

Solution

Cin = CGS1 CXY = CGD1 Cout = CDB1 + CGD2 + CDB2 :

(11.80) (11.81) (11.82)

12 As explained in more advanced courses, this zero does become problematic in the internal circuitry of op amps.

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564 (1)

564
C SB2 M2 VDD Vb V in RS M1 M2 Vout V in RS M1 C GS1 C DB1 C GD2 C GD1 C DB2

Chap. 11

Frequency Response

Vout V in RS

C XY Vout M1 C in C out r O1 r O2

(a)

(b)

(c)

Figure 11.31

It follows from (11.77) and (11.79) that

!p1 !p2


1 1 + gm1rO1 rO2  CXY RS + RS Cin + rO1 rO2 CXY + Cout  1 + gm1rO1 rO2  CXY RS + RS Cin + rO1 rO2 CXY + Cout  : RS rO1 rO2 Cin CXY + Cout CXY + Cin Cout 
jj jj jj jj jj

(11.83) (11.84)

Exercise
Repeat the above example if  6

= 0. = 200 =2 = 250 = 80

Example 11.18

In the CS stage of Fig. 11.29(a), we have RS ; CGS fF, CGD fF, ,1 ;  CDB fF; gm ; and RL k . Plot the frequency response with the aid of (a) Millers approximation, (b) the exact transfer function, (c) the dominant-pole approximation.

= 100

= 150 

=0

Solution
(a) With gm RL

= 13:3, Eqs. (11.58) and (11.59) yield

j j

!p;in j

!p;out j

= 2 571 MHz = 2 428 MHz:

  

(11.85) (11.86)

(b) The transfer function in Eq. (11.70) gives a zero at gm =CGD a :  ,20 s,2 and b :  ,10 s. Thus,

= 2 12 10

= 6 39 10
j j

= 2 13:3 GHz). Also,

(11.87) (11.88)

!p1 j !p2 j

= 2 264 MHz = 2 4:53 GHz:

 

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568 (1)

568

Chap. 11

Frequency Response

where CY = C + CCS or CGD + CDB . It is interesting to note that the input pole magnitude is on the order of the fT of the transistor: CX is equal to C or roughly equal to CGS while the resistance seen to ground is less than 1=gm. For this reason, the input pole of the CB/CG stage rarely creates a speed bottleneck.15 Compute the poles of the circuit shown in Fig. 11.36(a). Assume  = 0.
C SB2 VDD M2 Vout RS M1 Vb V in RS Y M1 Vb VDD M2 Vout C DB1 + C GD1 + C GS2 + C DB2

Example 11.19

V in

X C SB1 + C GS1

(a)

(b)

Figure 11.36

Noting that CGD2 and CSB 2 play no role in the circuit, we add the device capacitances as depicted in Fig. 11.36(b). The input pole is thus given by
j

Solution

1 !p;X =  : 1 CSB1 + CGD1  RS g m1

j jj

(11.98)

Since the small-signal resistance at the output node is equal to 1=gm2 , we have
j

1 : !p;Y = 1  C DB 1 + CGD1 + CGS 2 + CDB 2  gm2

j

(11.99)

Exercise
Repeat the above example if constant voltage.

M2 operates as a current source, i.e., its gate is connected to a

The CS stage of Example 11.18 is recongured to a common-gate amplier (with RS tied to the source of the transistor). Plot the frequency response of the circuit.
15 One exception is encountered in radio-frequency circuits (e.g., cellphones), where the input capacitance becomes undesirable.

Example 11.20

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572 (1)

572

Chap. 11

Frequency Response

With the values chosen here, the poles are complex. Figure 11.40 plots the frequency response. The ,3-dB bandwidth is approximately equal to 3.5 GHz.
0 Magnitude of Frequency Response (dB) 2 4 6 8 10 12 14 6 10

10

10 Frequency (Hz)

10

10

10

Figure 11.40

Exercise

For what value of gm do the two poles become real and equal?

Example 11.22
Determine the transfer function of the source follower shown in Fig. 11.41(a), where M2 acts as a current source.
C GD1 VDD M1 Vout Vb M2
(a)

VDD C DB1 Vout C DB2 + C SB1 C SB2

V in

RS

V in

RS C GS1

X Y C GD2

M1

Vb C GS2

M2
(b)

Figure 11.41

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573 (1)

Sec. 11.6

Frequency Response of Followers

573

Noting that CGS 2 and CSB 2 play no role in the circuit, we include the transistor capacitances as illustrated in Fig. 11.41(b). The result resembles that in Fig. 11.38, but with CGD2 and CDB 2 appearing in parallel with CSB 1 . Thus, (11.109) can be rewritten as

Solution

CGS1 Vout s = 1 + gm1 s ; Vin as2 + bs + 1

where

(11.116)

RS C C + C + C C + C + C  a= g GD1 GS1 GD1 GS1 SB1 GD2 DB2 b = RS CGD1 + CGD1 + CSB1g+ CGD2 + CDB2 :
m1 m1

(11.117) (11.118)

Exercise

Assuming M1 and M2 are identical and using the transistor parameters given in Example 11.18, calculate the pole frequencies.

11.6.1 Input and Output Impedances In Chapter 5, we observed that the input resistance of the emitter follower is given by r +  + 1RL , where RL denotes the load resistance. Also, in Chapter 7, we noted that the source follower input resistance approaches innity at low frequencies. We now employ an approximate but intuitive analysis to obtain the input capacitance of followers. Consider the circuits shown in Fig. 11.42, where C and CGS appear between the input and output and can therefore be decomposed using Millers theorem. Since the low-frequency gain is equal to
C X C XY = C Y RL
(a)

VCC

C GD X C XY = C GS Y RL
(b)

VDD C DB

Q1

M1

CL

C L+ C SB

Figure 11.42 Input impedance of (a) emitter follower and (b) source follower.

Av =

RL + g1

RL

(11.119)

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574 (1)

574

Chap. 11

Frequency Response

we note that the input component of C or CGS is expressed as

CX = 1 Av CXY
,

= 1 + g R CXY : m L

(11.120) (11.121)

Interestingly, the input capacitance of the follower contains only a fraction of C or CGS , depending on how large gm RL is. Of course, C or CGD directly adds to this value to yield the total input capacitance. Estimate the input capacitance of the follower shown in Fig. 11.43. Assume  6= 0.
VDD V in Vb M1

Example 11.23

M2

Figure 11.43

Solution
From Chapter 7, the low-frequency gain of the circuit can be written as

Av = CGS1 , thereby providing

rO 1 rO 2 : r O 1 rO 2 + g 1
jj jj

(11.122)

m1

Also, from Fig. 11.42(b), the capacitance appearing between the input and output is equal to

For example, if gm1 rO1 jj

CGS1 : = CGD1 + 1 + g 1 m1 rO1 rO2  rO2  10, then only 9 of CGS1 appears at the input.
jj 

Cin = CGD1 + 1 Av CGS1

,

(11.123) (11.124)

Exercise

Repeat the above example if  = 0.

Let us now turn our attention to the output impedance of followers. Our study of the emitter follower in Chapter 5 revealed that the output resistance is equal to RS = +1+1=gm. Similarly, Chapter 7 indicated an output resistance of 1=gm for the source follower. At high frequencies, these circuits display an interesting behavior. Consider the followers depicted in Fig. 11.44(a), where other capacitances and resistances are neglected for the sake of simplicity. As usual, RS represents the output resistance of a preceding stage or device. We rst compute the output impedance of the emitter follower and subsequently

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576 (1)

576

Chap. 11

Frequency Response

than RS .17 Thus, the inductive behavior is more commonly encountered. ( It is even possible that the inductive output impedance leads to oscillation if the follower sees a certain amount of load capacitance.) The above development can be extended to source followers by factoring r from the numerator and denominator of (11.128) and letting r and approach innity:

for the source follower in Fig. 11.46, displaying a similar behavior.

Z out
1 gm

VX = RS CGS s + 1 ; (11.129) IX CGS s + gm where  + 1=r is replaced with gm , and C with CGD . The plots of Fig. 11.45 are redrawn
Z out RS
1 gm (b)

RS

(a)

Figure 11.46 Output impedance of source follower as a function of frequency for (a) small large RS .

RS and (b)

The inductive impedance seen at the output of followers proves useful in the realization of active inductors.

Example 11.24
Figure 11.47 depicts a two-stage amplier consisting of a CS circuit and a source follower. Assuming  6= 0 for M1 and M2 but  = 0 for M3 , and neglecting all capacitances except CGS3 , compute the output impedance of the amplier.
VDD Vb V in M2 M3 M1 Vout Z out
(a) (b)

VDD r O1 r O2 M3

Figure 11.47

Solution
The source impedance seen by the follower is equal to the output resistance of the CS stage, which is equal to rO1 jjrO2 . Assuming RS = rO1 jjrO2 in (11.129), we have

VX = rO1 rO2 CGS3 s + 1 : IX CGS3 s + gm3

jj

(11.130)

17 If the follower output resistance is greater than

RS , then it is better to omit the follower!

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579 (1)

Sec. 11.7

Frequency Response of Cascode Stage

VDD RL Vout Vb V in C GS1 + C GD1 (1+ RS g m1 g m2 X Y M1 C GS2 + C GD1 (1+ g m2 ) + C DB1 + C SB2 g m1 M2 C GD2 + C DB2

579

Figure 11.50 MOS cascode including transistor capacitances.

We note that !p;Y is still in the range of fT =2 if CGS 2 and CDB 1 comparable.

+ 1 + gm2=gm1 CGD1 are

Example 11.25
The CS stage studied in Example 11.18 is converted to a cascode topology. Assuming the two transistors are identical, estimate the poles, plot the frequency response, and compare the results with those of Example 11.18. Assume CDB = CSB .

Solution
Using the values given in Example 11.18, we write from Eqs. (11.138) (11.139), and (11.140):

Note that the pole at node Y the Miller approximation results obtained in Example 11.18, the input pole has risen considerably. Compared with the exact values derived in that example, the cascode bandwidth (442 MHz) is nearly twice as large. Figure 11.51 plots the frequency response of the cascode stage.

= 2 1:95 GHz (11.141) !p;Y = 2 1:73 GHz (11.142) !p;out = 2 442 MHz: (11.143) is quite lower than fT =2 in this particular example. Compared with
j

!p;X j

Exercise
Repeat the above example if the width of M2 and hence all of its capacitances are doubled. Assume gm2 = 100 ,1 .

Example 11.26
In the cascode shown in Fig. 11.52, transistor M3 serves as a constant current source, allowing M1 to carry a larger current than M2 . Estimate the poles of the circuit, assuming  = 0.

Solution
Transistor M3 contributes CGD3 and CDB 3 to node Y , thus lowering the corresponding pole magnitude. The circuit contains the following poles:
j

!p;X j

RS CGS 1 +

g m1 1+ g
m2

(11.144)
CGD1

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580 (1)

580

Chap. 11

Frequency Response

30 Magnitude of Frequency Response (dB)

20

10

10

20

30 6 10

10

10 Frequency (Hz)

10

10

10

Figure 11.51
VDD V b2 M3 V b1 RS X RL Vout M2 Y M1

V in

Figure 11.52 .

!p;Y j

= 1

!p;out j

= R C 1 + C  : L DB 2 GD2

gm2

CDB 1

+ CGS2 + 1 +

gm2 gm1

CGD1

+ CGD3 + CDB3

(11.145)

(11.146)

Note that !p;X also reduces in magnitude because the addition of M3 lowers ID2 and hence gm2 .

Exercise
Calculate the pole frequencies in the above example using the transistor parameters given in Example 11.18 for M1 -M3 .

From our studies of the cascode topology in Chapter 9 and in this chapter, we identify two important, distinct attributes of this circuit: (1) the ability to provide a high output impedance and

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581 (1)

Sec. 11.8

Frequency Response of Differential Pairs

581

hence serve as a good current source and/or high-gain amplier; (2) the reduction of Miller effect and hence better high-frequency performance. Both of these properties are exploited extensively. 11.7.1 Input and Output Impedances The foregoing analysis of the cascode stage readily provides estimates for the I/O impedances. From Fig. 11.49, the input impedance of the bipolar cascode is given by

Zin = r1 jj

1 C 1 + 2 C 1 s ;
 

(11.147)

where Zin does not include RS . The output impedance is equal to

Zout = RL jj C +1C s ; 2 CS 2 Zin =

(11.148)

where the Early effect is neglected. Similarly, for the MOS stage shown in Fig. 11.50, we have

 1g C 1+ 1+ g 1 C
GS m

Zout = R C + C  ; L GD 2 DB 2

m2

GD 1 s

(11.149)

(11.150)

where it is assumed  = 0 If RL is large, the output resistance of the transistors must be taken into account. This calculation is beyond the scope of this book.

11.8 Frequency Response of Differential Pairs

The half-circuit concept introduced in Chapter 10 can also be applied to the high-frequency model of differential pairs, thus reducing the circuit to those studied above. Figure 11.53(a) depicts two bipolar and MOS differential pairs along with their capacitances. For small differential inputs, the half circuits can be constructed as shown in Fig. 11.53(b). The transfer function is therefore given by (11.70):

CX Y s , gm RL Vout VT hev s = as2 + bs + 1 ;

(11.151)

where the same notation is used for various parameters. Similarly, the input and output impedances (from each node to ground) are equal to those in (11.91) and (11.92), respectively.

Example 11.27
A differential pair employs cascode devices to lower the Miller effect [Fig. 11.54(a)]. Estimate the poles of the circuit.

Solution
Employing the half circuit shown in Fig. 11.54(b), we utilize the results obtained in Section 11.7:
j

!p;X j =

1 g R C 1+ 1+ 1 C g
S GS m m3

(11.152)

GD 1

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582 (1)

582
VCC RC C CS1 C 1 V in1 RS C 2 Q1 Q2 I EE
(a)

Chap. 11

Frequency Response
VDD

RC C CS2 C 2 RS C 1 V in2 V in1 RS C GS1 C SB1

RD C DB1 C GD1

RD C DB2 C GD2 RS V in2

M1

M2 I SS

C GS2 C SB2

VCC RC C 1 V in1 RS C 2 Q1 Vout1 C CS1 V in1 RS C GS1 M1 RD C GD1

VDD

C DB1 C SB1

(b)

Figure 11.53 (a) Bipolar and MOS differential pairs including transistor capacitances, (b) half circuits.
VDD RD M3 Vb V in1 RS M1 M2 I SS
(a)

VDD RD Vout Vb M3 Y M1 g m1 g m3
)

RD Vout M4 RS Vin2 V in C GS1 + C GD1 (1+ RS

C GD3 + C DB3

C GS3 + C GD1 (1+

(b)

g m3 ) + C DB1 + C SB3 g m1

Figure 11.54

!p;Y j

= 1

!p;out j

1 gm3 CDB 1 + CGS 3 + 1 + CGD1 gm3 gm1 = R C 1 + C  : L DB 3 GD3

(11.153)

(11.154)

Exercise

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583 (1)

Sec. 11.8

Frequency Response of Differential Pairs

583

Calculate the pole frequencies using the transistor parameters given in Example 11.18 Assume the width and hence the capacitances of 3 are twice those of 1 . Also, m3 = 2 m1 .

pg

11.8.1 Common-Mode Frequency Response The CM response studied in Chapter 10 included no transistor capacitances. At high frequencies, capacitances may raise the CM gain (and lower the differential gain), thus degrading the common-mode rejection ratio. Let us consider the MOS differential pair shown in Fig. 11.55(a), where a nite capacitance
VDD RD V out1 M1 V CM I EE P M2 R D + R D Vout2
CM Gain g m R D

RD
2 R SS + 1 gm 1 R SS C SS 2 gm C SS

R SS

C SS

(a) (b) Figure 11.55 (a) Differential pair with parasitic capacitance at the tail node, (b) CM frequency response.

appears between node and ground. Since SS shunts SS , we expect the total impedance between and ground to fall at high frequencies, leading toa higher CM gain. In fact, we can simply replace SS with SS 1  SS  in Eq. (10.186):

R jj = C s
RD
Vout (11.155)
VCM = 1 + 2RSS jj 1  gm CSS s RD RSS CSS + 1 : = Rgm
(11.156) C SS SS s + 2gmRSS + 1 Since RSS is typically quite large, 2gm RSS 1, yielding the following zero and pole frequencies:

j!z j = R 1C

SS SS 2 g j!pj = C m ; SS

(11.157) (11.158)

and the Bode approximation plotted in Fig. 11.55(b). The CM gain indeed rises dramatically at high frequenciesby a factor of 2 m SS (why?). Figure 11.56 depicts the transistor capacitances that constitute SS . For example, 3 is typically a wide device so that it can operate with a small DS , thereby adding large capacitances to node .

gR

 This section can be skipped in a rst reading.

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585 (1)

Sec. 11.9

Additional Examples

585

and, therefore,
IC 2 VCC VBE 2 =R = + RE B2 = 1:13 mA;
,

(11.162) (11.163)

,1 where it is assumed VBE 2  mV. Iteration yields IC 2 : mA. Thus, gm2 : and r2 : k . Let us now consider the rst stage by itself. Capacitor C1 forms a high-pass lter along with the input resistance of the circuit, Rin1 , thus attenuating low frequencies. Since Rin1 r2 jjRB 1 , the low-frequency cut-off of this stage is equal to

= 2 22

800

= 1 17

= 22 2 

!L1

1 = r R  1 B 1 C 1 = 2 542 Hz:
jj 

(11.164) (11.165)

The second coupling capacitor also creates a high-pass response along with the input resistance RB 2 jj r2 RE . To compute the cut-off frequency, we of the second stage, Rin2 construct the simplied interface shown in Fig. 11.57(b) and determine VY =I1 . In this case, it is simpler to replace I1 and RC with a Thevenin equivalent, Fig. 11.57(c), where VThev ,I1 RC . We now have

+  + 1

VThev

VY

s =

RC

; + Rin2 + C1 2s

Rin2

(11.166)

obtaining a pole at
!L2

= R C + 1 Rin2 C2 =  22:9 Hz:



(11.167) (11.168)

Since !L2 !L1 , we conclude that !L1 dominates the low-frequency response, i.e., the gain drops by 3 dB at !L1 .

Exercise

Repeat the above example if RE

= 500

Example 11.29
The circuit of Fig. 11.58(a) is an example of ampliers realized in integrated circuits. It consists of a degenerated stage and a self-biased stage, with moderate values for C1 and C2 . Assuming M1 and M2 are identical and have the same parameters as those given in Example 11.18, plot the frequency response of the amplier.

Solution

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586 (1)

586

Chap. 11

Frequency Response

ac GND

VDD R D1 V in RS
200 1 k

C2
10 pF

R D2 RF
10 k

1 k

R D1 v in RS
200

1 k

Vout M2

R D2 RF
10 k

1 k

v out M2

M1 R S1 C1

M1 R in2
ac GND (b)

50 pF

200 (a)

R D1 C GD1 V in RS C GS1 M1

R D2 RF X C GD2

R D1 R in2 Vout V in RS C GS1 M1 C DB1 + C GS2 + (1 A v2 ) C GD2 C GD1 VX

C DB1

M2 C GS2

C DB2

(c)

(d)

Figure 11.58 .

Low-Frequency Behavior We begin with the low-frequency region and rst consider the role of C1 . From Eq. (11.55) and Fig. 11.28(c), we note that C1 contributes a low-frequency cut-off at
1 RS 1 + 1 !L1 = gmR C

= 2  42:4 MHz:

S1

(11.169) (11.170)

previous example, the reader can show that

A second low-frequency cut-off is contributed by C2 and the input resistance of the second stage, Rin2 . This resistance can be calculated with the aid of Millers theorem: RF ; Rin2 = 1 , (11.171) Av2 where Av2 denotes the voltage gain from X to the output. Since RF RD2 , we have Av2  ,gm2RD2 = ,6:67,19, obtaining Rin2 = 1:30 k . Using an analysis similar to that in the

!L2 = R

1 + D1 Rin2 C2 = 2  6:92 MHz:

(11.172) (11.173)

19 With this estimate of the gain, we can express the Miller effect of R at the output as R =1 , A,1   8:7 k , F F v2 place this resistance in parallel with RL2 , and write Av 2 = gm2 RL2 jj8:7 = ,5:98. But we continue without this iteration for simplicity.

BR

Wiley/Razavi/Fundamentals of Microelectronics

[Razavi.cls v. 2006]

June 30, 2007 at 13:42

587 (1)

Sec. 11.9

Additional Examples

587

Since !L1 remains well above !L2 , the cut-off is dominated by the former.

C1 and C2 act as a short circuit and the transistor capacitances play a negligible role, allowing the circuit to be reduced to that in Fig. 11.58(b). We note that vout =vin = vX =vin vout =vX  and recognize that the drain of M1 sees two resistances to ac ground: RD1 and Rin2 . That is, vX vin = gm1RD1 Rin2  = 3:77:
, jj ,

Midband Behavior In the next step, we compute the midband gain. At midband frequencies,

(11.174) (11.175)

The voltage gain from node X to the output is approximately equal to ,gm2 RD2 because RF RD2 .20 The overall midband gain is therefore roughly equal to 25.1. High-Frequency Behavior To study the response of the amplier at high frequencies, we insert the transistor capacitances, noting that CSB 1 and CSB 2 play no role because the source terminals of M1 and M2 are at ac ground. We thus arrive at the simplied topology shown in Fig. 11.58(c), where the overall transfer function is given by Vout =Vin = VX =Vin Vout =VX . How do we compute VX =Vin in the presence of the loading of the second stage? The two capacitances CDB 1 and CGS 2 are in parallel, but how about the effect of RF and CGD2 ? We apply Millers approximation to both components so as to convert them to grounded elements. The Miller effect of RF was calculated above to be equivalent to Rin2 = 1:3 k . The Miller multiplication of CGD2 is given by 1 , Av2 CGD2 = 614 fF. The rst stage can now be drawn as illustrated in Fig. 11.58(d), lending itself to the CS analysis performed in Section 11.4. The zero is given by gm1 =CGD1 = 2  13:3 GHz. The two poles can be calculated from Eqs. (11.70), (11.71), and (11.72):
j j

!p1 = 2 308 MHz !p2 = 2 2:15 GHz:

j j  

(11.176) (11.177)

The second stage contributes a pole at its output node. The Miller effect of CGD2 at the output 1 is expressed as 1 , A, v2 CGD2  1:15CGD2 = 92 fF. Adding CDB 2 to this value yields the output pole as
j

!p3 = R 1:15C 1 + C  L2 GD2 DB 2 = 2 1:21 GHz:

j 

(11.178) (11.179)

We observe that !p1 dominates the high-frequency response. Figure 11.59 plots the overall response. The midband gain is about 26 dB  20, around 20% lower than the calculated result. This is primarily due to the use of Miller approximation for RF . Also, the useful bandwidth can be dened from the lower ,3-dB cut-off ( 40 MHz) to the upper ,3-dB cut-off ( 300 MHz) and is almost one decade wide. The gain falls to unity at about 2.3 GHz.

20 If not, then the circuit must be solved using a complete small-signal equivalent.

BR

Wiley/Razavi/Fundamentals of Microelectronics

[Razavi.cls v. 2006]

June 30, 2007 at 13:42

588 (1)

588

Chap. 11

Frequency Response

30 Magnitude of Frequency Response (dB)

20

10

10

20

30 6 10

10

10 Frequency (Hz)

10

10

10

Figure 11.59

11.10 Chapter Summary

The speed of circuits is limited by various capacitances that the transistors and other components contribute to each node. The speed can be studied in the time domain (e.g., by applying a step) or in the frequency domain (e.g., by applying a sinusoid). The frequency response of a circuit corresponds to the latter test. As the frequency of operation increases, capacitances exhibit a lower impedance, reducing the gain. The gain thus rolls off at high signal frequencies. To obtain the frequency response, we must derive the transfer function of the circuit. The magnitude of the transfer function indicates how the gain varies with frequency. Bodes rules approximate the frequency response if the poles and zeros are known. A capacitance tied between the input and output of an inverting amplier appears at the input with a factor equal to one minus the gain of the amplier. This is called Miller effect. In many circuits, it is possible to associate a pole with each node, i.e., calculate the pole frequency as the inverse of the product of the capacitance and resistance seen between the node and ac ground. Millers theorem allows a oating impedance to be decomposed into to grounded impedances. Owing to coupling or degeneration capacitors, the frequeny response may also exhibit rolloff as the frequency falls to very low values. Bipolar and MOS transistors contain capacitances between their terminals and from some terminals to ac ground. When solving a circuit, these capacitances must be identied and the resulting circuit simplied. The CE and CS stages exhibit a second-order transfer function and hence two poles. Millers approximation indicates an input pole that embodies Miller multiplication of the basecollector or gate-drain capacitance.