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Texas Instruments Incorporated

High-Performance Analog Products

Analog Applications Journal


First Quarter, 2010

Copyright 2010 Texas Instruments

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Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DLP Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID RF/IF and ZigBee Solutions amplifier.ti.com dataconverter.ti.com www.dlp.com dsp.ti.com www.ti.com/clocks interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com www.ti-rfid.com www.ti.com/lprf Applications Audio Automotive Communications and Telecom Computers and Peripherals Consumer Electronics Energy Industrial Medical Security Space, Avionics and Defense Video and Imaging Wireless www.ti.com/audio www.ti.com/automotive www.ti.com/communications www.ti.com/computers www.ti.com/consumer-apps www.ti.com/energy www.ti.com/industrial www.ti.com/medical www.ti.com/security www.ti.com/space-avionics-defense www.ti.com/video www.ti.com/wireless

Mailing Address:  Texas Instruments Post Office Box 655303 Dallas, Texas 75265 2 High-Performance Analog Products www.ti.com/aaj 1Q 2010 Analog Applications Journal

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Power Management


Fuel-gauging considerations in battery backup storage systems. . . . . . . . . . . . . . . . . . 5
Fuel gauges with TIs Impedance Track technology have the ability to learn and accurately track battery capacity as cells age without fully discharging the battery. This article discusses different techniques for completing a proper learning cycle in backup applications. Also included is a case study of an aged battery packs changes in capacity and impedance.

Contents

Li-ion battery-charger solutions for JEITA compliance. . . . . . . . . . . . . . . . . . . . . . . . . . . 8


Lithium-ion batteries tend to become dangerous when they are overcharged at high temperatures, but much progress has been made in establishing industry standards that address this problem. This article discusses the JEITA safety guidelines and presents battery-charger solutions that meet these guidelines in notebook and single-cell handheld applications.

Power-supply design for high-speed ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12


Recent advances in data-converter design and process technology allow newer ADCs to be driven directly from a switching power supply for maximum power efficiency. For this article, ADCs based on high-performance-BiCOM technology and low-power-CMOS technology were investigated for susceptibility to noise. The results demonstrate that TIs high-speed ADCs can be powered directly from a switching regulator without noticeably degrading the ADCs performance.

Amplifiers: Op Amps

Operational amplifier gain stability, Part 1: General system analysis . . . . . . . . . . . . . . 20


The goal of this three-part series is to provide a more in-depth understanding of gain error and how it can be influenced by the actual op amp parameters in a typical closed-loop configuration. This first article explores general feedback control system analysis and synthesis as they apply to first-order transfer functions. This analysis is then used to calculate the transfer functions of both noninverting and inverting op amp circuits. The signal output from a piezoelectric sensor presents several unique problems for designers. This article focuses on the sensing of a group of physical magnitudesacceleration, vibration, shock, and pressurethat from the perspective of the sensor and its required signal conditioning can be considered similar. This article analyzes a classical charge amplifier that can be used in a signalconditioning circuit. In-depth analysis of noise sources in the circuit and the results of their simulation are provided. Several other practical considerations are also discussed, including the benefits of using differential inputs.

Signal conditioning for piezoelectric sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Interfacing op amps to high-speed DACs, Part 3: Current-sourcing DACs simplified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32


This article series is about using high-speed DACs in applications that require DC coupling. This article, Part 3, discusses interfacing a current-sourcing DAC and an op amp by using a simpler approach than that presented in Part 2, along with the associated trade-offs. Spreadsheet calculation tools are provided along with a TINA-TI SPICE model to show how to implement the design methodology.

Index of Articles. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 TI Worldwide Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

To view past issues of the Analog Applications Journal, visit the Web site www.ti.com/aaj

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Introduction
Analog Applications Journal is a collection of analog application articles designed to give readers a basic understanding of TI products and to provide simple but practical examples for typical applications. Written not only for design engineers but also for engineering managers, technicians, system designers and marketing and sales personnel, the book emphasizes general application concepts over lengthy mathematical analyses. These applications are not intended as how-to instructions for specific circuits but as examples of how devices could be used to solve specific design requirements. Readers will find tutorial information as well as practical engineering solutions on components from the following categories: Power Management Amplifiers: Op Amps Where applicable, readers will also find software routines and program structures. Finally, Analog Applications Journal includes helpful hints and rules of thumb to guide readers in preparing for their design.

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Fuel-gauging considerations in battery backup storage systems


By Keith James Keller
Analog Field Applications
Accurate fuel gauging in battery backup systems requires WinZip directory online (or click Save to download the special considerations. Using Texas Instruments (TI) WinZip file for offline use). Then open the file: battery fuel gauges with Impedance Track technology chemistry_specific_Qmax_disqv_voltages_table.xls offers the distinct advantage of not requiring a full disTable 1 shows an excerpt from this file. As the table charge of the pack for learning as the cells age. This article shows, if the chemical ID is 0100, then Qmax-update voltage discusses different implementations and techniques for measurements are not allowed between 3737 and 3800 mV completing a proper learning cycle in backup applications. due to the flatness of the voltage profile at this SOC. This Additionally, a case study of an aged battery packs changdisqualified voltage range is based on measuring the cells es in capacity and impedance is reviewed. relaxed voltage after a rest period of at least an hour. TIs Impedance Track algorithm uses voltage, current, Impedance measurements and updates will happen during and impedance measurements of the cells to accurately discharge with a load of greater than C/10. (A C rate is calculate a battery packs remaining capacity and run time. based on the cells capacity. If a 3s2p pack has a design Proper selection of a cells specific chemistry is required capacity of 4400 mAh, then the C/10 discharge rate is for the most accurate gauging. As of this writing, there are 440 mA. In this case, a safe discharge rate would be six distinct classes of chemistries, with several options 500 mA.) within each class. To store varying resistances at different SOC values, In determining a battery backup systems cell aging over 15 grid points are used. Once one grid point has been time, the major concerns are (1) the maximum chemical recalcu lated, all subsequent grid points may be modified capacity (Qmax) of the cell, specified in milliampere-hours accordingly. A discharge needs to exceed 500 seconds to (mAh), and (2) the actual measured impedance of the avoid transient effects and distortion of resistance values. cells (R_a table values), which will determine true run time based on loading and temperature. How to initiate a Qmax learning cycle Most notably, high temperatures will adversely impact TI provides evaluation software that shows the status Qmax and the internal cell impedances. Charging and storand allows controlling parameters of an Impedance Track ing the cells at a lower voltage (between 3.9 and 4.1 V for gas gauge (see Related Web Sites). After confirming that standard 4.2-V cells) will increase their lifetime at the the battery voltage is outside the disqualified range, a expense of shorter run times. RESET command can be sent to the gauge that will set Older gas-gauging technologies require a complete the R_DIS bit and clear the VOK bit. When a proper OCV discharge of the cells to update capacity information. measurement has been completed by the gauge, the R_DIS Impedance Track technology eliminates this full-discharge bit will be cleared. Now battery charging or discharging requirement and instead uses two relaxed-voltage measure can be started which will set the VOK bit in a few seconds. ment points to update Qmax. In the default firmware, these With the firmware set for a shallow SOC change of 10%, voltage measurements are typically performed before and allow the charge/discharge to change the SOC by at least after the battery state of charge (SOC) has changed by 15%. After stopping the charge/discharge cycle, allow the about 40%. With modified firmware from TI, this SOC cells to relax (up to 5 hours in a deeply depleted state) range can be decreased to as low as 10% for a shallow outside the disqualified voltage range. The VOK bit should discharge. Decreasing the SOC range for the Qmax update clear, which is the indication that a second valid OCV will affect gauging accuracy; the more SOC range used, measurement has been taken and a Qmax update has been the better. completed successfully. The two relaxed-voltage meaTable 1. Disqualified Qmax-update voltage ranges based on cell chemistry surements need to be taken in a Description Chemical ID Vqdis_min Vqdis_max SOC_min, % SOC_max, % qualified voltage range based on the cell chemistry. For more infor- LiCoO2/graphitized carbon 0100 3737 3800 26 54 mation, please review Reference 1. (default) To see an Excel file with disquali- Mixed Co/Ni/Mn cathode 0101 3749 3796 28 51 fied Qmax-update voltage ranges Mixed Co/Mn cathode 0102 3672 3696 6 14 based on cell chemistry, go to LiCoO2/carbon 2 0103 3737 3800 26 54 http://www.ti.com/lit/zip/slua372 Mixed Co/Mn cathode 2 0104 4031 4062 77 88 and click Open to view the
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The following two examples describe different system implementations for battery backup systems.

Figure 1. Changes in cell impedance over time


1600 1400 1200 Cell0 Impedance Measured Before Discharge Cell0 Impedance Measured After Discharge

Example 1: Passive discharge of cells


In this configuration, the active current of the gas-gauge chipset (~375 A) can be used to discharge the batteries over an extended period of time. Depending on the capacity of the pack, this could be several months. Keeping the gauge continuously in active mode is programmable by set ting the SLEEP bit in the Operation Cfg A register to 0. Another option is to assert the /PRES GPI with the non-removable bit (NR = 0) set in the Operation Cfg B dataflash register. With firmware modified for a shallow discharge such as 20% for a Qmax update, the pack can be allowed to discharge down to 75% of its capacity over time and can then be charged back up to full capacity. The Qmax param eter will be updated accordingly. Note that only the Qmax values, not the cell impedances (R_a table values), will be updated during this type of cycling. It is assumed that a rest period of several hours is allowed at the end of charge for the second relaxed-voltage measurement.

Cell Impedance (m)

1000 800 600 400 200 0 0 20

40 60 Cell State of Charge, SOC (%)

80

100

Example 2: Active discharge of cells


In this configuration, a discharge resistor in the system can be used to actively discharge the cells. This could be controlled by a host processor inside the battery packs or externally in the system. As discussed earlier, a discharge current of greater than C/10 for 500 seconds is required for impedance grid-point updates. Even though the 10% minimum discharge requirement applies for a Qmax update, ideally the pack should be discharged through two impedance grid-point updates. These occur during discharge at SOC intervals of approximately 11% (i.e., at 89%, 78%, 63%, 52%, etc.). In this case, discharge from 100% to 75% capacity would be sufficient. If the battery is being stored with the SOC at 80% for longevity reasons, two impedance grid-point updates would happen within a 25% discharge. A proper Qmax update will happen only after two consecutive relaxed-voltage measurements separated by a charge or discharge are taken (assuming that both measurements are outside the disqualified voltage range of the specific chemical ID). Therefore, after the pack is actively discharged to 75% of its capacity, a rest period of several hours is required, depending on the SOC. (Based on cell chemistry, up to 3.5 hours is required for a semicharged state, and up to 5 hours for a fully discharged state.)

self-discharge of these cells is less than 4% per year. A constant resistive load of 3 was used for discharging the packs (equating to a discharge rate of approximately 3.5 A). Changes in Qmax and in the impedance values are respectively shown in Table 2 (on the next page) and Figure 1. On average, Qmax decreased by 3% and the impedances of the cells increased by 35%. Even with these changes in the cells, the accuracy of the initial discharge cycle following the two-year rest period was greater than 99%; specifically, a capacity of 67 mAh was reported when the terminate voltage was reached (67 mAh/8819 Qmax = 0.00761, or an error of 0.761%).

Conclusion
TIs battery fuel gauges with Impedance Track technology provide an extremely accurate estimation of remaining battery capacity. Understanding how the technology works is especially important in designing storage and backup sys tems with long periods of rest. Examples were presented of using passive and active discharge of the pack to update Qmax and cell impedance values. Additionally, discharge results from an aged battery pack were shared to illustrate the concepts and overall accuracy of this technology.

Reference
For more information related to this article, you can down load an Acrobat Reader file at www.ti.com/lit/litnumber and replace litnumber with the TI Lit. # listed below. Document Title TI Lit. # 1. Yevgen Barsukov, Support of Multiple Li-Ion Chemistries With Impedance Track Gas Gauges, Application Report . . . . . . . . . . . . . . . . slua372

Case study
The effects of long-term storage were studied by using a Microsun Technologies 3s4p 8.8-Ah battery pack that had LGDS218650 cells with the bq20z80 chipset produced in June of 2006. The pack was stored at about 45% capacity at room temperature for two years without being cycled. The parameters of interest were changes to Qmax and to the cell impedances, as well as the accuracy of remainingcapacity and time-to-empty calculations. The estimated
6 High-Performance Analog Products

Related Web sites


power.ti.com www.ti.com/sc/device/bq20z95 To download bq evaluation software: www.ti.com/litv/zip/sluc107b

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1Q 2010

Analog Applications Journal

Texas Instruments Incorporated Table 2. Qmax and cell impedance values before and after discharge of a sample pack
Cell Impedance Measurements Before Discharge xCell0 R_a 0 = 93 xCell0 R_a 1 = 102 xCell0 R_a 2 = 112 xCell0 R_a 3 = 117 xCell0 R_a 4 = 103 xCell0 R_a 5 = 102 xCell0 R_a 6 = 112 CELL0 xCell0 R_a 7 = 112 xCell0 R_a 8 = 117 xCell0 R_a 9 = 128 xCell0 R_a 10 = 138 xCell0 R_a 11 = 146 xCell0 R_a 12 = 204 xCell0 R_a 13 = 393 xCell0 R_a 14 = 573 xCell1 R_a 0 = 71 xCell1 R_a 1 = 79 xCell1 R_a 2 = 88 xCell1 R_a 3 = 95 xCell1 R_a 4 = 79 xCell1 R_a 5 = 80 xCell1 R_a 6 = 89 CELL1 xCell1 R_a 7 = 87 xCell1 R_a 8 = 90 xCell1 R_a 9 = 98 xCell1 R_a 10 = 108 xCell1 R_a 11 = 114 xCell1 R_a 12 = 159 xCell1 R_a 13 = 338 xCell1 R_a 14 = 491 xCell2 R_a 0 = 56 xCell2 R_a 1 = 63 xCell2 R_a 2 = 71 xCell2 R_a 3 = 79 xCell2 R_a 4 = 65 xCell2 R_a 5 = 62 xCell2 R_a 6 = 73 CELL2 xCell2 R_a 7 = 69 xCell2 R_a 8 = 73 xCell2 R_a 9 = 82 xCell2 R_a 10 = 89 xCell2 R_a 11 = 93 xCell2 R_a 12 = 134 xCell2 R_a 13 = 323 xCell2 R_a 14 = 475 Cell Impedance Measurements After Discharge Cell0 R_a 0 = 124 Cell0 R_a 1 = 136 Cell0 R_a 2 = 149 Cell0 R_a 3 = 156 Cell0 R_a 4 = 137 Cell0 R_a 5 = 136 Cell0 R_a 6 = 149 Cell0 R_a 7 = 148 Cell0 R_a 8 = 165 Cell0 R_a 9 = 179 Cell0 R_a 10 = 195 Cell0 R_a 11 = 259 Cell0 R_a 12 = 479 Cell0 R_a 13 = 927 Cell0 R_a 14 = 1355 Cell1 R_a 0 = 98 Cell1 R_a 1 = 109 Cell1 R_a 2 = 122 Cell1 R_a 3 = 131 Cell1 R_a 4 = 109 Cell1 R_a 5 = 111 Cell1 R_a 6 = 123 Cell1 R_a 7 = 125 Cell1 R_a 8 = 139 Cell1 R_a 9 = 147 Cell1 R_a 10 = 164 Cell1 R_a 11 = 223 Cell1 R_a 12 = 453 Cell1 R_a 13 = 960 Cell1 R_a 14 = 1397 xCell2 R_a 0 = 83 xCell2 R_a 1 = 93 xCell2 R_a 2 = 105 xCell2 R_a 3 = 117 xCell2 R_a 4 = 96 xCell2 R_a 5 = 92 xCell2 R_a 6 = 108 xCell2 R_a 7 = 108 xCell2 R_a 8 = 118 xCell2 R_a 9 = 127 xCell2 R_a 10 = 145 xCell2 R_a 11 = 211 xCell2 R_a 12 = 304 xCell2 R_a 13 = 734 xCell2 R_a 14 = 1079 9096 9102 9096 Qmax (mAh) Before

Power Management

Qmax (mAh) After

8819

8833

8823

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Li-ion battery-charger solutions for JEITA compliance


By Jinrong Qian
Sector Manager, Battery Charge Management Advanced Portable

Introduction
Lithium-ion (Li-ion) batteries tend to become dangerous when they are overcharged at high temperatures. Safely charging these batteries has become one of the most important design specifications in battery-powered portable equipment. Progress has been made in establishing industry standards such as the Japan Electronics and Information Technology Industries Association (JEITA) guidelines for improving battery-charging safety. This article addresses safety requirements and battery-charger solutions that meet these requirements in both notebook and single-cell handheld applications.

Battery-charger safety and the JEITA guidelines


Widely used in consumer electronics from cell phones to laptops, Li-ion batteries have the highest volumetric and gravimetric energy densities among the rechargeable batteries, with no memory effect. They also have a selfdischarge rate that is 10 times lower than that of NiMH batteries, and they can provide the instant power required by the system; but are they safe? Everyone in the industry has seen pictures of exploding laptops and heard about the massive and unprecedented recalls of Li-ion batteries due to cell safety concerns. Such battery explosions or fires originated within the manufacturing process. Batteries contain several metal parts that can sometimes result in undesirable metal impurities within the cell. These impurities are typically sharp metal shards

from the battery casing or from electrode materials. If these shards get between the batterys electrode and separator, battery cycling in the negative electrode can eventually cause the shards to puncture the separator. This results in a microshort between the positive and negative electrodes, producing high heat that may ultimately result in fire and/or an explosion. High temperatures, fire, and explosions are all results of thermal runawaya condition whereby a battery enters into an uncontrollable reaction. Thermal runaway is a proc ess in which the internal temperature of a battery with LiCoO2 as the cathode material and graphite as the anode material reaches approximately 175C. This is an irreversible and highly exothermic reaction that can cause a fire, usually when the battery is charging. Figure 1 shows the charge current and charge voltage over temperature commonly used in the older Li-ionbattery-charging systems that are prone to thermal runaway. Both the battery charge current and charge voltage are constant over the cell temperature from 0 to 45C. High cell temperatures not only speed up battery aging but also increase the risk of battery failure. To improve the safety of charging Li-ion batteries, JEITA and the Battery Association of Japan released new safety guidelines on April 20, 2007. Their guidelines emphasized the importance of avoiding a high charge current and high charge voltage at certain low and high temperature ranges. According to JEITA, problems in the Li-ion batteries occur at high charge voltages and high cell

Figure 1. Upper-limit charge current and charge voltage in older Li-ion-battery-charging systems

Upper-Limit Charge Current: 1C Charge Current Upper-Limit Voltage: 4.25 V (4.2 V Typical) Charge Voltage No Charge TI (0C) Temperature No Charge T4 (40 to 45C)

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temperatures. Figure 2 shows the JEITA guidelines for the charge current and charge voltage over cell temperature for batteries used in notebook applications. These batteries have LiCoO2 as the cathode active material and graphite as the anode active material. In the standard charging temperature range from T2 to T3, a Li-ion cell can be charged in the optimal conditions of the upper-limited charge voltage and the upper-limited charge current recommended by the cells manufac turer for safety.

Figure 2. JEITA guidelines for charging Li-ion batteries in notebook applications

Upper-Limit Charge Current Charge Current

Upper-Limit Voltage: 4.25 V (4.2 V Typical) Charge Voltage 4.20 V

Charging at low temperatures

If the cells surface temperature becomes lower No Charge No Charge than T2 during charging, the lithium ions could each gain one electron and become metallic lithT3 T4 T1 T2 ium. This metallic lithium is likely to deposit on Temperature (45C) (10C) the anode, because at low temperatures the transfer rate decreases and the penetration of lithium ions into the negative electrode carbon slows down. Such metallic lithium could easily react with Battery-charger solutions for meeting electro lyte, causing permanent loss of the lithium ions, JEITA guidelines which degrades the battery faster. In addition, the chemiThe smart battery pack, which includes a fuel gauge, cal reaction between metallic lithium and the electrolyte analog front end, and second-level protector, is commonly generates a lot of heat, which could lead to thermal runused in notebook applications. The fuel gauge provides the away. Therefore, the charge current and charge voltage batterys cell voltage, charge and discharge current, cell are reduced at low cell temperatures. If the temperature is temperature, remaining capacity, and run time to the further reduced to T1 (0C as an example), the system system through SMBus for optimizing the system perform should not allow charging. ance. The bq20z45 and bq20z40 fuel gauges with Impedance Track technology, recently developed by Charging at high temperatures If the cells surface temperature rises above T3 (45C as an example) during charging, the cathode material, LiCoO2, starts to become more active and can chemically react with the electrolyte when the cell voltage is high. If the cell temperature is further increased to T4, the system should prohibit charging. If the cell temperature reaches 175C with a cell voltage of 4.3 V, thermal runaway may occur and the battery may explode. Similarly, Figure 3 shows the JEITA guidelines for charging Li-ion batteries in single-cell handheld applications, where the charge current and charge voltage are also functions of the cell temperature. The maximum charge voltage of 4.25 V includes the battery chargers full tolerance. The battery can be charged at up to 60C with a reduced charge voltage for safety.
Figure 3. JEITA guidelines for charging Li-ion batteries in single-cell handheld applications

Maximum Charge Current: 1C 0.5C

Charge Current

Maximum Charge Voltage: 4.25 V (4.2 V Typical) 4.15 V Maximum Charge Voltage 4.10 V Maximum

T1 (0C) T2 (10C)

Temperature

T3 (45C) T4 (50C)

T5 (60C)

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Texas Instruments (TI), include a series of flash-memory constants for flexibly programming the batterys charge current and charge voltage based on the JEITA guidelines. The temperature thresholds are user-programmable and provide flexibility for meeting different specifications with different applications. The fuel gauge usually broadcasts the charge current and voltage information to the smart battery charger or keyboard controller for periodically setting the proper charge current and voltage. An SMBuscontrolled battery charger, such as the TI bq24745, can be used as a slave device to get the charge voltage and current information from a smart battery pack with either the bq20z40 or the bq20z45 fuel gauge. Figure 4 shows a schematic of a smart battery charger with a smart battery pack that complies with the JEITA

guidelines for notebook applications. This SMBuscontrolled battery charger with a synchronous switching buck converter can support Li-ion batteries with one to four cells and a charge current of up to 8 A. The dynamic power-management function allows charging the battery and powering the system simultaneously without increasing the adapters power rating. The battery pack in single-cell portable devices usually has the cell and a safety protector but uses the charger instead of a fuel gauge to monitor the cell temperature and adjust the charge voltage and current. TIs bq24050 single-cell linear battery charger was designed to meet the JEITA specifications for handheld devices. It reduces the charge current by half when the cell temperature is between 0C and 10C, and reduces the charge voltage to

Figure 4. Smart battery charger bq24745 with fuel gauge bq20z40 or bq20z45

Adapter R1 430 k R2 66.5 k 10 k R7 C4 1 F 200 k R9 1.4 M R8 50 k

RAC 10 m 0.1 F CSSN CSSP ACIN ACOK VREF ICREF GND ICOUT VDDSMB CE SDA SCL R9 7.5 k C21 2 nF C23 51 pF EAO EAI FBO 10

D1 1 F System Load

DCIN

bq24745
VDDP BOOT UGATE PHASE LGATE PGND

C8 1 F C6 10 F L 5.6 H Q4 RSN 10 m To Smart Battery Pack C3 10 F

Q3 0.1 F

+3.3 V Keyboard Controller or Smart Battery Pack with bq20z40 or bq20z45 SMBus R10 20 k

R4 10 k R6 10 k R11 10 k

CSOP CSON VFB VICM

C7 0.1 F

0.1 F C5 100 pF

C22 130 pF

R11 200 k

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4.06 V when the cell temperature is between 45C and 60C. Figure 5 shows a typical application circuit with the bq24050 linear charger. The charger monitors the batterys cell temperature via the thermistor (TS) pin and adjusts the charge current and voltage when the monitored temperature reaches the threshold.

temperature ranges as JEITA recommends can significantly improve the safety of charging these batteries. Both switch-mode and linear battery-charger solutions that comply with JEITA guidelines have been presented.

Related Web sites


power.ti.com www.ti.com/sc/device/partnumber Replace partnumber with bq24050, bq24745, or bq24747

Conclusion
Charging Li-ion batteries safely is critical and has become one of the key specifications for charger design. Reducing the charge current and voltage at lower and higher

Figure 5. Typical single-cell application circuit with JEITAcompliant linear battery charger

bq24050
Adapter IN CHG R2 ISET R1 PRETERM ISET2 D TS Q1 OUT VSS 103AT 1 F

C1

Host
LDO/CE ISET/100/500 D+ D GND

USB Port
VBUS D+ D GND

D+

bq24050

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Power-supply design for high-speed ADCs


By Thomas Neu
Systems and Applications Engineer
System designers are increasingly faced with the challenge of maximizing power savings in their designs without compromising the performance of any system components like a high-speed data converter. Designers may move to battery-powered operation for applications like a handheld, software-defined radio or a portable ultrasound scanner, or they may simply shrink the products form factor and then need to find ways to reduce heat. One option for significantly reducing system power consumption is to optimize the power supply for the highspeed data converter. Recent advances in data-converter design and process technology allow newer ADCs to be driven directly from a switching power supply for maximum power efficiency. Traditionally, system designers have used low-noise, low-dropout regulators (LDOs) between the switching regulator and the ADC to clean up output noise and switching-frequency spurs (see Figure 1). However, this clean power-supply design comes at the expense of additional power consumption because the LDO requires head room for dropout voltage in order to function properly. The minimum dropout voltage is typically 200 to 500 mV, but in some systems it may be as high as 1 to 2 V when, for example, a 3.3-V rail for an ADC is generated from a 5-V switching supply using an LDO. For a data converter that requires a 3.3-V rail, an LDO dropout voltage of 300 mV increases the ADCs power consumption by about 10%. This effect is amplified with data converters that have smaller process nodes and lower supply voltages. At 1.8 V, for example, the same 300-mV dropout voltage increases ADC power consumption by about 17% (300 mV/1.8 V). Therefore, eliminating the low-noise LDO from this chain can bring significant power savings. Removing the LDO also reduces the designs board space, heat, and cost. This article demonstrates that high-speed ADCs from Texas Instruments (TI), including ultrahigh-performance 16-bit ADCs, can be powered directly from a switching regulator without noticeably degrading the ADCs perform ance. For this demonstration, two different data converters one designed with high-performance-BiCOM technology (TIs ADS5483) and one with low-power-CMOS technology (TIs ADS6148)were investigated for susceptibility to noise from a switching power supply. The rest of this article presents the results.

BiCOM technologyADS5483
This process technology enables a high signal-to-noise ratio (SNR) and a high spurious-free dynamic range (SFDR) over a wide input-frequency range. BiCOM converters usually also have a lot of on-chip decoupling capacitors and a pretty good power-supply-rejection ratio (PSRR). The power-supply investigation was performed on the ADS5483 evaluation module (ADS5483EVM), which has an onboard power supply with TIs TPS5420 switching regulator (Sw_Reg); a low-noise LDO (TIs TPS79501); and an option to use an external lab supply. Five experiments were conducted with the setup variations shown in

Figure 1. Moving from a traditional power supply to a maximum-efficiency supply


Switching Regulator 3.6 V Low-Noise LDO 3.3 V

12-V Input

Switching Regulator

3.3 V

ADC

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Figure 2. Power-supply setup for five experiments with ADS5483EVM


5-V Lab Supply 10-V 2 Lab Supply TPS5420 Switching Regulator (Sw_Reg)
L1

5 8 Ferrite Bead

1 5.3 V TPS79501 LDO 3 5.0 V

5 VVDDA

TPS79633 LDO

3.3 VVDDA

3.3 VDVDD

Figure 2 to determine the performance degradation that occurred when the ADS5483 was run directly from a switching regulator. Since the analog 5-V supply of the ADS5483 by far showed the most sensitivity to powersupply noise, this investigation ignored noise on the 3.3-V supplies. The PSRR listed in the ADS5483s data sheet supports this: The PSRR on the two 3.3-V supplies is at least 20 dB higher than that for the 5-V analog supply. The setup variations for the five experiments were configured as follows: Experiment 1A 5-V lab supply was connected directly to the 5-V analog input, bypassing both the switching regulator (TPS5420) and the low-noise LDO (TPS79501). An onboard LDO (TIs TPS79633) was used to generate the

3.3-V rail for the ADS5483s less sensitive 3.3-V analog and digital supplies. Experiment 2A 10-V lab supply was connected to the TPS5420 buck regulator, which was configured with a 5.3-V output. This provided a 300-mV dropout voltage for the TPS79501, generating a 5-V supply rail. Experiment 3The TPS5420 was configured to generate a 5-V rail from a 10-V lab supply. The TPS79501 low-noise LDO was bypassed in this experiment. Figure 3a shows that the LDO as connected in Experiment 2 did a good job of reducing the spike on the 5.3-V output of the switching regulator. However, Figure 3b shows no significant difference in the output after the ferrite bead on the 5-VVDDA rail.

Figure 3. Scope-shot comparison of Experiments 2 (with LDO) and 3 (without LDO)

~150 mVPP No LDO

~60 mVPP No LDO

~100 mVPP With LDO

~60 mVPP With LDO

(a) 5-V output before the ferrite bead

(b) 5-VVDDA rail after the ferrite bead 13

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Figure 4. Power-supply noise on 5-VVDDA rail


~220 mVPP No LDO, no RC snubber ~180 mVPP No LDO, no RC snubber

~150 mVPP No LDO, with RC snubber

~60 mVPP No LDO, with RC snubber

~100 mVPP With LDO and RC snubber

~60 mVPP With LDO and RC snubber

(a) Before ferrite bead

(b) After ferrite bead

Experiment 4This experiment was configured the same way as Experiment 3 except that the RC-snubber circuit at the output of the TPS5420 was removed, which caused increased ringing and larger switching-frequency spurs. The impact of the RC-snubber circuit can clearly be observed in Figure 4. While removing the LDO didnt show a noticeable difference after the ferrite bead, removing the RC-snubber circuit resulted in a larger voltage spike on the clean 5-VVDDA rail going to the ADC. The impact of the RC-snubber circuit will be examined in detail later on. Experiment 5An 8-W power resistor was connected to the 5-V supply, mimicking an additional load like a fieldprogrammable gate array (FPGA). The TPS5420 had to supply a higher output current and drive its internal switches harder, generating larger spurs on the output. This configuration was tested by repeating Experiments 2, 3, and 4.

Measurement results
The five experiments were compared by using a frequency sweep of the input signal. The experiment was performed on three ADS5483EVMs with the sampling rate set to

135 MSPS and then to 80 MSPS. No significant differences in performance could be observed. Using a 135-MSPS sampling rate, the frequency sweeps for the SNR and SFDR are shown in Figure 5. The maximum variation in SNR across the input frequencies from 10 to 130 MHz was about 0.1 dB. The SFDR results were very close also; at some input frequencies (e.g., 80 MHz), a degradation of 1 to 2 dB was observed. A comparison of the FFT plots for the five experiments (see Figure 6) shows that there was no significant increase of the noise floor or the spur amplitudes. Using the LDO to clean up the switching noise made the output spectrum look almost identical to that of the clean 5-V lab supply. When the LDO was removed, two spurs from the switching regulator were observed that had a frequency offset of about 500 kHz from the 10-MHz input tone. The RCsnubber circuit reduced the amplitude of these spurs by about 3 dB, from about 108 dBc to about 111 dBc. This is quite a bit below the average spur amplitude of the ADS5483, which shows that the ADS5483 can be powered directly from a switching regulator without sacrificing SNR or SFDR performance.

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Figure 5. Input-frequency sweeps from 10 to 130 MHz


79.5

79

SNR (dBFS)

78.5

78

77.5

Experiment Number and Conditions #1: 5-V Lab Supply LDOs #2: 10-V Lab Sw_Reg Snubber LDOs #5: Same as #2 with 8- Load #3: 10-V Lab Sw_Reg Snubber (No LDOs) #5: Same as #3 with 8- Load #4: 10-V Lab Sw_Reg (No Snubber, No LDOs) #5: Same as #4 with Load Sampling Rate, fs = 135 MSPS

77 0 20 40 60 80 100 Input Frequency, fIN (MHz) 120 140

(a) SNR versus input frequency


100 98 96

SNR (dBc)

94 92 90 88 86 0 20 40 60 80 100 Input Frequency, fIN (MHz) 120 140

(b) SFDR versus input frequency

Figure 6. 65k-point FFT plots with spurs at 500-kHz offset


0
No RC Snubber

20

With RC Snubber LDO 5-V Lab Supply fS = 135 MSPS, fIN = 10 MHz

FFT Amplitude (dBc)

40 60 80 100 120 140 0 10 20 30 40 50


Two Spurs with 500-kHz Offset from Fundamental

60

70

Frequency (MHz)

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Figure 7. TPS5420 switching regulator

~7-V Overshoot No RC Snubber


L1

Lots of Ringing

TPS5420

~4-V Overshoot With RC Snubber Almost No Ringing

(b) With RC-snubber circuit added

(a) Comparison of output with and without RC snubber

RC snubber The output of a buck regulator can switch fairly large voltages at fairly fast switching speeds. In the investigation for this article, the input rail for the TPS5420 was set to 10 V, and quite a bit of overshoot and ringing at the output could be observed, as shown in Figure 7a. In order to absorb some of the energy from the reactance of the power circuit, the RC-snubber circuit was added to the output of the TPS5420 (Figure 7b). This circuit provided a high-frequency path to ground, which dampened the overshoot a little bit. Figure 7a illustrates that the RC snubber reduced overshoot by about 50% and almost completely eliminated the ringing. Component values of R = 2.2 W and C = 470 pF were chosen. The switching frequency of the regulator can range from 500 kHz up to about 6 MHz, depending on the manufacturer, so the R and C values may need to be adjusted. This solution comes at the expense of some additional AC-power dissipation in the shunt resistor (although resistance is very small), which reduces the overall power efficiency of the regulator by less than 1%. FFT plots normalized to the 10-MHz input signal were generated to compare Experiments 1 through 4 (see Figure 8). The spur from the TPS5420 is clearly visible at an offset of about 500 kHz. The snubber decreases the spur amplitude by about 3 dB, and the low-noise LDO completely eliminates it. It is important to note that the spur amplitude with the RC snubber (and no LDO) is about 112 dBc, far below the average spur amplitude of the ADS5483, so the SFDR performance is not degraded. In Experiment 5, an 8-W power resistor was added to the 5-VVDDA rail to mimic a heavy load on the supply. The normalized FFT plots (Figure 9) dont show much change. With the RC snubber removed, the spur increases by about 4.5 dB; yet it is still far below the average spur amplitude.
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Figure 8. Normalized FFT plots for Experiments 1 through 4


0
No RC Snubber

20

With RC Snubber LDO 5-V Lab Supply fS = 135 MSPS, fIN = 10 MHz

FFT Amplitude (dBc)

40 60 80 100 120 140 0.01


RC Snubber Reduces 500-kHz Spur by About 3 dB

0.1

10

100

Frequency Offset from Input Tone (MHz)

Figure 9. Normalized FFT plots with added 8-W load


0
No RC Snubber

20

With RC Snubber LDO 5-V Lab Supply fS = 135 MSPS, fIN = 10 MHz, with 8- Load

FFT Amplitude (dBc)

40 60 80 100 120 140 0.01


RC Snubber Reduces 500-kHz Spur by About 4 dB

0.1

10

Frequency Offset from Input Tone (MHz)

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Figure 10. Power-supply setup for five experiments with ADS6148EVM


5-V Lab Supply 10-V Lab Supply 7 TPS5420 Switching Regulator (Sw_Reg)
L1

10 Ferrite Bead 4 3.3 VVDDA

6 5.3 V TPS79501 LDO 5.0 V TPS79633 LDO

9 8 TPS79601 LDO 1.8 VDVDD

CMOS technologyADS6148
High-speed data converters are typically developed with CMOS technology when the key concern is to reduce power consumption as much as possible while still maintaining good SNR and SFDR performance. However, the PSRR of CMOS converters is usually not as good as that of BiCOM ADCs. The ADS6148 data sheet lists a PSRR of 25 dB, while the ADS5483s PSRR is listed as 60 dB on the analog input-supply rail. The ADS6148EVM comes with an onboard power supply consisting of a switching regulator (TPS5420) and a lownoise, 5-V-output LDO (TPS79501), followed by low-noise LDOs for the 3.3-V and 1.8-V power rails (Figure 10). Similar to the five experiments conducted with the ADS5483EVM, the following five additional experiments were performed with the ADS6148EVM, focusing only on the noise on the 3.3-VVDDA rail. Experiments with an exter nal TPS5420 on the 1.8-VDVDD rail showed an insignificant effect on the SNR and SFDR performance. Experiment 6A 5-V lab supply was connected to the input of two low-noise LDOs, one with a 3.3-V output and one with a 1.8-V output. The LDOs did not add any significant noise to the lab supply. Experiment 7A 10-V lab supply was connected to the TPS5420 buck regulator, which was configured with a 5.3-V output like Experiment 2 with the ADS5483. The TPS79501 generated a filtered 5.0-V rail, which fed the 3.3-V-output and 1.8-V-output LDOs as shown in Figure 10. Experiment 8All the LDOs for the 3.3-VVDDA rail were bypassed. The TPS5420 was configured with a 3.3-V output directly connected to the 3.3-VVDDA rail. The TPS79601 generated the 1.8-VDVDD rail and was powered from an external 5-V lab supply.

Experiment 9This experiment was configured the same way as Experiment 8 except that the RC-snubber circuit at the output of the TPS5420 was removed. Experiment 10A 4-W power resistor was connected to the 3.3-V output of the TPS5420. This drastically increased the output current of the TPS5420, simulating an additional load. Furthermore, it caused higher switching spurs and more ringing like Experiment 5 with the ADS5483. Figure 11 shows some of the waveforms for the 3.3-VVDDA output that resulted from Experiments 7, 8, and 9. There is little difference in spike amplitudes with or without the LDOs, but the RC snubber provides a 60% decrease in spike noise.
Figure 11. Scope-shot comparison of experiments on 3.3-VVDDA rail measured after ferrite bead

~400 mVPP No LDO, No RC Snubber

~160 mVPP No LDO, with RC Snubber

~160 mVPP With LDO and RC snubber

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Measurement results
The susceptibility of the ADS6148 to power-supply noise was examined by comparing Experiments 6 through 10 with a frequency sweep of the input signal. The experiments were performed on three ADS6148EVMs with the sampling rate (fS) set to 135 MSPS and then to 210 MSPS. No significant differences in performance could be detected. Using a 135-MSPS sampling rate, the frequency sweeps

for the SNR and SFDR are shown in Figure 12. The maximum variation in SNR across input frequencies of up to 300 MHz was 0.1 to 0.2 dB. However, once the RC-snubber circuit was removed, the noise increased significantly, reducing the SNR by about 0.5 to 1 dB. Figure 12b shows the SFDR variation across the input frequencies for the five ADS6148 experiments. No significant degradation can be observed.

Figure 12. Input-frequency sweeps from 10 to 300 MHz


75 74 73

SNR (dBFS)

72 71 70 69 68 0 50 100 150 200 Input Frequency, fIN (MHz) 250 300

Experiment Number and Conditions #6: 5-V Lab Supply LDOs #7: 10-V Lab Sw_Reg Snubber LDOs #8: 10-V Lab Sw_Reg Snubber (No LDOs) #10: Same as #8 with 4- Load #9: 10-V Lab Sw_Reg (No Snubber, No LDOs) #10: Same as #9 with 4- Load fS = 135 MSPS

(a) SNR versus input frequency


100 95 90 85 80 75 70 0 50 100 150 200 Input Frequency, fIN (MHz) 250 300

SFDR (dBc)

(b) SFDR versus input frequency

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Comparing the FFT plots in Figure 13 shows why the SNR without the RC snubber is degraded a bit. When the RC-snubber circuit was removed, numerous little spurs spaced at intervals of about 500 kHz (the TPS5420s switching frequency) were visible in the output spectrum of the ADS6148, as illustrated in Figure 13. The little spurs were more dominant and degraded the SNR more than with the ADS5483 because of the inherent lower PSRR of the ADS6148. However, the FFT plots in Figure 13 also show that the added RC-snubber circuit compen sated for that deficiency very well. The normalized FFT plots in Figure 14 show that the spurs from the switching regulator were about 5 to 6 dB higher than the average noise floor of the ADC. They were too low to cause any SFDR degradation but definitely affected the SNR of the ADC.

Figure 13. 65k-point FFT plots with numerous spurs


0
No RC Snubber

20

With RC Snubber LDO 5-V Lab Supply fS = 135 MSPS, fIN = 10 MHz

FFT Amplitude (dBc)

40 60 80 100 120 0 10 20 30 40
Numerous Spurs at 500-kHz Intervals

50

60

70

Frequency (MHz)

Conclusion
The experiments presented in this article have shown that data converters designed with high-performanceBiCOM technology and low-power-CMOS technology can be powered directly from a switching regulator. However, necessary precautions such as careful layout and an appropriate RC-snubber filter may be required to eliminate switching-frequency spurs from the ADCs output and the resulting degradation of the SNR. A very small SNR degradation may well be worth the big power savings achieved by removing the LDO from the powersupply chain.
Figure 14. Normalized FFT plots show the benefit of using an RC snubber
0
No RC Snubber

20

With RC Snubber LDO 5-V Lab Supply fS = 135 MSPS, fIN = 10 MHz

FFT Amplitude (dBc)

40 60 80 100 120 140 0.01


RC Snubber Eliminates Switching Spurs at 500-kHz Intervals

Related Web sites


power.ti.com www.ti.com/sc/device/partnumber Replace partnumber with ADS5483, ADS6148, TPS5420, TPS79501, TPS79601, or TPS79633

0.1

10

100

Frequency Offset from Input Tone (MHz)

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Operational amplifier gain stability, Part 1: General system analysis


By Miroslav Oljaca, Senior Applications Engineer, and Henry Surtihadi, Analog Design Engineer Introduction
The goal of this three-part series of articles is to provide a more in-depth understanding of gain error and how it can be influenced by the actual parameters of an operational amplifier (op amp) in a typical closed-loop configuration. This first article explores general feedback control system analysis and synthesis as they apply to first-order transfer functions. This analysis technique is then used to calculate the transfer functions of both noninverting and inverting op amp circuits. The second article will focus on DC gain error, which is primarily caused by the finite open-loop gain of the op amp as well as its temperature dependency. The third and final article will discuss one of the most common mistakes in calculating AC closed-loop gain errors. Often, during circuit analysis, system designers have the tendency to use DC-gain calculation methods for AC-domain analysis, which provides worse results than the real performance of the circuit. With these three articles, the system designer will have the simple tools required to determine the overall closed-loop gain error for any specific op amp by using its data-sheet parameters. In a sinusoidal steady-state analysis, the transfer function can be represented as H( j) = H( j) e j( ), (1) where H( j) is the magnitude of the transfer function, and is the phase. Both are functions of frequency. One way to describe how the magnitude and phase of a transfer function vary over frequency is to plot them graphically. Together, the magnitude and phase plots of the transfer function are known as a Bode plot. The magnitude part of a Bode diagram plots the expression given by Equation 2 on a linear scale: H( j) dB = 20 log10 H( j) (2) The phase part of a Bode diagram plots the expression given by Equation 3, also on a linear scale: = H( j) (3) Both the magnitude and the phase plots are plotted against a logarithmic frequency axis. The benefit of plotting the logarithmic value of the magnitude instead of the linear magnitude of the transfer function is the ability to use asymptotic lines to approximate the transfer function. These asymptotic lines can be drawn quickly without having to use Equation 2 to calculate the exact magnitude and can still represent the magnitude of the transfer function with reasonable accuracy. As an example, consider a first-order (single-pole) transfer function, 1 H( j ) = , (4) 1+ j 0 where 0 is the angular cutoff frequency of the system. The magnitude, in decibels, of the transfer function from Equation 4 can be described by Equation 5: H( j) dB = 20 log 1 1+ j
0

Steady-state sinusoidal analysis and Bode plots


Before the main topic of this article is discussed, it is appropriate to briefly review the concepts of sinusoidalfrequency analysis and Bode plots. These two concepts will be used repeatedly throughout this series of articles. It is often useful to characterize a circuit by measuring its response to sinusoidal input signals. Fourier analysis can be used to reconstruct any periodic signal by summing sinusoidal signals with various frequencies. Thus, the circuit designers can gather useful information about a circuits response to various input signals by characterizing its response to sinusoidal excitations over a wide frequency range. When a linear circuit is driven by a sinusoidal input signal of a specific frequency, the output signal is also a sinusoidal signal of the same frequency. The complex representation of a sinusoidal waveform can be used to represent the input signal as v1(t) = V1 e j( t +1 ), and the output signal as v 2(t) = V2 e j( t +2 ). V1 and V2 are the amplitudes of the input and output signals, respectively; and 1 and 2 are the phase of the input and output signals, respectively. The ratio of the output signals to the input signals is the transfer function, H(j).
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(5)

The transfer function, H(j), is a complex function of the angular frequency, . To calculate the magnitude, both real and imaginary portions of the function need to be used: H( j ) dB = 20 log 1
2 1+

(6)

2 0 Equation 6 shows that at a frequency much lower than 0, the magnitude is near 1 V/V or 0 dB. At frequency

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Figure 1. Bode plot of single-pole transfer function


5 15

0 3 5 20 dB/dec Asymptotes Amplitude

0 5.7 15 Phase (degrees)

Amplitude (dB)

10

30

15

45

20 Phase 25

60

75 84.3 90 10

30 0.1

0 (rad/sec)

= 0, the magnitude drops to 1/2 = 0.707, or roughly 3 dB. Above this frequency, the magnitude rolls off at a rate of 20 dB/decade. Both the real and imaginary parts of the transfer function can be used to calculate the phase response as (7) Similarly, when the frequency is much lower than 0, the phase is 0. At the frequency = 0, the phase is 45. Finally, when the frequency is much higher than 0, the phase levels off at 90. Figure 1 shows the Bode plot of the first-order transfer function just described. Notice the use of the two asymptotic lines to simplify the magnitude plot of the transfer function. At the intersection of the two asymptotic lines, the simplified magnitude curve is off from the actual magnitude by about 3 dB. At frequencies much lower or much higher than 0, the error is negligible. () = tan 1 . 0

Deriving noninverting and inverting transfer functions


For simplicity, all the feedback networks in this article are shown as resistive networks. However, the analysis shown here will also be valid when these resistors are replaced with complex feedback networks. Figure 2 depicts a typical noninverting op amp configuration. The closed-loop gain of the amplifier is set by two resistors: the feedback resistor, RF, and the input resistor, RI. The amount of output voltage, VOUT, fed back to the feedback point is represented by the parameter . The feedback point is the inverting input of the op amp. As stated, the network is a simple resistive feedback network. From Figure 2, is defined as = VFB RI = . VOUT RI + RF (8)

Figure 2. Typical noninverting op amp circuit with feedback


Feedback Network VFB RI + VIN Network VOUT RF VFB RI

RF

VOUT

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Figure 3 shows the control-loop model of the circuit in Figure 2. The parameter AOL is the open-loop gain of the op amp and is always specified in any op amp data sheet. The control-loop model from Figure 3 can be used to express the closed-loop gain as Assuming that this model is of a first-order system, the open-loop gain of an op amp as a function of angular frequency can be described as A OL ( j) = A OL _ DC . 1+ j 0 (10) A CL V A OL = OUT = . VIN 1 + A OL (9)

Figure 3. Control-loop model of noninverting op amp circuit

VFB

VIN

VERR

A OL

VOUT

The parameter AOL_DC in Equation 10 is the open-loop gain of the op amp at a low frequency or at the DC level. The dominant pole of the op amp is given by the angular frequency, 0, or equivalently by f0 = 0 /2. The Bode plot of the open-loop gain expression from Equation 10 is presented in Figure 4. Asymptotic curves are used in this figure to create a simplified version of the actual open-loop response. Now it is possible to express the closed-loop gain from Equation 9 in the frequency domain by replacing the parameter AOL with Equation 10. After a few algebraic steps, the closed-loop transfer function can be written as A OL _ DC 1 + A OL _ DC A CL ( j) = . 1 1+ j 0 1 + A OL _ DC

ACL(j) is a complex function of the angular frequency, . Also recall that to calculate the magnitude, both real and imaginary portions of the function need to be used in the same way that Equation 6 was obtained: A OL _ DC A CL( j ) dB = 20 log 1+ 1 + A OL _ DC 2
2 0

(12)

(1 + A OL _ DC )2 If the angular frequency, , is replaced with 2f, the closed-loop transfer function from Equation 12 can be rewritten as A OL _ DC A CL( jf ) dB = 20 log 1+ 1 + A OL _ DC f
2 2 f0

(11)

1 (1 + A OL _ DC )2

(13)

Figure 4. Open-loop gain vs. frequency of typical op amp


140 A OL_DC 120 100 f0

Voltage Gain (dB)

80 60 40 20 0

20

10

100

1k

10 k 100 k Frequency (Hz)

1M

10 M

100 M

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Figure 5 depicts a Figure 5. Typical inverting op amp circuit with feedback typical inverting op amp configuration. As Network Network with the analysis of the Feedback RF noninverting configuraNetwork VOUT VIN tion, simple resistor VFB networks are used that RI can be replaced with RF RI more complex funcVOUT VFB VFB tions. The closed-loop VIN + RI RF gain of the amplifier is again set by two resistors: the feedback resistor, RF, and the input resistor, RI. The amount of output voltage, VOUT, fed back to the inverting input is again represented by . Figure 6. Control-loop model of inverting In the inverting configuration, there is an additional signal op amp circuit arriving at the inverting node as a result of the input signal. The amount of this signal is represented by . For the inverting op amp configuration, is defined as V while is defined by Equation 8. Figure 6 shows the control-loop model of the circuit in Figure 5. This model can be used to express the closedloop gain of the circuit as (15) Substituting the AOL term from Equation 10 into Equation 15 yields the closed-loop gain expression with its dependency on angular frequency: A OL _ DC 1 + A OL _ DC (16) A CL ( j ) = 1 1+ j 0 1 + A OL _ DC As before, the transfer function, ACL( j), is a complex function of the angular frequency, . To calculate the magnitude, both real and imaginary portions of the function must again be used: A OL _ DC 1 + A OL _ DC A CL ( j ) dB = 20 log (17) 2 1 1+ 2 0 (1 + A OL _ DC )2 If the angular frequency, , is replaced with 2f, the closed-loop transfer function from Equation 17 can be rewritten as A OL _ DC 1 + A OL _ DC A CL ( jf ) dB = 20 log (18) f2 1 1+ 2 f0 (1 + A OL _ DC )2 A CL = A OL VOUT = . VIN 1 + A OL V RF = FB = , VIN RI + RF
FB

(14)
VERR

VIN

A OL

VOUT

Assuming that there is a first-order response from the op amp, the complete closed-loop equations for the noninverting and inverting gain amplifiers are respectively represented by Equation 13 and Equation 18.

Conclusion
This article has explored feedback control system analysis and synthesis as they apply to first-order transfer functions. The analysis technique was applied to both noninverting and inverting op amp circuits, resulting in a frequencydomain transfer function for each configuration. In Parts 2 and 3 of this series, these two transfer functions will be used to analyze the DC and AC gain error of closed-loop op amp circuits. Part 3 will help circuit designers avoid the mistake of using DC-gain calculations for AC-domain analysis.

References
1. John J. DAzzo and Constantine H. Houpis, Feedback Control System Analysis and Synthesis (New York: McGraw-Hill, 1966). 2. James W. Nilsson and Susan Riedel, Electric Circuits (Upper Saddle River, NJ: Prentice Hall, 2007).

Related Web site


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Signal conditioning for piezoelectric sensors


By Eduardo Bartolome
Systems Engineer, Medical Business Unit

Introduction
This article explains some of the principles of signal conditioning. Piezoelectric sensors have been chosen to illustrate these principles because their conditioning requires a mix of traditional tools and because they present some challenges that may not arise with other types of sensors.

Figure 1. Sensor under acceleration

Piezoelectric sensors
The application of piezoelectric transducers for sensing and actuation extends to many fields. This article focuses on the sensing of a group of physical magnitudesacceleration, vibration, shock, and pressurethat from the perspective of the sensor and its requied signal conditioning can be considered similar.1 In the case of acceleration, sensor sensitivity is usually expressed as a charge proportional to an external force or acceleration (many times described as gravitational acceleration, g). Nevertheless, in the strict physical sense, the sensor outputs a charge that is actually a function of its deformation/deflection. For instance, Figure 1 shows a sensor fixed on the top while the bottom is being pulled by an external force, Fext. In the case of an accelerometer, the fixed extreme (top) could be attached to the object whose acceleration is going to be measured, and the external force would be the inertia of a mass attached to the other extreme (bottom) that is trying to stay still. For the reference coordinate system fixed on the top extreme (assuming that the sensor is acting as a spring with a very high spring constant, K), the deflection x will create an opposing force of Fint = Kx. (1) Eventually, the mass (the deflection of the sensor) will stop moving/changing at Fint = Fext = Kx. (2) Since the charge, Q, is (to first order) proportional to deflection, and deflection is proportional to force, Q is proportional to force. Applying a sinusoidal force with a maximum Fmax, will create a sinusoidal charge with a maximum Qmax. In other words, integrating the current coming from the sensor will yield Qmax when the sinusoidal force is at its maximum. Increasing the frequency of the sinusoid will increase the current; but the peak will be reached faster, i.e., keeping the integral (Qmax) constant. The manufacturer will provide the specification for sensitivity as the ratio of Qmax to Fmax in the usable frequency range of the sensor. Nevertheless, due to the mechanical properties of the sensor, the sensor actually has a resonant frequency (above the usable frequency range) where even a small
24 High-Performance Analog Products www.ti.com/aaj 1Q 2010 Analog Applications Journal
Fint

Fext

oscillatory force will produce relatively large displacements and therefore large output amplitudes. If the effects of the resonance are ignored, piezoelectric sensors can be modeled to first order as a current source in parallel with the sensors parasitic capacitance, here referred to as Cd, or they can be modeled as a voltage source in series with Cd. This voltage is the equivalent voltage that would be seen on the plates of the sensor if the charge was just stored on them. Notice, nevertheless, that for the simulation of many applications, the second approach is more straightforward. As explained earlier, the current is proportional to the rate of change of deflection; so, for instance, for a sinusoidal AC sweep of accelerations with constant amplitude, the amplitude of the current generator would have to be changed depending on the frequency. Finally, if the generator needs to represent the actual physical signal, a transformer can be used, as illustrated in Figure 2. In this example, a generator with a sensitivity of
Figure 2. Piezoelectric sensor model
C1 500 pF

TR1 1000:1 + VG1 N1 N2

Texas Instruments Incorporated

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0.5 pC/g and a parasitic capacitance of 500 pF is modeled. The sinusoidal generator outputs 1 V for every unit of g to be simulated. The trans former scales that down to 1 mV on its secondary. A 1-mV swing applied to C1 (500 pF) would inject Q = VC = 0.5 pC on the next stage, as expected.

Figure 3. Charge amplifier used for signal conditioning


RFB CFB

Analysis of the charge amplifier


Figure 3 shows the basic schematic of a classical charge amplifier that can be used as a signal- conditioning circuit. In this case, the currentsource model was chosen to show that the sensor is mainly a device with high output impedance.

Sensor Model ISensor Cd Ca

Amplifier Model VOUT +

Input impedance
A signal-conditioning circuit must have very low input impedance to collect most of the charge output by the sensor. Thus, the charge amplifier is the ideal solution since its input presents a virtual ground to the sensor signal as long as the amplifier maintains high gain at those signal frequencies. In other words, if any charge coming from the sensor tries to build up on the plates of the sensor (Cd ) or on the input parasitic capacitance of the amplifier (Ca), a voltage will be created across the input of the amplifier. This voltage will be immediately compensated for and nulled by pulling or sourcing the same amount of charge current through the negative feedback network, RFB and CFB. response, including the parasitic capacitor of the sensor, to an AC physical excitation, is that of a high-pass filter, with a pole at: 1 fHPF = . (4) 2RFBCFB The signal bandwidth of interest is set by the application; so, as the capacitance is lowered to increase the gain, the resistance needs to be increased to keep the pole low. Increasing this resistance has consequences on other careabouts of the solution. Besides the effect on noise (described later under Noise), the higher the resistance is, the more difficult the practical implementationfrom finding an off-the-shelf resistor to making sure that the trace-to-trace parasitic resistances on the PCB are much bigger than RFB itself. For cases where the circuit specifications allow for the use of resistors on the order of a few hundred megohms, surface-mount resistors are readily available2 and there are no requirements for advanced layout techniques (like using a guard band). As mentioned before, another factor limiting the increase of the resistor value is the biasing of the circuit. The input bias current of the amplifier flows through this resistor and creates an output offset voltage. This can be minimized by choosing an amplifier with low input bias currents, such as a FET input amplifier. The input bias currents of this type of amplifier, usually below 100 pA, should be fine as long as the feedback resistor value is below 1 G and the resulting offset can be filtered with AC coupling between the stages. Note that, due to the difficulty of keeping the high-pass filters pole low, it becomes increasingly difficult to use a piezoelectric sensor in near-DC applications (even if the leakage currents in the sensor itself are very small).

Gain
Since the amplifiers signal input is a virtual ground, the input current creates an output-voltage swing; and the high-frequency gain is set by the value of CFB (discounting the effect of RFB, described next under Bandwidth). Notice that the smaller the capacitor is, the bigger the gain. An approximation for gain is (mV/C). (3) CFB Also notice that the gain of the circuit ultimately does not depend on the sensors capacitance (Cd ), although it is advisable to pay attention to this values effect on noise. Gain = 1

Bandwidth
In order to bias the amplifier properly (offer a DC path for the input bias current of the amplifier), a feedback resistor (Rf) is necessary. At lower frequencies, the capacitive circuit in the feedback path becomes open and the feedback resistance become dominant, effectively reducing the gain. At higher frequencies the impedance of the capacitive circuit becomes smaller, effectively eliminating the effect of the resistive feedback path. The final circuit

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Although not a part of this amplification stage, a low-pass filter needs to be added at some point to reduce the circuits response to unwanted signals at the sensors resonant frequency and to reduce the overall digitized and aliased noise in the band of interest.

Noise
Finally, the signal-to-noise ratio (SNR) needs to be maximized. Performing a brief theoretical noise analysis before proceed ing with the simulation will be helpful. Figure 4 shows the main noise sources in the charge amplifier. The output-noise spectral density can be expressed as SO(f ) = where
2 I NA

ZFB

+ E2 A

ZFB 1 2 + ER 1+ , FB 1 + R 1 / (Cd + Ca )s FBCFBs RFB RFBCFBs + 1

(5)

ZFB =

(6)

and s = 2fj. Equation 5 is the classical noise solution for a charge amplifier. Ca is typically very small compared to Cd. So, Equation 5 can be simplified to SO(f ) =
2 I NA

RFBCds RFB 1 2 + E2 + ER . A 1+ FB RFBCFBs + 1 RFBCFBs + 1 RFBCFBs + 1

(7)

In fact, the second term can be reduced even further if frequencies well above the high-pass filters pole are considered:
2 SO(f ) = I NA

RFB Cd 1 2 + E2 + ER A 1+ FB RFBCFBs + 1 CFB RFBCFBs + 1

(8)

Trends can be analyzed in several ways. The pole (the term RFBCFBs + 1) can be considered constant since increasing RFB would require a reduced CFB or vice versa. From that perspective, increasing RFB would increase the three terms in Equation 8. The voltage noise corresponding to the first term would increase linearly with RFB; the voltage noise corresponding to the second term would also increase; and the voltage noise corresponding to the third term would increase as the square root of RFB, since ERFB = 4kTRFB, where k = Boltzmanns constant and

T = temperature in degrees Kelvin. Nevertheless, the gain would increase with RFB as CFB became smaller (see Equation 3). This increase of signal with RFB will be similar to any increase of the first two noise terms in Equation 8, but bigger than the increase of the last noise term, therefore improving the overall SNR. The bottom line is to increase RFB as much as practically possible. Another trend to notice is that a sensor with more parasitic capacitance is less desirable from the noise perspective.

Figure 4. Charge amplifiers noise sources

RFB ERFB CFB Amplifier Model EA Cd Ca INA VOUT +

Sensor Model ISensor

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Figure 5. OPA337s input-voltage and input-current noise


1k 1k

Voltage Noise (nV/ Hz)

10

10

Current Noise

0.1 1 10 100 1k 10 k Frequency (Hz) 100 k 1M

0.1

Simulation results
For a more practical circuit implementation, the Texas Instruments (TI) OPA337 has been chosen. This amplifier offers low input-voltage and inputcurrent noise (see Figure 5, taken from the data sheet3) while accepting a 3-V unipolar supply. Figure 6 shows a model of this circuit in TIs SPICEbased analog simulation program, TINA-TI. In this implementation, the pole is at 0.86 Hz. Equation 7 can be analyzed at 5 Hz just to doublecheck the accuracy of the formula: In the first term, if INA 0.01 fA/Hz, and RFB = 270 M, this terms contribution to output noise is approximately (2.7 nV/Hz )/5.85 = 0.5 nV/Hz. In the second term, if EA 60 nV/Hz, this terms contribution to output noise is approximately 120 nV/Hz. In the third term, if RFB = 270 M, this terms contribution to output noise is approximately (2 V/Hz )/5.85 = 340 nV/Hz. Adding all three terms together quadratically totals approx imately 360 nV/Hz, which is close to the sim ulation result in Figure 7. Notice, however, that the noise values used differ from the data-sheet values shown in Figure 5. The TINA-TI noise model

Figure 6. TINA-TI model of circuit using OPA337


Vcc/2 R6 270M

Current Noise (fA/ Hz)

100

Voltage Noise

100

V3 1.7

C4 680p

TR1 1m + VG1 N1 N2 Vcc/2

C1 500p

VF1 OPA337 V1 3.3

++ Vcc/2

Figure 7. Simulation of output noise from model in Figure 6


3

Output Noise (V/Hz)

2 5 Hz 1 366 nV/Hz

0 0.01

0.1

10 Frequency (Hz)

100

1k

10 k

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Figure 8. TINA-TI simulation circuit for amplifier noise analysis


Vcc/2

Figure 9. Simulation of output noise from circuit in Figure 8


Current Noise (fA/Hz)
1 2.27 kHz

V3 2.5

0.5

Voltage noise OPA337 V1 3.3

++ CCV1 1 + + VG1 Current noise

Voltage Noise (nV/Hz)

0 200 4.66 Hz

100

10

Vcc/2

100 1k Frequency (Hz)

10 k

100 k

for the OPA337 is not accurate, as can be proven by simulating the simplified circuit in Figure 8 and obtaining the results in Figure 9 (which should have been the same as in Figure 5). These results emphasize the importance of a quick theoretical/hand analysis. The circuit of the amplifier is

inaccurate and needs to be accounted for in TINA-TI to get realistic numbers. A way to do that can be found in Reference 4, which is Part IV of a series of very valuable articles by Art Kay on noise. A slightly simpler approach is to just add noise (Vnoise and Inoise in Figure 10) to the circuit shown in Figure 8 to compensate for what is missing.

Figure 10. Noise added to circuit in Figure 8

Vcc/2

V3 2.5 Inoise

Voltage noise OPA337 V1 3.3

++ Vnoise CCV2 1 + Current + VG1 noise

Vcc/2

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Although not perfect, the results shown in Figure 11 look much more similar to the specification (Figure 5) than the results shown in Figure 9. With the original circuit in Figure 6, the noise at 5 Hz can again be estimated with Equation 7 using the noise values originally specified. In the first term, if INA 0.3 fA/Hz , and RFB = 270 M, this terms contribution to output noise is approximately (80 nV/Hz )/5.85 = 14 nV/Hz. In the second term, if EA 130 nV/Hz, this terms contribution to output noise is approxi mately 260 nV/Hz. In the third term, if RFB = 270 M, this terms contribution to output noise is approximately (2 V/Hz )/5.85 = 340 nV/Hz. Adding all three terms together quadratically totals approx imately 430 nV/Hz, which as shown in Figure 13, is very close to the simulation result for the circuit in Figure 12 that includes corrected noise sources. Now consider the variation of noise versus the feedback resistor. Changing RFB in the first term of Equation 7 from 270 M to 540 M (and dividing CFB by half, from 680 pF to 340 pF, to keep the pole constant) has the following effects on the output-referred noise: In the first term, if INA 0.3 fA/Hz , and RFB = 540 M, this terms contribution to output noise is approximately (160 nV/Hz )/5.85 = 28 nV/Hz. In the second term, if EA 130 nV/Hz, this terms contribution to output noise is approxi mately 320 nV/Hz. In the third term, if RFB = 540 M, this terms contribution to output noise is approximately (3 V/Hz )/5.85 = 510 nV/Hz. Adding all three terms together quadratically totals approximately 600 nV/Hz, which is once again

Figure 11. Simulation of output noise from circuit in Figure 10


Current Noise (fA/Hz)
1 6.93 Hz 8.54 kHz

0.5

Voltage Noise (nV/Hz)

0 332

22

10

100 1k Frequency (Hz)

10 k

100 k

Figure 12. TINA-TI model of Figure 6 circuit with noise sources added
Vcc/2 R6 270M

V3 1.7

C4 680p

TR1 1m C1 500p + VG1 N1 N2 Vcc/2

Vnoise

VF1 OPA337 V1 3.3

Inoise

++

Figure 13. Simulation of output noise from circuit in Figure 12


3750

Output Noise (nV/Hz)

1890 434 nV/Hz

5 Hz

29 0.01

0.1

10 100 Frequency (Hz)

1k

10 k

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Figure 14. Simulation of output noise from circuit in Figure 12 with RFB doubled and CFB halved
4000

Output Noise (nV/Hz)

3000

2000 614 nV/Hz

5 Hz

1000

0.1

10 100 Frequency (Hz)

1k

10 k

close to the simulation result (see Figure 14). As expected, the output noise goes up. Nevertheless, doubling the resist ance allows the capacitance to be divided by two, effectively doubling the gain (i.e., doubling the output signal). Even though RFB is the dominant noise source, and increasing it increases its noise, an SNR improvement of 3 dB is realized because the doubled output signal far exceeds the added noise.

Figure 15). This practice is usually not recommended because the T network results in a large gain for the offset and noise, usually yielding a much worse SNR.

Using differential inputs


So far, the benefits of using differential inputs to reduce noise have been ignored. For simplicity, the amplifiers modeled have been analyzed as single-ended, but Figure 16 shows an improved configuration with differential inputs. This configuration has a double advantage: 1. It intrinsically has twice the gain of a circuit with a singleended input (the charge gets integrated in C2 and C4), while noise increases only as a square-root function (i.e., the noise sources are uncorrelated).

Other practical considerations


Creating equivalent larger resistors with a T network
When very large resistors in the feedback network are desired, it is tempting to create them by using a T network formed by smaller, more accessible components (see

Figure 15. T-network feedback circuit


Vcc/2

Figure 16. Improved circuit with differential inputs

Vcc/2

R6 270M

R16 2.7k R14 20M R15 270k


V3 1.7 C4 680p

C6 680p
+ VG1

TR1 1m N1 N2

C1 500p

VF1

+ + OPA337 V1 3.3

VF1

+ + OPA337 C7 500p IG1 Vcc/2 V2 3.3


C2 680p R1 270M

Vcc/2

Vcc/2

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2. The charge amplifier is a very sensitive (high-gain) circuit. Figure 17 shows that any capacitive coupling of an interferer (in this case the 60-Hz grid) with the input will effectively inject current. In the case of a singleended amplifier, this means that one of the terminals injects current while the other goes to ground; i.e., the amplifier will just amplify the interferer. In the case of the differential input, common-mode signals applied to both terminals will cancel each other (assuming that the parasitics and feedback networks are the same). In Figure 18, notice the results of coupling to the 60-Hz grid with a single-ended input (blue trace) and how the 60-Hz common-mode noise is greatly reduced by differential inputs that cancel each others interferer (yellow trace). For the purposes of this example, no effort was made to match the differential inputs beyond the 10% toler ances of the components.

Figure 17. Model of 60-Hz common-mode noise source to differential input amplifier
Vcc/2 R6 540M

V3 1.7

C4 340p

Parasitic1 0 + 60Hz Parasitic2 0

Vnoise Inoise ++ OPA337 V1 3.3 Output noise

C2 340p

R1 540M

Conclusion

Users can think of piezoelectric sensors as devices that output charge according to their deformation. As such, a charge amplifier is a good fit for this application. This article has presented some of Figure 18. Differential amplifier nearly eliminates the general rules of thumb to keep in mind common-mode noise when design ing this circuit, such as increasing the feedback resistor as much as is practically possible, keeping an eye on the amplifiers input bias current, and using a Differential Input differential structure. This article has also demonstrated the usefulness of conducting a theoretical analysis before attempting detailed simulations.

Vcc/2

Acknowledgments
The author would like to thank Blaine Strickland, Paal Oeyvind Reichelt, Bob Kaminsky, Thomas Kuehl, Tim Green, and Sergio Salinas for their support during this project.

Single-Ended Input

References
For more information related to this article, you can down load an Acrobat Reader file at www.ti.com/lit/litnumber and replace litnumber with the TI Lit. # for the materials listed below. Document Title TI Lit. # 1. Guy Kulwanoski and Jeff Schnellinger. The Principles of Piezoelectric Accelerometers. Sensors Magazine (Feb. 1, 2004) [Online]. Available: http://www.sensorsmag.com/ articles/0204/27/main.shtml 2. Vishay surface-mount resistors [Online]. Available: http://www.vishay.com/resistorsdiscrete/res1M-1G/ 3. MicroSIZE, Single-Supply CMOS Operational Amplifiers MicroAmplifier Series, OPA337 Data Sheet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sbos077
Analog Applications Journal 1Q 2010

Document Title TI Lit. # 4. Art Kay. Analysis And Measurement Of Intrinsic Noise In Op Amp Circuits - Part IV: Introduction to SPICE Noise Analysis. EN-Genius Network: analogZONE: a/vZONE [Online]. Available with other parts of the series under audio/videoZONE TechNotes at: www.analogzone.com/tech_fram.htm

Related Web sites


amplifier.ti.com www.ti.com/sc/device/OPA337 www.ti.com/tina-ti
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Interfacing op amps to high-speed DACs, Part 3: Current-sourcing DACs simplified


By Jim Karki
Member, Technical Staff, High-Performance Analog

Introduction
Most high-speed DACs are current-steering DACs that are designed with complementary outputs that either source or sink current. Part 1 (see Reference 1) of this three-part article series discussed the interface between a currentsinking DAC and an op amp. Part 2 (see Reference 2) discussed the interface between a current-sourcing DAC and an op amp. This interface allows the designer to use the full compliance voltage range of the DAC. This article, Part 3, discusses interfacing a current-sourcing DAC and an op amp by using a simpler approach than that presented in Part 2, along with the associated trade-offs. This article series focuses on using high-speed DACs in end equipment that requires DC coupling, like signal generators with frequency bandwidths of up to 100 MHz and a singleended output. In these cases, high-speed op amps can provide a good solution for converting the complementarycurrent output from a high-speed DAC to the required output voltage. It is assumed that the reader is familiar with the operation of complementary-current-steering DACs, covered in Part 1, and the architecture and compliance voltage of current-sourcing DACs, covered in Part 2.

Simplified op amp interface


Reference 3 presents a current-sourcing DAC/op amp interface that does not require a negative reference voltage (VREF). The proposed circuit design provides a good

working solution, but with one caveat: If the maximum compliance voltage of the DAC is used as a design target on the positive side of the op amp input (VDAC+), the DAC voltage on the negative side (VDAC) will violate the maximum compliance voltage due to an offset that is not at first obvious. The following discussion explains the cause of this offset and proposes an easy workaround. Then a method for inserting a filter between the DAC and op amp is discussed. Please consult Reference 3 for other details concerning the overall design. Figure 17 shows the proposed circuit with the nomenclature slightly changed from that used in Reference 3 in order to match the circuits presented in Parts 1 and 2 of this article series. IDAC+ and IDAC are the current outputs from the DAC. R1 and R4 are used to adjust the impedance for the DAC outputs to match the design target. R2 and R3 are input resistors to the positive input of the op amp. RG and RF are the main gain-setting resistors for the op amp. VDAC+ and VDAC are the voltages at the outputs of the DAC. Vp and Vn are the input terminals of the op amp. VS+ and VS are the power supplies to the op amp. The op amp is the active amplifier element for the circuit and is configured as a difference amplifier.

Figure 17. Current-sourcing DAC/op amp interface without a negative reference voltage
AVDD IDAC+ VDAC+ R2 ZDAC+ AVDD I DAC VDAC Vn R1

DAC Termination Resistors Input Resistors to Positive Input of Op Amp VS+ Vp + Op Amp VS VOUT

R3

CurrentSourcing DAC

ZDAC

R4

RG

RF

Op Amp Gain Resistors

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With no negative reference voltage, the DAC output voltages will not swing below ground, and only positive swings are achieved. On the positive side of the op amp, the voltage is set by the current from the DAC (IDAC+) and the impedance presented by ZDAC+ = R1 || (R2 + R3). On the negative side, determining the exact voltage is not as simple due to the action of the op amp, which makes Vn nearly equal to Vp. Consider the minimum and maximum DAC voltages. On the positive side, the minimum voltage at IDAC+ = 0 is 0 V, and the maximum voltage when IDAC+ is at full scale is IDAC+(FS) ZDAC+. On the negative side, the minimum voltage at IDAC = 0 is Vn R4 . R 4 + RG

Part 2 will be used, with a compliance voltage ranging from 1.0 V to +1.25 V. Since the DAC voltage will be only positive, a reduced voltage ranging from 0 V to +1.25 V will be targeted, and the same worksheet based on Reference 3 will be used. As in the earlier examples in Parts 1 and 2 of this article series, the DACs full-scale output is set to 20 mA. A 5-VPP, DC-coupled, single-ended output signal is desired, but this time the circuit shown in Figure 17 is used. Given that IDAC = 20 mA and VDAC = 1.25 VPP, the target impedance is calculated as ZDAC = 62.5 . The THS3095 currentfeedback op amp is selected for the amplifier, and RF is set to 750 . The other items that need to be entered into the worksheet are the gain, which is VOUT = 125 , 2 I DAC and lambda (), which is set to 0.2 (see page 5 of Reference 3). With these variables entered, the worksheet shows the following calculated values: RG = 425.64 , R1 = 121.80 , R2 = 24.36 , R3 = 104.02 , and R4 = 85.13 . The nearest standard 1% values are RG = 422 , R1 = 121 , R2 = 24.3 , R3 = 105 , and R4 = 84.5 . Using these values in a simulation results in VDAC(max) = 1.408 V, which exceeds the compliance voltage and needs to be reduced. Figure 18 shows the simulation waveforms. Reducing the target ZDAC to 55 results in a lower target voltage range of 0 V to +1.1 V. With ZDAC = 55 and no other change, the worksheet shows the following calculated values: RG = 377.03 , R1 = 94.83 , R2 = 18.97 , R3 = 111.98 , and R4 = 75.41 . The nearest standard 1% values are RG = 374 , R1 = 95.3 , R2 = 19.1 , R3 = 113 , and R4 = 75 . The circuit is simulated

Because the DAC outputs are complementary, when IDAC = 0, IDAC+ is at full scale. Using R3 Vp = VDAC+ R 2 + R3 and Vn = Vp for substitution and rearrangement results in a minimum voltage on the negative side of R3 R4 VDAC(min) = VDAC+(max) . R 2 + R 3 R 4 + RG

The maximum voltage when IDAC is at full scale is IDAC(FS) R4 || RG. Because the positive-side current is zero (IDAC+ = 0), there is no contribution from the positive side to the maximum voltage on the negative side. The result of the foregoing calculations is that VDAC has a small positive shift in DC level compared to VDAC+. The design equations in Reference 3 account for this positive shift so the op amp output voltage is symmetrical about zero. If the design targets the maximum compliance voltage on the positive side (VDAC+), this positive shift Figure 18. Simulation waveforms for maximum VDAC will result in exceeding the compliance voltage on the negative side (VDAC); therefore a lower voltage should 20 be used as the design target. Due to the interactive IDAC+ nature of the design equations, it was not possible to (mA) find a closed-form equation to calculate the maximum 0 20 allowed voltage for VDAC+, which in essence means that IDAC to start the design, the target impedance for ZDAC+ must (mA) be found. An easy way around this is to set up an Excel 0 worksheet based on Reference 3 to calculate the compo1.25 VDAC+ nent values and DAC output voltages. Different values (max) for ZDAC+ can then be tried until an acceptable result is 0 achieved. To view an example worksheet, go to http:// 1.41 www.ti.com/lit/zip/slyt368 and click Open to view the VDAC (max) WinZip directory online (or click Save to download the 0.17 WinZip file for offline use). Then open the file DAC_ 2.52 Source_to_Op_Amp_Wksht_Part3.xls and select the VOUT Simplified VDAC Calculation worksheet tab. (max) For an example of how to use a worksheet for a 2.50 design, assume that one of the PMOS DACs noted in 0 10 20 30
Time (s)

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again, and the resulting waveforms (see Figure 19) show that the compliance-voltage specification is just met. The amplitude of the AC sine wave, disregarding the DC offset, is the same at VDAC+ and VDAC. Therefore, when the exact resistor values are used, the iteration process can be shortened by taking the results of the first calculation and making ZDAC+ = VDAC+(max) VDAC(min) I DAC(max)

Figure 19. Simulation waveforms for reduced VDAC


20 IDAC+ (mA) 0 20 IDAC (mA) 0 1.11 VDAC+ 0 1.25
(Reduced)

in the second try. In the example worksheet, the upper area labeled Iterative Method is used for simple trial and error; and the lower area labeled Shorter Method uses the results of the first try for the second try, which in this example converges to the same result. To see a TINA-TI simulation of the circuit in this example, go to http://www.ti.com/lit/zip/slyt368 and click Open to view the WinZip directory online (or click Save to download the WinZip file for offline use). If you have the TINA-TI software installed, you can open the file Simplified_DAC_Source_Interface.TSC to view the example. To download and install the free TINA-TI software, visit www.ti.com/tina-ti and click the Download button. The simulation circuit and waveforms in this file show that the circuit simulates as expected. IDAC+ and IDAC are the DAC currents, VDAC+ and VDAC are the voltages developed at the DAC outputs, and VOUT is the output of the amplifier. The current-sourcing DAC and op amp are ideal elements constructed with SPICE macros and are intended to show that the equations used are valid for ideal elements. Actual performance will vary depending on selected devices.

(Reduced)

VDAC

0.16 2.53
(Reduced)

VOUT

2.50 0 10 Time (s) 20 30

ance the filter should be placed directly at the DAC output before the op amp. The situation is the same here. As mentioned in Part 1, it is usually much easier to find standard component values to implement the filter when the input and output impedances to the filter are balanced. Figure 20 shows a proposed circuit implementation where R1 and R4 have been replaced with prime and doubleprime components on either side of the filter, so that || R1 , R1 = R1 and R4 = R 4 || R 4.

DAC image-filter considerations


Part 1 discussed the need for a filter to remove the DAC sampling images and recommended that for best perform

Figure 20. Inserting DAC image filter

AVDD IDAC+ 2ZDAC+ R2 Filter R 1 AVDD Vn I DAC Filter CurrentSourcing DAC R 4 2ZDAC R 4 RG RF R 1 R3 VS+ Vp + Op Amp VS VOUT

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Assuming that R1 and R4 are already known, and with the additional constraint that the impedance seen on each terminal of the filter is 2ZDAC, the new values can be found with the following equations: = 2ZDAC+ R1 1 1 1 = R1 R1 R1 R 4 = 2ZDAC 1 1 1 = R R R 4 4 4 (39) (40) (41) (42)

Conclusion
This article has shown a circuit implementation that uses a single-stage op amp to convert differential current outputs from a current-sourcing DAC to a single-ended voltage. This circuit is based on a design methodology presented in Reference 3. This article has also discussed the need to reduce the designs target voltage on the positive side of the op amps input (VDAC+) so that the DAC voltage on the negative side (VDAC) will not violate the maximum compliance voltage. It was shown that such a violation could be due to an offset from the positive side through the action of the op amp, and an easy workaround was proposed to compensate for this offset. A method for inserting a filter between the DAC and the op amp was also shown, along with design equations to compute the new component values.

These equations are easily solved when set up in a spreadsheet. To see an example Excel worksheet, go to http://www.ti.com/lit/zip/slyt368 and click Open to view the WinZip directory online (or click Save to download the WinZip file for offline use). Then open the file DAC_ Source_to_Op_Amp_Wksht_Part3.xls and select the Simplified VDAC with Filter worksheet tab. Similar to the Simplified VDAC Calculation worksheet previously mentioned, the upper area labeled Iterative Method with Filter is used for simple trial and error; and the lower area labeled Shorter Method with Filter uses the results of the first try for the second try, which in this example converges to the same result. Please refer to Part 1 for SPICE simulation results that show the effects of matched versus unmatched impedance.

References
For more information related to this article, you can down load an Acrobat Reader file at www.ti.com/lit/litnumber and replace litnumber with the TI Lit. # for the materials listed below. Document Title TI Lit. # 1. Jim Karki, Interfacing Op Amps to HighSpeed DACs, Part 1: Current-Sinking DACs, Analog Applications Journal (3Q 2009) . . . . . slyt342 2. Jim Karki, Interfacing Op Amps to HighSpeed DACs, Part 2: Current-Sourcing DACs, Analog Applications Journal (4Q 2009) . . . . . slyt360 3. Michael Steffes, Wideband Complementary Current Output DAC to Single-Ended Interface: Improved Matching for the Gain and Compliance Voltage Swing, Application Report . . . . . . . . . . . . . . . . . . . . . . . . sbaa135

35 Analog Applications Journal 1Q 2010 www.ti.com/aaj High-Performance Analog Products

Index of Articles

Texas Instruments Incorporated

Index of Articles
Title Issue Page Lit. No.
SLYT191 SLYT192 SLYT193 SLYT183 SLYT184 SLYT175 SLYT176 SLYT168 SLYT169 SLYT158 SLYT159 SLYT160 SLYT148 SLYT149 SLYT150 SLYT136 SLYT137 SLYT138 SLYT129 SLYT123 SLYT114 SLYT115 SLYT109 SLYT110 SLYT111 SLYT104 SLYT089 SLYT090 SLYT091 SLYT082 SLYT083 SLYT078 SLYT073 SLYT074 SLYT075 SLYT076 SLYT209A SLYT210 SLYT222 SLYT223 SLYT231 SLYT237 SLYT244 SLYT253 SLYT264 SLYT277 SLYT283 Aspects of data acquisition system design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 1999 . . . . . . . 1 Low-power data acquisition sub-system using the TI TLV1572 . . . . . . . . . . . . . . . . . . . . . . . . . . . August 1999 . . . . . . . 4 Evaluating operational amplifiers as input amplifiers for A-to-D converters . . . . . . . . . . . . . . . . . August 1999 . . . . . . . 7 Precision voltage references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . . 1 Techniques for sampling high-speed graphics with lower-speed A/D converters . . . . . . . . . . . . . November 1999 . . . . 5 A methodology of interfacing serial A-to-D converters to DSPs . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . . 1 The operation of the SAR-ADC based on charge redistribution . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . 10 The design and performance of a precision voltage reference circuit for 14-bit and 16-bit A-to-D and D-to-A converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . . 1 Introduction to phase-locked loop system modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . . 5 New DSP development environment includes data converter plug-ins . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . . 1 Higher data throughput for DSP analog-to-digital converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . . 5 Efficiently interfacing serial data converters to high-speed DSPs . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 10 Smallest DSP-compatible ADC provides simplest DSP interface . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . . 1 Hardware auto-identification and software auto-configuration for the TLV320AIC10 DSP Codec a plug-and-play algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . . 8 Using quad and octal ADCs in SPI mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 15 Building a simple data acquisition system using the TMS320C31 DSP . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . . 1 Using SPI synchronous communication with data converters interfacing the MSP430F149 and TLV5616 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . . 7 A/D and D/A conversion of PC graphics and component video signals, Part 1: Hardware . . . . . February 2001 . . . . 11 A/D and D/A conversion of PC graphics and component video signals, Part 2: Software and control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . . 5 Intelligent sensor system maximizes battery life: Interfacing the MSP430F123 Flash MCU, ADS7822, and TPS60311 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Q, 2002 . . . . . . . . . . 5 SHDSL AFE1230 application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . . 5 Synchronizing non-FIFO variations of the THS1206 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 12 Adjusting the A/D voltage reference to provide gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2002 . . . . . . . . . . 5 MSC1210 debugging strategies for high-precision smart sensors . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2002 . . . . . . . . . . 7 Using direct data transfer to maximize data acquisition throughput . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2002 . . . . . . . . . 14 Interfacing op amps and analog-to-digital converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2002 . . . . . . . . . . 5 ADS82x ADC with non-uniform sampling clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2003 . . . . . . . . . . 5 Calculating noise figure and third-order intercept in ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2003 . . . . . . . . . 11 Evaluation criteria for ADSL analog front end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2003 . . . . . . . . . 16 Two-channel, 500-kSPS operation of the ADS8361 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . . 5 ADS809 analog-to-digital converter with large input pulse signal . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . . 8 Streamlining the mixed-signal path with the signal-chain-on-chip MSP430F169 . . . . . . . . . . . . . 3Q, 2004 . . . . . . . . . . 5 Supply voltage measurement and ADC PSRR improvement in MSC12xx devices . . . . . . . . . . . . 1Q, 2005 . . . . . . . . . . 5 14-bit, 125-MSPS ADS5500 evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2005 . . . . . . . . . 13 Clocking high-speed data converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2005 . . . . . . . . . 20 Implementation of 12-bit delta-sigma DAC with MSC12xx controller . . . . . . . . . . . . . . . . . . . . . . 1Q, 2005 . . . . . . . . . 27 Using resistive touch screens for human/machine interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2005 . . . . . . . . . . 5 Simple DSP interface for ADS784x/834x ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2005 . . . . . . . . . 10 Operating multiple oversampling data converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2005 . . . . . . . . . . 5 Low-power, high-intercept interface to the ADS5424 14-bit, 105-MSPS converter for undersampling applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2005 . . . . . . . . . 10 Understanding and comparing datasheets for high-speed ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2006 . . . . . . . . . . 5 Matching the noise performance of the operational amplifier to the ADC . . . . . . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . . 5 Using the ADS8361 with the MSP430 USI port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2006 . . . . . . . . . . 5 Clamp function of high-speed ADC THS1041 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2006 . . . . . . . . . . 5 Conversion latency in delta-sigma converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . . 5 Calibration in touch-screen systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2007 . . . . . . . . . . 5 Using a touch-screen controllers auxiliary inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2007 . . . . . . . . . . 5 36 High-Performance Analog Products www.ti.com/aaj 1Q 2010 Analog Applications Journal

Data Acquisition

Texas Instruments Incorporated

Index of Articles

Title

Issue

Page Lit. No.


SLYT292 SLYT300 SLYT306 SLYT331 SLYT338 SLYT339 SLYT355 SLYT194 SLYT195 SLYT196 SLYT185 SLYT186 SLYT187 SLYT177 SLYT178 SLYT170 SLYT171 SLYT161 SLYT162 SLYT151 SLYT152 SLYT139 SLYT140 SLYT130 SLYT131 SLYT124 SLYT125 SLYT126 SLYT116 SLYT117 SLYT118 SLYT105 SLYT106 SLYT107 SLYT100 SLYT101 SLYT095 SLYT096 SLYT097 SLYT092 SLYT084 SLYT079 SLYT077 SLYT201 SLYT202 SLYT211 SLYT212 SLYT224 SLYT225 SLYT232 SLYT233 37

Understanding the pen-interrupt (PENIRQ) operation of touch-screen controllers . . . . . . . . . . . 2Q, 2008 . . . . . . . . . . 5 A DAC for all precision occasions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2008 . . . . . . . . . . 5 Stop-band limitations of the Sallen-Key low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . . 5 How the voltage reference affects ADC performance, Part 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2009 . . . . . . . . . . 5 Impact of sampling-clock spurs on ADC performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2009 . . . . . . . . . . 5 How the voltage reference affects ADC performance, Part 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2009 . . . . . . . . . 13 How the voltage reference affects ADC performance, Part 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2009 . . . . . . . . . . 5 Stability analysis of low-dropout linear regulators with a PMOS pass element . . . . . . . . . . . . . . . August 1999 . . . . . . 10 Extended output voltage adjustment (0 V to 3.5 V) using the TI TPS5210 . . . . . . . . . . . . . . . . . . August 1999 . . . . . . 13 Migrating from the TI TL770x to the TI TLC770x . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 1999 . . . . . . 14 TI TPS5602 for powering TIs DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . . 8 Synchronous buck regulator design using the TI TPS5211 high-frequency hysteretic controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . 10 Understanding the stable range of equivalent series resistance of an LDO regulator . . . . . . . . . . November 1999 . . . 14 Power supply solutions for TI DSPs using synchronous buck converters . . . . . . . . . . . . . . . . . . . February 2000 . . . . 12 Powering Celeron-type microprocessors using TIs TPS5210 and TPS5211 controllers . . . . . . . . February 2000 . . . . 20 Simple design of an ultra-low-ripple DC/DC boost converter with TPS60100 charge pump . . . . May 2000 . . . . . . . . 11 Low-cost, minimum-size solution for powering future-generation Celeron-type processors with peak currents up to 26 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . 14 Advantages of using PMOS-type low-dropout linear regulators in battery applications . . . . . . . August 2000 . . . . . . 16 Optimal output filter design for microprocessor or DSP power supply . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 22 Understanding the load-transient response of LDOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 19 Comparison of different power supplies for portable DSP solutions working from a single-cell battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 24 Optimal design for an interleaved synchronous buck converter under high-slew-rate, load-current transient conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 15 48-V/+48-V hot-swap applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 20 Power supply solution for DDR bus termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . . 9 Runtime power control for DSPs using the TPS62000 buck converter . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . 15 Power control design key to realizing InfiniBandSM benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2002 . . . . . . . . . 10 Comparing magnetic and piezoelectric transformer approaches in CCFL applications . . . . . . . . 1Q, 2002 . . . . . . . . . 12 Why use a wall adapter for ac input power? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2002 . . . . . . . . . 18 SWIFT Designer power supply design program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 15 Optimizing the switching frequency of ADSL power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 23 Powering electronics from the USB port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 28 Using the UCC3580-1 controller for highly efficient 3.3-V/100-W isolated supply design . . . . . . . 4Q, 2002 . . . . . . . . . . 8 Power conservation options with dynamic voltage scaling in portable DSP designs . . . . . . . . . . . 4Q, 2002 . . . . . . . . . 12 Understanding piezoelectric transformers in CCFL backlight applications . . . . . . . . . . . . . . . . . . 4Q, 2002 . . . . . . . . . 18 Load-sharing techniques: Paralleling power modules with overcurrent protection . . . . . . . . . . . 1Q, 2003 . . . . . . . . . . 5 Using the TPS61042 white-light LED driver as a boost converter . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2003 . . . . . . . . . . 7 Auto-Track voltage sequencing simplifies simultaneous power-up and power-down . . . . . . . . 3Q, 2003 . . . . . . . . . . 5 Soft-start circuits for LDO linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2003 . . . . . . . . . 10 UCC28517 100-W PFC power converter with 12-V, 8-W bias supply, Part 1 . . . . . . . . . . . . . . . . . 3Q, 2003 . . . . . . . . . 13 UCC28517 100-W PFC power converter with 12-V, 8-W bias supply, Part 2 . . . . . . . . . . . . . . . . . 4Q, 2003 . . . . . . . . . 21 LED-driver considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . 14 Tips for successful power-up of todays high-performance FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2004 . . . . . . . . . 11 A better bootstrap/bias supply circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2005 . . . . . . . . . 33 Understanding noise in linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2005 . . . . . . . . . . 5 Understanding power supply ripple rejection in linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2005 . . . . . . . . . . 8 Miniature solutions for voltage isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2005 . . . . . . . . . 13 New power modules improve surface-mount manufacturability . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2005 . . . . . . . . . 18 Li-ion switching charger integrates power FETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2005 . . . . . . . . . 19 TLC5940 dot correction compensates for variations in LED brightness . . . . . . . . . . . . . . . . . . . . 4Q, 2005 . . . . . . . . . 21 Powering todays multi-rail FPGAs and DSPs, Part 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2006 . . . . . . . . . . 9 TPS79918 RF LDO supports migration to StrataFlash Embedded Memory (P30) . . . . . . . . . . . 1Q, 2006 . . . . . . . . . 14

Data Acquisition (Continued)

Power Management

Analog Applications Journal

1Q 2010

www.ti.com/aaj

High-Performance Analog Products

Index of Articles

Texas Instruments Incorporated

Title

Issue

Page Lit. No.


SLYT234 SLYT238 SLYT239 SLYT240 SLYT245 SLYT246 SLYT247 SLYT248 SLYT254 SLYT255 SLYT256 SLYT259 SLYT260 SLYT261 SLYT269 SLYT270 SLYT278 SLYT279 SLYT280 SLYT281 SLYT284 SLYT285 SLYT286 SLYT293 SLYT294 SLYT302 SLYT307 SLYT308 SLYT309 SLYT320 SLYT321 SLYT322 SLYT323 SLYT332 SLYT333 SLYT334 SLYT340 SLYT356 SLYT357 SLYT358 SLYT364 SLYT365 SLYT366 SLYT197 SLYT188 SLYT179 SLYT180 SLYT172 SLYT163 SLYT153 SLYT154 SLYT132

Practical considerations when designing a power supply with the TPS6211x . . . . . . . . . . . . . . . . 1Q, 2006 . . . . . . . . . 17 TLC5940 PWM dimming provides superior color quality in LED video displays . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . 10 Wide-input dc/dc modules offer maximum design flexibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . 13 Powering todays multi-rail FPGAs and DSPs, Part 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . 18 TPS61059 powers white-light LED as photoflash or movie light . . . . . . . . . . . . . . . . . . . . . . . . . . .3Q, 2006 . . . . . . . . . . 8 TPS65552A powers portable photoflash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2006 . . . . . . . . . 10 Single-chip bq2403x power-path manager charges battery while powering system . . . . . . . . . . . . 3Q, 2006 . . . . . . . . . 12 Complete battery-pack design for one- or two-cell portable applications . . . . . . . . . . . . . . . . . . . 3Q, 2006 . . . . . . . . . 14 A 3-A, 1.2-VOUT linear regulator with 80% efficiency and PLOST < 1 W . . . . . . . . . . . . . . . . . . . . . 4Q, 2006 . . . . . . . . . 10 bq25012 single-chip, Li-ion charger and dc/dc converter for Bluetooth headsets . . . . . . . . . . . 4Q, 2006 . . . . . . . . . 13 Fully integrated TPS6300x buck-boost converter extends Li-ion battery life . . . . . . . . . . . . . . . . 4Q, 2006 . . . . . . . . . 15 Selecting the correct IC for power-supply applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2007 . . . . . . . . . . 5 LDO white-LED driver TPS7510x provides incredibly small solution size . . . . . . . . . . . . . . . . . . . 1Q, 2007 . . . . . . . . . . 9 Power management for processor core voltage requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1Q, 2007 . . . . . . . . . 11 Enhanced-safety, linear Li-ion battery charger with thermal regulation and input overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . . 8 Current balancing in four-pair, high-power PoE applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . 11 Power-management solutions for telecom systems improve performance, cost, and size . . . . . . 3Q, 2007 . . . . . . . . . 10 TPS6108x: A boost converter with extreme versatility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2007 . . . . . . . . . 14 Get low-noise, low-ripple, high-PSRR power with the TPS717xx . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2007 . . . . . . . . . 17 Simultaneous power-down sequencing with the TPS74x01 family of linear regulators . . . . . . . . 3Q, 2007 . . . . . . . . . 20 Driving a WLED does not always require 4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2007 . . . . . . . . . . 9 Host-side gas-gauge-system design considerations for single-cell handheld applications . . . . . . 4Q, 2007 . . . . . . . . . 12 Using a buck converter in an inverting buck-boost topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2007 . . . . . . . . . 16 Understanding output voltage limitations of DC/DC buck converters . . . . . . . . . . . . . . . . . . . . . . 2Q, 2008 . . . . . . . . . 11 Battery-charger front-end IC improves charging-system safety . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2008 . . . . . . . . . 14 New current-mode PWM controllers support boost, flyback, SEPIC, and LED-driver applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2008 . . . . . . . . . . 9 Getting the most battery life from portable systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . . 8 Compensating and measuring the control loop of a high-power LED driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . 14 Designing DC/DC converters based on SEPIC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . 18 Paralleling power modules for high-current applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . . 5 Improving battery safety, charging, and fuel gauging in portable media applications . . . . . . . . . . 1Q, 2009 . . . . . . . . . . 9 Cell balancing buys extra run time and battery life . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . 14 Using a portable-power boost converter in an isolated flyback application . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . 19 Taming linear-regulator inrush currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2009 . . . . . . . . . . 9 Designing a linear Li-Ion battery charger with power-path control . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2009 . . . . . . . . . 12 Selecting the right charge-management solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2009 . . . . . . . . . 18 Reducing radiated EMI in WLED drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3Q, 2009 . . . . . . . . . 17 Using power solutions to extend battery life in MSP430 applications . . . . . . . . . . . . . . . . . . . . . . 4Q, 2009 . . . . . . . . . 10 Designing a multichemistry battery charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2009 . . . . . . . . . 13 Efficiency of synchronous versus nonsynchronous buck converters . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2009 . . . . . . . . . 15 Fuel-gauging considerations in battery backup storage systems . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . . . 5 Li-ion battery-charger solutions for JEITA compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . . . 8 Power-supply design for high-speed ADCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . . 12 TIA/EIA-568A Category 5 cables in low-voltage differential signaling (LVDS) . . . . . . . . . . . . . . . August 1999 . . . . . . Keep an eye on the LVDS input levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . Skew definition and jitter analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . LVDS receivers solve problems in non-LVDS applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . LVDS: The ribbon cable connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . Performance of LVDS with different cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . A statistical survey of common-mode noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . The Active Fail-Safe feature of the SN65LVDS32A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . The SN65LVDS33/34 as an ECL-to-LVTTL converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . 38 High-Performance Analog Products www.ti.com/aaj 1Q 2010

Power Management (Continued)

Interface (Data Transmission)

16 17 29 33 19 30 30 35 19

Analog Applications Journal

Texas Instruments Incorporated

Index of Articles

Title

Issue

Page Lit. No.


23 18 21 16 11 25 17 18 18 11 16 22 25 21 19 24 39 39 23 27 41 34 40 26 SLYT127 SLYT085 SLYT086 SLYT080 SLYT203 SLYT241 SLYT249 SLYT257 SLYT271 SLYT298 SLYT301 SLYT324 SLYT325 SLYT335 SLYT198 SLYT199 SLYT182 SLYT155 SLYT141 SLYT142 SLYT145 SLYT134 SLYT135 SLYT128 SLYT189 SLYT190 SLYT181 SLYT173 SLYT174 SLYT164 SLYT165 SLYT166 SLYT167 SLYT156 SLYT157 SLYT143 SLYT144 SLYT146 SLYT133 SLYT119 SLYT120 SLYT121 SLYT112 SLYT113 SLYT108 SLYT102 SLYT103 SLYT098 SLYT099 SLYT094 SLYT087 SLYT088 39

Power consumption of LVPECL and LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2002 . . . . . . . . . Estimating available application power for Power-over-Ethernet applications . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . The RS-485 unit load and maximum number of bus connections . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . Failsafe in RS-485 data buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2004 . . . . . . . . . Maximizing signal integrity with M-LVDS backplanes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2005 . . . . . . . . . Device spacing on RS-485 buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . Improved CAN network security with TIs SN65HVD1050 transceiver . . . . . . . . . . . . . . . . . . . . . 3Q, 2006 . . . . . . . . . Detection of RS-485 signal loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2006 . . . . . . . . . Enabling high-speed USB OTG functionality on TI DSPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . When good grounds turn badisolate! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2008 . . . . . . . . . Cascading of input serializers boosts channel density for digital inputs . . . . . . . . . . . . . . . . . . . . . 3Q, 2008 . . . . . . . . . RS-485: Passive failsafe for an idle bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . Message priority inversion on a CAN bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . Designing with digital isolators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2009 . . . . . . . . . Reducing the output filter of a Class-D amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 1999 . . . . . . Power supply decoupling and audio signal filtering for the Class-D audio power amplifier . . . . . August 1999 . . . . . . PCB layout for the TPA005D1x and TPA032D0x Class-D APAs . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . An audio circuit collection, Part 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 1.6- to 3.6-volt BTL speaker driver reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . Notebook computer upgrade path for audio power amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . An audio circuit collection, Part 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . An audio circuit collection, Part 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . Audio power amplifier measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . Audio power amplifier measurements, Part 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2002 . . . . . . . . .

Interface (Data Transmission) (Continued)

Amplifiers: Audio

Single-supply op amp design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . 20 Reducing crosstalk of an op amp on a PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 1999 . . . 23 Matching operational amplifier bandwidth with applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2000 . . . . 36 Sensor to ADC analog interface design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . 22 Using a decompensated op amp for improved performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . May 2000 . . . . . . . . 26 Design of op amp sine wave oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 33 Fully differential amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 38 The PCB is a component of op amp design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 42 Reducing PCB design costs: From schematic capture to PCB layout . . . . . . . . . . . . . . . . . . . . . . August 2000 . . . . . . 48 Thermistor temperature transducer-to-ADC application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 44 Analysis of fully differential amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . November 2000 . . . 48 Fully differential amplifiers applications: Line termination, driving high-speed ADCs, and differential transmission lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 32 Pressure transducer-to-ADC application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 38 Frequency response errors in voltage feedback op amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 48 Designing for low distortion with high-speed op amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . July 2001 . . . . . . . . 25 Fully differential amplifier design in high-speed data acquisition systems . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 35 Worst-case design of op amp circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 42 Using high-speed op amps for high-performance RF design, Part 1 . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 46 Using high-speed op amps for high-performance RF design, Part 2 . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2002 . . . . . . . . . 21 FilterPro low-pass design tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2002 . . . . . . . . . 24 Active output impedance for ADSL line drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2002 . . . . . . . . . 24 RF and IF amplifiers with op amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2003 . . . . . . . . . . 9 Analyzing feedback loops containing secondary amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2003 . . . . . . . . . 14 Video switcher using high-speed op amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2003 . . . . . . . . . 20 Expanding the usability of current-feedback amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2003 . . . . . . . . . 23 Calculating noise figure in op amps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2003 . . . . . . . . . 31 Op amp stability and input capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . 24 Integrated logarithmic amplifiers for industrial applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2004 . . . . . . . . . 28

Amplifiers: Op Amps

Analog Applications Journal

1Q 2010

www.ti.com/aaj

High-Performance Analog Products

Index of Articles

Texas Instruments Incorporated

Title

Issue

Page Lit. No.


21 19 24 25 19 27 14 22 18 24 29 29 33 21 24 33 19 23 20 24 32 SLYT081 SLYT204 SLYT213 SLYT226 SLYT235 SLYT242 SLYT262 SLYT272 SLYT299 SLYT310 SLYT311 SLYT326 SLYT336 SLYT341 SLYT342 SLYT343 SLYT359 SLYT360 SLYT367 SLYT369 SLYT368

Active filters using current-feedback amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2004 . . . . . . . . . Auto-zero amplifiers ease the design of high-precision circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2005 . . . . . . . . . So many amplifiers to choose from: Matching amplifiers to applications . . . . . . . . . . . . . . . . . . . . 3Q, 2005 . . . . . . . . . Getting the most out of your instrumentation amplifier design . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2005 . . . . . . . . . High-speed notch filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2006 . . . . . . . . . Low-cost current-shunt monitor IC revives moving-coil meter design . . . . . . . . . . . . . . . . . . . . . . 2Q, 2006 . . . . . . . . . Accurately measuring ADC driving-circuit settling time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2007 . . . . . . . . . New zero-drift amplifier has an IQ of 17 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . A new filter topology for analog high-pass filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Q, 2008 . . . . . . . . . Input impedance matching with fully differential amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . A dual-polarity, bidirectional current-shunt monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Q, 2008 . . . . . . . . . Output impedance matching with fully differential operational amplifiers . . . . . . . . . . . . . . . . . . 1Q, 2009 . . . . . . . . . Using fully differential op amps as attenuators, Part 1: Differential bipolar input signals . . . . . . 2Q, 2009 . . . . . . . . . Using fully differential op amps as attenuators, Part 2: Single-ended bipolar input signals . . . . . 3Q, 2009 . . . . . . . . . Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs . . . . . . . . . . . . . . . . . . . . 3Q, 2009 . . . . . . . . . Using the infinite-gain, MFB filter topology in fully differential active filters . . . . . . . . . . . . . . . . 3Q, 2009 . . . . . . . . . Using fully differential op amps as attenuators, Part 3: Single-ended unipolar input signals . . . . 4Q, 2009 . . . . . . . . . Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACs . . . . . . . . . . . . . . . . . . 4Q, 2009 . . . . . . . . . Operational amplifier gain stability, Part 1: General system analysis . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . . Signal conditioning for piezoelectric sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . . Interfacing op amps to high-speed DACs, Part 3: Current-sourcing DACs simplified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Q, 2010 . . . . . . . . .

Amplifiers: Op Amps (Continued)

Using the CC2430 and TIMAC for low-power wireless sensor applications: A powerconsumption study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2008 . . . . . . . . . 17 Selecting antennas for low-power wireless applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2008 . . . . . . . . . 20 Synthesis and characterization of nickel manganite from different carboxylate precursors for thermistor sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . February 2001 . . . . 52 Analog design tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2002 . . . . . . . . . 50 Spreadsheet modeling tool helps analyze power- and ground-plane voltage drops to keep core voltages within tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Q, 2007 . . . . . . . . . 29

Low-Power RF

SLYT295 SLYT296

General Interest

SLYT147 SLYT122 SLYT273

40 High-Performance Analog Products www.ti.com/aaj 1Q 2010 Analog Applications Journal

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41 Analog Applications Journal 1Q 2010 www.ti.com/aaj High-Performance Analog Products