A Precision DTMOST-based Temperature Sensor

Kamran Souri1, Youngcheol Chae1, Youri Ponomarev2, and Kofi A.A. Makinwa1
1

Electronic Instrumentation Laboratory / DIMES, Delft University of Technology, Delft, the Netherlands 2 NXP-Semiconductors, Leuven, Belgium k.souri@tudelft.nl

AbstractThis paper describes a precision temperature sensor based on dynamic threshold MOS (DTMOS) transistors. By using the DTMOS configuration, i.e. by connecting the body of a MOSFET to its gate, a near-ideal diode characteristic can be realized. The resulting device can then replace the substrate PNP used in most precision temperature sensors. After a twotemperature trim, the proposed sensor achieves an inaccuracy of 0.1C (3) over the military temperature range: 55C to 125C. This represents a 5x improvement in accuracy over previously reported MOSFET-based temperature sensors. The chip was implemented in a 0.16-m standard CMOS process. At a conversion rate of 5Hz, it achieves a resolution of 33mK, while dissipating only 8.6 W from a 1.8V supply.

MOSFETs can also be used as temperature sensing elements. At -55C, however, VGS will only be a few hundred millivolts, which makes sub-1V operation possible. Unfortunately, process spread affects two parameters of a MOSFET: the threshold voltage VT and the charge mobility . As a result, such sensors exhibit greater inaccuracy: about -1.8/+1C from 10C to 80C after a single-temperature trim [5]. The propagation delay of a CMOS inverter can also be used as a measure of temperature. Compared to BJT-based sensors, however, such sensors suffer from much greater supply sensitivity (about 10C/V) and greater inaccuracy (-0.4/+0.6C) over a limited (90C) range, even after a morecostly two-temperature trim [6]. This work describes a CMOS temperature sensor that explores the use of dynamic threshold MOS (DTMOS) transistors as sensing elements. A DTMOS transistor is a normal MOSFET whose body and gate are connected together. This causes its threshold voltage to vary dynamically, hence the name [7]. Compared to a diodeconnected MOSFET, the VGS-ID characteristic of a diodeconnected DTMOS transistor, i.e. a DTMOS diode, is less sensitive to VT spread [7-9]. A single-temperature trim results in an inaccuracy of 0.4C (3) over the military temperature range, which improves to 0.1C (3) after a two-temperature trim. Compared to state-of-the-art MOSFET-based sensors [6], this represents a 5x improvement in accuracy. In the following section the operation of DTMOS transistors is analyzed in detail. Section III is devoted to the sensor design, while the measurement results are presented in section IV. The paper ends with conclusions. II. DYNAMIC THRESHOLD MOS (DTMOS) FETS

I.

INTRODUCTION

Smart temperature sensors, i.e. temperature sensors with a digital output, are used in many commercial applications. When realized in CMOS technology, the sensing element is usually a parasitic bipolar junction transistor (BJT), i.e. a PNP or NPN transistor, whose base-emitter voltage VBE has a well-defined temperature dependency [1-3]. The dominant source of inaccuracy in such sensors is the effect of process spread on the BJTs saturation current IS, which, in turn, results in proportional-to-absolute-temperature (PTAT) errors. A single temperature trim, therefore, is enough to compensate for IS spread and achieve inaccuracy levels less than 0.2C over the military temperature range: -55C to 125C [1, 2]. BJT-based sensors also achieve low supplysensitivity, typically in the order of 0.1C/V. However, BJT-based sensors typically require supply voltages above 1V, since VBE will be about 0.8V at -55C and some headroom is required for the current source that biases the BJT. This restricts the use of such sensors in batterypowered systems, and also restricts the temperature range of implementations in nanometer CMOS [4]. To achieve sub-1V operation, MOSFET-based temperature sensors have been proposed [5]. When biased in the sub-threshold region, the drain current ID and the gatesource voltage VGS of a MOSFET exhibit a temperaturedependent exponential relationship, similar to that between the collector current IC and VBE of a BJT. As a result,

When biased in the sub-threshold region, the drain current of a normal MOSFET can be described as follows [8]: q bulk ID exp V - V bulk (1) m k T GS T where k is the Boltzmanns constant, T is the absolute temperature, and q is the electron charge.

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circuits can be designed and optimized with the help of standard compact models. This is another advantage over parasitic BJTs, which require other models, and which are often not very accurately characterized. III. TEMPERATURE SENSOR DESIGN

Figure 1. A P-type DTMOS diode; cross section view (a), symbol view (b).

The parameter m = 1+CD/COX, is the body effect coefficient, where CD and COX are the depletion-layer and gate-oxide capacitances, respectively [8]. The value of CD depends on the width of depletion layer, which in turn depends on the well doping and on the surface potential S [7]. However, the oxide capacitance COX suffers from process spread, while the threshold voltage VTbulk varies due to the body effect. In consequence, the term (VGS - VTbulk) will be a function of IDbulk, which means that the relationship between IDbulk and VGS is only approximately exponential. A cross section of a diode-connected P-type DTMOS transistor is shown in Fig. 1. It is a standard P-type MOSFET, whose body, drain, and gate terminals are tied together. This device is available in most baseline CMOS processes [7]. The connection between the gate and body terminals fixes the width of the depletion layer under the channel. As a result, the drain current IDDT of a DTMOS transistor operated in the subthreshold region can be expressed as follows [8]: q DT ID exp V - V DT (2) k T GS T The key observation is that the gate-body connection ensures that the threshold voltage VTDT of a DTMOS transistor is well-defined. As a result, a DTMOS diode exhibits a nearideal exponential relationship between IDDT and VGS, which is less dependent on COX and CD [8]. Furthermore, the gatesource voltage VGS of a DTMOS transistor exhibits less spread, about half that of a normal MOSFET [7, 8] Like the base-emitter voltage VBE of a BJT, the gate-source voltage VGS of a DTMOS diode exhibits complementary-toabsolute temperature (CTAT) behavior, but with a smaller temperature coefficient: about -1mV/C. In a similar manner, the difference in the gate-source voltage VGS of two DTMOS diodes is PTAT: VGS = (kT/q) ln(p), where p is the bias current ratio and kT/q is the thermal voltage. However, a DTMOS transistor has an effective band-gap voltage of roughly 0.6V [7], i.e. about half the band-gap voltage of a BJT. This is due to the built-in-potential between gate and Nwell, which, in turn, is induced by the presence of the P-type gate. The discussion above suggests that DTMOS transistors can be used to implement sub-1V band-gap references [7, 10] and temperature sensors in standard CMOS. Since DTMOS transistors are just alternatively connected MOSFETs, such

Fig. 2 shows the CTAT and PTAT behavior of the VGS and VGS voltages of a DTMOS diode. As in a band-gap voltage reference, a reference voltage can be derived from a linear combination of VGS and VGS [7]: VREF = VGS + VGS, where is the fixed gain factor required to obtain a nominally zero temperature coefficient. As in a band-gap (BJT-based) temperature sensor [1], an analog-to-digital converter (ADC) can then digitize the PTAT ratio between the PTAT voltage VGS and VREF, to obtain: VGS = (3) VGS + VGS where varies between 0 and 1. For the bias current ratio p=5 used in this design, 8. A linear scaling of then results in a digital output in degrees Celsius [1]: Dout = A+B, where A 600, and B -273. More simply, the ratio between VGS and VGS can be used as a measure of temperature [3]. For p = 5, the resulting nonlinear ratio X = VGS / VGS ranges between 3 and 12 for temperatures ranging from -55C to 125C. As in [3], this ratio can also be digitized by an ADC. The PTAT ratio can then be readily derived from X as: = / ( + X) (Fig. 3). At -55C the VGS of a DTMOS diode is about 400mV, about half that of a diode-connected BJT. In the front-end of the proposed sensor (Fig. 2), the voltages VGS and VGS are generated by two identical DTMOS diodes biased at Ib = 90nA (at 25C) and 5Ib. The required current ratio p = 5 is established with the help of six unit current sources. As in [1, 3], dynamic element matching (DEM) is used to average out the mismatch between these current sources and between the two DTMOS diodes, as this would otherwise cause significant temperature-sensing errors. The biasing currents are generated by the same PNP-based bias circuit used in the BJT-based sensor of [3]. This choice allows a fair comparison to be made between BJT- and DTMOS-based temperature sensors, but also precludes sub1V operation.

Figure 2. Temperature dependence of VGS and VGS, generated by two DTMOS diodes biased in sub-threshol region.

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Figure 3. Block diagram of the smart temperature sensor.

Another source of current-ratio error, especially at high temperatures, is the source-to-bulk leakage current of the DTMOS diodes. This was minimized by appropriate device sizing using standard device models [9]. The area of the optimized devices is then in the same order as that of the PNPs in [3]. It should be noted that this non-ideal leakage current is two orders of magnitude less than, the similarly non-ideal, base current of a parasitic PNP transistor in the same process. As a result, DTMOS-based sensors, unlike their PNP-based counterparts, do not require extra compensation-like circuitry [1, 3]. The ratio X=VGS / VGS is accurately digitized by a 16-bit zoom ADC, which combines the advantages of a SAR-ADC and a 1st-order converter in a two-step conversion scheme [3]. First, a SAR algorithm is employed to find the integer part of X, denoted by n, by comparing VGS to integer multiples of VGS. The fractional part ' is then determined by a 1st-order ADC, whose references are chosen so as to zoom into the region determined by the SAR algorithm, i.e. from n VGS to (n+1) VGS. A modified 1st-order SC ADC is used to implement both conversion steps, resulting in a compact, energy-efficient ADC. IV. MEASUREMENT RESULTS

Figure 4. Chip micrograph of the temperature sensor

Figure 5. Temperature error of 20 measured DTMOS-based sensors before trimming (linear fit).

The temperature sensor was realized in a standard 0.16m CMOS process with five metal layers (Fig. 4). The chip has an active area of 0.12mm2, and consumes 8.6W from a 1.8 V supply at 30C. The sensor has a supply sensitivity of 0.1C/V over a supply range of 1.6V-2V. For flexibility, the digital back-end, the control logic and the modulators sinc2 decimation filter, were implemented off-chip. 20 devices from one batch were packaged in ceramic DIL packages, placed in a climate chamber and then characterized over the military temperature range: 55C to 125C. As shown in Fig. 5, the sensors batch-calibrated inaccuracy was about 1.5C (3), with a PTAT-like characteristic and a 3rdorder systematic non-linearity of about 0.1C. After digital non-linearity compensation and a single offset trim at 30C, the sensors inaccuracy was reduced to 0.4C (Fig. 6). An trim [3] resulted in slightly worse inaccuracy: 0.5C.
Figure 6. Temperature error of 20 measured DTMOS-based sensors after a single offset trim at 30C.

As shown in Fig. 7, a two-temperature trim (commonly used by MOSFET-based temperature sensors [6]) at -10C and 90C, reduces the sensors inaccuracy to 0.1C. At 5 conversions/sec (1024 cycles), the sensor achieves a resolution of 33mK (rms). The sensors performance is summarized in Table I and compared to other state-of-the-art MOSFET-based temperature sensors.

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Figure 7.

Temperature error of 20 measured DTMOS-based sensors after two-temperature trim at -10C and 90C.

Figure 8. Temperature error of 20 measured PNP-based sensors after a single digital -trim at 30C.

Table. I Peformance summary and comparison to previous work

Parameter Technology Chip area Supply current during conv. Supply sensitivity

This work 0.16m 0.12mm2 4.7A 0.1C/V

[5] 0.35m 0.08 mm2 4.5 A 2.5C/V (at 30C) 10C - 80C -1.8/+1C (1) 3 0.1C (10msec)

[6] 0.35m 0.6 mm2 10.6 mA 10C/V (at 30C) 0C - 90C -0.4/+0.6C (2) 23 0.0918C (90sec)

After a single offset trim at 30C, the proposed sensor achieved an inaccuracy of 0.4C from -55C to 125C, which dropped to 0.1C after a two-temperature trim. This is 5x more accurate than state-of-the-art MOSFET-based temperature sensors, and was achieved over a much wider temperature range. This work, therefore, bridges the accuracy gap between BJT- and MOSFET-based temperature sensors. REFERENCES
[1]

Temperature range -55C - 125C Inaccuracy 0.1C (2) (trim points) 0.4C (1) Number of 20 samples Resolution 0.033C (Tconv) (200msec) : 3, :Min/Max

[2]

[3]

[4]

For a fair comparison with a BJT-based temperature sensor, a second chip was realized in which the circuitry remained essentially the same but the DTMOS diodes were replaced by PNPs. For p = 5, however, the ratio X=VBE / VBE spans a larger range: varying from 6 to 26 from -55C to 125C. To cover this range, the range of the zoom ADCs SAR phase was extended, by proportionally increasing the number of elements in its capacitor DAC. As shown in Fig. 8, the inaccuracy of PNP-based sensor is 0.2C after a single trim: only 2x less than that of the DTMOS-based sensor. V. CONCLUSIONS

[5]

[6]

[7]

A DTMOS-based smart temperature sensor has been implemented in a 0.16m CMOS technology. By connecting the body, drain, and gate of a standard P-type MOSFET, thereby making a DTMOS diode, a near-ideal exponential relationship between the diodes current and voltage can be obtained. The voltage across such a diode is about half that of a diode-connected BJT, and spreads less than that of normal diode-connected bulk MOSFET. These characteristics facilitate the design of sub-1V precision temperature sensors.

[8]

[9]

[10]

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