SUN COLLEGE OF ENGINEERING AND TECHNOLOGY BE Degree Internal Examination-1, Feb - 2013 Sixth Semester Electronics and Communication

Engineering EC64 VLSI Design Time: 3Hours Answer All Questions PART A (10x2=20marks) 1. What is micron rule & lambda design rule? 2. What are the advantages of Silicon On Insulator process 3. What is channel length modulation? 4. What is meant by Pass transistors? 5. What are the advantages of Transmission gates? 6. Define noise margin. 7. What is meant by foot network? 8. What is meant by skewed gates? 9. What is meant by Tri state inverter? 10. Realize the NAND Operation using CMOS Inverter logic. PART B (16x5=80marks) 11. i) Explain the DC transfer characteristics of CMOS inverter with necessary diagram.(10) ii) Explain how body effect affects the threshold voltage 12.i) Explain in detail about p-well & n-well fabrication process. ii) Derive the threshold voltage equation for the MOS transistor 13.i) Explain power dissipation in the CMOS gates ii) Explain latch up problems and how it can be rectified in CMOS and tunneling Phenomenon. 14.i) Explain in detail with necessary diagram about various sequencing methods of static circuit? ii) Explain the concept of synchronizer? iii) Implement the logic (A+B)(C+D) 15. i) Explain about the various types of static CMOS design ii) Explain about the various types of dynamic CMOS design (6) (6) (4) (8) (8) (8) (6) (8) (8) (8) Maximum: 100Marks

SUN COLLEGE OF ENGINEERING AND TECHNOLOGY BE Degree Internal Examination-1, Feb - 2013 Sixth Semester Electronics and Communication Engineering EC64 VLSI Design Time: 3Hours Answer All Questions PART A (10x2=20marks) 1. What is micron rule & lambda design rule? 2. What are the advantages of Silicon On Insulator process 3. What is channel length modulation? 4. Write the equation for threshold voltage Vt of a MOS transistor? 5. What is body effect? 6. Define transconductance of a MOS transistor? 7. What is stick diagram? 8. What is pass transistor? 9. What is pull up and pull down transistor? 10. Realize the NAND Operation using CMOS Inverter logic. PART B (16x5=80marks) 11. i) Explain the DC transfer characteristics of CMOS inverter with necessary diagram.(10) ii) Explain how body effect affects the threshold voltage 12.i) Explain the CMOS process enhancement techniques in detail. ii) Derive the threshold voltage equation for the MOS transistor 13.i) Explain about various ideal I-V effects in detail. ii) Explain the layout design rules in detail. 14.i) Explain in detail with necessary diagram about various sequencing methods of static circuit? ii) Explain the concept of synchronizer? iii) Implement the logic A.(B+C)+(D.E) 15. i) Explain about the various types of static CMOS design ii) Explain about the various types of dynamic CMOS design (6) (6) (4) (8) (8) (6) (8) (8) (8) (8) Maximum: 100Marks