ETCH

Plasma etching
using an ICP etcher
Georgy K. Vinogradov, Masaharu Takeda, FOI Corp., Kanagawa, Japan

OVERVIEW Highly selective SiO2 etching plasma The mainstream direction of RIE tool development
processes increasingly are required in manufacturing of clearly is associated with the further increase of the RF
ultralarge scale integrated circuits, where deep etching of
silicon oxide (oxide) layers involves fluorocarbon discharge excitation frequency up to the ~30-100MHz range.
deposition. Such processes, based on unsaturated However, this solution is limited by the above-mentioned
fluorocarbons like c-C4F8, C4F6 or C5F8, have been developed
and widely used in recent years. Because of special interference between the high and low RF capacitive sheaths.
mechanisms of plasma chemical etching [1–3], it is difficult The higher frequency generates a thinner sheath (low
to etch high aspect ratio contact (HARC) holes without
etch-stop or microloading effects under the conditions of impedance), thereby preventing the lower (bias) frequency
high selectivity. In practice, thus, there is only one type of from delivering a high voltage onto the sheath.
200/300mm plasma etcher for highly selective SiO2 etch,
An apparatus for producing a planar inductively
especially for HARC holes: narrow-gap parallel-plate
capacitive. This article presents a different approach to coupled plasma (ICP) in a low-pressure process gas was
address the requirements of these processes. proposed more than a decade ago [4] that suggested: “Radio
frequency resonant current is induced in the planar coil,
Capacitive reactive ion etching (RIE) tools (also known as
which in turn produces a planar magnetic field. The
two-frequency capacitive plasma sources) have had a long,
magnetic field causes a circulating flux of electrons, which in
useful life in the industry. For more than three decades of
turn produces a planar region of ionic and radical species.”
semiconductor plasma processing, there were no competitive
tools around for one basic reason: a requirement of low gas
Planar ICP
residence time. Since a wafer size determines two dimensions
“Planar” ICP sources do not generate uniform plasma in a
(x-y), the only way to provide low gas residence time is to
narrow discharge gap because of the toroidal shape of ICP
decrease the discharge volume by shrinking the space or
discharge excitation induced by a vortex electric field.
discharge gap (z) over a wafer stage. Yet another reason is
Inductive plasma reveals its local excitation pattern under
that a parallel plate configuration is expedient for generating
narrow-gap conditions so that a process wafer sees a local
uniform RF bias sheath, crucial for a deep oxide etch.
circular current generated by the coil. Additionally, such
Capacitive etchers have some intrinsic problems and
plasma sources are prone to severe sputtering of a dielectric
limitations, though:
plate separating an ICP coil from a process chamber [5] due
a) The gas pressure range is limited at low pressures;
to undesirable RF power capacitive coupling from the coil to
b) High-density plasma cannot be generated;
plasma. The sputtering is so strong that it causes machine
c) Bulk plasma generated by a higher-frequency RF
instability and, eventually, can even break through the
power interferes with an RF bias sheath;
dielectric plate. Overall process controllability and, finally,
d) The wafer edge area is prone to severe
process yield, deteriorates. Faraday shields decrease the
nonuniformity; and
capacitive coupling while seriously downgrading the RF
e) Because of a narrow process window, one process
power transfer and discharge ignition at the same time. That
chamber usually is suitable for a single process only.

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 Figure 1. Top: GroovyICP plasma source cross-sectional view; bottom: argon sputter rate 3D distributions from the
discharges generated by single coils.
is why planar ICP sources, until recently, could not yet reflecting a discharge excitation (ionization) profile is
perform narrow-gap processing: An ion density distribution inherent to a narrow-gap discharge.

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 More complicated two-coil ICP sources also operate
under wide-gap configurations, typically within dome-
shaped process chambers or planar volumes with ≥100mm
discharge space over a wafer.
An increase of the discharge gap does improve the
process uniformity by averaging out plasma parameters due
to the diffusional mixing. However, due to the specific
mechanism of deep oxide etch with polymer-forming
fluorocarbons, it increases the gas residence time in a plasma
zone, thus decreasing selectivity to silicon and photoresist.
A loss of selectivity in oxide applications is not the only
problem of wide-gap ICP plasma sources. It is hardly
possible to control/tune radial process rate profiles in such
chambers without using magnetic fields. This is a well-
known situation in low-pressure plasma discharges, since the
ion density profile is determined by ambipolar diffusion
losses, which are controlled by the product P×d (where P = a
gas pressure, d = a gap size). Large-gap 3D low-pressure
discharges are controlled by substantially non-local diffusion
losses [6]. Thus, a wide-gap ICP discharge shows typical bell-
shaped ion density profiles.
To summarize — there are two nonuniform cases. The
first is a narrow-gap planar ICP with radially nonuniform
Figure 2. Silicon oxide sputter and etch rate radial distributions on blanket 300mm wafers.
Solid State Technology ■ April 2005 Online ■ www.solid-state.com
(toroidal) excitation, and thus, radially nonuniform plasma
density, because of the largest charge losses at the excitation
position. The balance between ionization and electron losses
is substantially local; therefore, the plasma density profile is
substantially local as well and reflects the excitation profile.
The second nonuniform case is a wide-gap or dome-
shaped ICP, which is, again, radially nonuniform (bell-
shaped) because of the relatively uniform losses of electrons
by diffusion. Neither narrow nor wide discharge gaps
provide radial plasma uniformity in typical ICP plasma
sources.
A quite different situation can be realized under narrow-
gap quasi 2D discharge conditions with multiple local ICP
excitations, where the ionization/loss balance is substantially
local. The question is, would it be realistic to precisely
control local ion density by the local discharge power in a
semiconductor manufacturing tool?
Stable medium- to high-density plasmas
at low gas pressure
A plasma source exhibiting the properties of ICP discharges
has been developed for generating stable medium- to high-
density plasmas at low gas pressure in a narrow-gap
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discharge configuration typical for parallel-plate capacitive
discharges. This etcher, called GroovyICP, expands low-
pressure process conditions down to a few millitorr in a
planar narrow-gap (40mm). It has a low gas residence time
configuration and introduces a new feature: three-point
radial control of process uniformity. Wider gap
configurations up to ~80–100mm are also possible.
The idea of a narrow-gap ICP discharge is as follows.
Since any ICP plasma source generates circular (vortex)
discharge currents, it would be reasonable not to fight
“nature,” but rather to use it. Several azimuthally uniform
ICP discharges can be integrated into a planar configuration
to obtain a uniform discharge distribution in a radial
direction. The new plasma source incorporates three
mutually embedded and independently adjustable ring-
shaped inductive plasma sources designed as annular
grooves in a flat roof made of silicon or ceramics, depending
on etching applications (Fig. 1). Every coil has its own RF
power control and independent gas supply system.
Individual sputter distributions come from each nested coil,
with RF being fed into the coils simultaneously.
An independent adjustment of RF powers in the plasma
rings can control plasma density in three points along the
wafer radius. Intermediate areas between the plasma rings
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are initially adjusted and predetermined by the distance
between the rings so that the plasmas generated by adjacent
plasma sources overlap, thus providing about the same level
of plasma density as in the plasma rings.
Final results of etching processes depend not only on the
plasma density, but also on the chemical composition of the
plasma, which can be substantially different at the wafer
Figure 3a. High aspect-ratio contact
hole etch in SiO2: an example of
80nm contact hole etch.
center and edge. Typical RIE etchers
supply process gases through a gas
shower, which is usually optimized
for only a main process recipe. A step
away from this recipe changes
process conditions and affects the
uniformity.
Having three independent gas
supply rings, GroovyICP has a
possibility of gas flow and
composition adjustment in a wide
process window. First, the conditions
providing the best etching results are
selected, then a radial uniformity is
tuned by separate adjustment of the
gas compositions and flow rates in the three rings. The RF
power and gas ratios are fixed so that an operator controls
only a total power and gas flow as usual.
The oxide sputter rate uniformity in the tool is within
~3–5% range without local, sharp nonuniformity at the
wafer edge. Figure 2 shows both silicon oxide sputter and
etch rate radial distribution profiles on blanket wafers. In
other etchers, the etch rate profiles typically are adjusted
using two nonuniformly distributed factors: physical sputter
rate and plasma chemistry, used for example, to adjust a
fluorocarbon deposition rate. Such compensation, even with
a uniform final etch rate distribution, generates process
nonuniformities on patterned production wafers because of
different local conditions along the wafer radius. Device
manufacturers typically have no chance to estimate sputter
rate distributions on production machines in order to avoid
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particle contamination from highly stressed sputtered oxide etched away, because of the use of oxygen in the etch gas. It
layers on the surfaces of a process chamber. is evident, however, that there is a negligible resist loss
during the main etch.

Figure 3b. High

aspect-ratio contact
Film Structure: PR( ArF , 0.14µm) 360nm -/ BARC 70nm/P
- .
TEOS 2600nm /Si-sub hole etch in SiO2: etch
Initial sequence including
BARC Etch 300sec
360sec BARC.
360.0 nm 246.0 nm

Process conditions

1670.0 nm

2045.0 nm
can be varied from
“clean” etch mode to
Results: polymer deposition
TEOS ER: 334 nm/min mode, which is preferable
PR ER (facet): 47 nm/min
(bulk) : 3 nm/min for highly selective
Sel (facet): >7
(bulk) :>119
etching with respect to

Process: Ar/C4F6/CH2F2/O2 the polymer resist. Cost-

of-ownership is
substantially decreased
Silicon oxide etching
due to the low cost-of-consumables. It is mainly achieved
A number of etching processes have been characterized on
because of the long lifetime of the material that separates the
bare wafers and patterned production wafers with different
ICP coils from the process chamber: because of a low sheath
materials: photoresists (KrF, ArF), p-silicon, silicon oxide,
voltage (and thus, low energy of positive ions), sputtering
and organic and inorganic low-k materials such as SiLK,
does not destroy it. This is different from capacitive ethers,
SiOC, porous MSQ, fluorinated polymers, and silicon.
where a top electrode is subject to frequent replacement
To characterize an advanced oxide etcher, HARC holes
because of sputtering.
usually are etched. There are two basic approaches:
nondeposition and deposition etching modes. It is rather
Etching of low-k dielectrics
difficult to prove superiority of either process; however,
Figure 4a shows an example of organic low-k material
manufacturing issues and hard-to-solve problems of deep
etching, where the pattern includes SiO2 and SiC layers
silicon oxide etch are best understood at DRAM production
etched in one process chamber. Another SEM photograph
factories. The deposition mode of HARC etching is rather
(Fig. 4b) shows good profiles without microtrenching in a
typical there, as well as the use of C4-C5 unsaturated
half-etch example. A whole etch sequence, from mask
fluorocarbons. Such processes are now realized only in
opening to several etch steps and photoresist strip, can be
narrow-gap capacitive discharges.
performed in one chamber, including waferless self-cleaning.
An example of deep HARC etch, an 80nm hole with an
aspect ratio = 20, is shown in Fig. 3a. This pattern has been
Radical ashing and in situ cleaning
etched using a standard resist, not a hard mask. A high
The high gas pressures typical for oxygen ashers or plasma
selectivity to resist is necessary for this kind of etching. An
CVD tools mean high discharge impedances. At very low
oxide-to-photoresist etch selectivity of ~119 (bulk) and ~7.1
pressures, ~1mtorr, the discharge impedance also is very
(facet) is easily achievable, as a high-resolution SEM photo
high. Highly efficient inductive antennas in the new etcher
shows (Fig. 3b). The process includes an etching step of an
made a wide pressure range achievable. Figure 5 shows
antireflective coating layer opening, when some resist is

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Figure 4. Etching of a stack
structure, which includes a)
SiO2, SiC, and SiLK layers;
and b) SiLK etching pattern
(half-etch) demonstrates no
microtrenching.
SiO2
integral light emission is stable light radiation from 1mtorr up to ~20torr Ar gas
from a process chamber pressure, with no mode transition or jumping. Over ~20torr,
when only one inductive the plasma discharge toroid becomes narrow like a string or
antenna is RF fed. There rope (the phenomenon known as discharge contraction)
strictly localized within a
groove. It explains the
change of radiation at
20torr. As a comparison,
capacitive discharges usually
SiOC
collapse at much lower gas

SiC pressure and generate

SiLK SiLK catastrophic discharge
SiC breakdowns into a pump
SiLK Si line (“snake discharge”).
SiC Good Selectivity of SiLK to SiC No microtrenching
Si Gas pressures >~1–2torr are
not yet considered as a
a) 120nm via b) 120nm Trenches
practical process etch/ash
SiLK etch to ES-SiC Partial etch (depth : 500nm) range, however.
(SiLK: 400nm)
Conclusion
Process: NH3 A new type of etcher has
FOI been developed that fills a
10 Si Roof, Coil2 1
gap in semiconductor
9 Ar, Inductive Plasma, 1500 W, 13.56 MHz 0.9 plasma manufacturing
8 Coil current: 0.8 equipment and realizes a
V
A, rms converging trend between
7 0.7
advanced narrow-gap
6 0.6
capacitive and large-volume
5 0.5 ICP plasma etchers. The
4 0.4 main features of this
technology will be
3 0.3
appreciated in multi-step
2 0.2 processing of complicated
Coil RF Current A, RMS
1 Plasma Radiation, Sensor Voltage 0.1 multilayer patterns
0 0 including low-k, SiO2, SiC,
0.001 0.01 0.1 1 10 Torr 100 and other materials
demanding high stability

and in situ self-cleaning and

Figure 5. Argon plasma integral light emission from the process chamber and inductive
radical ashing. ■
coil current in a wide pressure range inductive mode discharge. One plasma ring discharge
is generated by a middle inductive antenna. continued

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Acknowledgments
GroovyICP is a trademark of FOI Corp. SiLK is a trademark
of the Dow Chemical Co.

References
1. J.W. Coburn and Harold F. Winters, J. Vac. Sci. Technol. 16, 391,
1979.
2. S. Morishita, et al., Jpn. J. Appl. Phys. 37, 6899, 1998.
3. T. Tatsumi, et al., J. Vac. Sci. Technol. B 18, 1897, 2000.
4. J.S. Ogle, US patent number 4,948,458, Aug. 14, 1990.
5. M. Schaepkens, et al., J. Vac. Sci. Technol. BA 17, 3272, 1999.
6. L.D. Tsendin, Plasma Sources Sci. Technol. 12, S51, 2003.
7. G. Vinogradov, V. Menagarishvili, A. Kelly, Y. Hirano. Abstracts
of 2004 Joint Meeting of the Electrochemical Society (ECS), October
3-8, 2004, Honolulu, J1, p. 899.
8. Chin Ning Wu, G.Vinogradov, et al., Proceedings of International
Symposium on Dry Process, Nov. 30–Dec. 1, 2004, Tokyo, p. 19.

GEORGY K. VINOGRADOV received his PhD from the USSR

Academy of Science, Moscow. He is a director of plasma
R&D at FOI Corp.

MASAHARU TAKEDA received his BS from Keio U., Japan. He

is a manager of the marketing dept. at FOI Corp., 1-1-10,
Oyama, Sagamihara, Kanagawa, 229-1105, Japan; ph 81/42-
700-3010; fax 81/42-700-30206-38-28; email takeda@foi.co.jp.

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