Beruflich Dokumente
Kultur Dokumente
8085 MICROPROCESSOR
Topics
Data Bus:
• The data bus is a group of eight lines used for data flow.
• These lines are bi-directional - data flow in both directions between the MPU and
memory and peripheral devices.
• The MPU uses the data bus to perform the second function : transferring binary
information .
• The eight data lines enable the MPU to manipulate 8-bit data ranging from 00 to
FF (28 = 256 numbers).
• The largest number that can appear on the data bus is 11111111.
Control Bus:
• The control bus carries synchronization signals and providing timing signals.
• The MPU generates specific control signals for every operation it performs. These
signals are used to identify a device type with which the MPU wants to
communicate.
Registers of 8085:
• The 8085 have six general-purpose registers to store 8-bit data during program
execution.
• These registers are identified as B, C, D, E, H, and L.
• They can be combined as register pairs—BC, DE, and HL—to perform some 16-
bit operations.
Accumulator (A):
• The accumulator is an 8-bit register that is part of the arithmetic/logic unit (ALU).
• This register is used to store 8-bit data and to perform arithmetic and logical
operations.
• The result of an operation is stored in the accumulator.
Flags:
• The ALU includes five flip-flops that are set or reset according to the result of an
operation.
• The microprocessor uses the flags for testing the data conditions.
• They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC)
flags. The most commonly used flags are Sign, Zero, and Carry.
• The bit position for the flags in flag register is,
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Temporary Register: It is used to hold the data during the arithmetic and logical
operations.
Instruction Decoder: It gets the instruction from the instruction register and decodes
the instruction. It identifies the instruction to be performed.
Serial I/O Control: It has two control signals named SID and SOD for serial data
transmission.
0 0 1 Memory WRITE
0 1 0 Memory READ
1 0 1 IO WRITE
1 1 0 IO READ
0 1 1 Opcode fetch
1 1 1 Interrupt acknowledge
2. Address Bus:
• A8 — A15 (output; 3-state)
• It carries the most significant 8 bits of the memory address or the 8 bits of the I/O
address;
5. Status Signals:
• It is used to know the type of current operation of the microprocessor.
IO/M(Active
S1 S2 Data Bus Status (Output)
Low)
0 0 0 Halt
0 0 1 Memory WRITE
0 1 0 Memory READ
1 0 1 IO WRITE
1 1 0 IO READ
0 1 1 Opcode fetch
1 1 1 Interrupt acknowledge
• 3 output states are high & low states and additionally a high impedance state.
• When enable E is high the gate is enabled and the output Q can be 1 or 0 (if A is
0, Q is 1, otherwise Q is 0). However, when E is low the gate is disabled and the
output Q enters into a high impedance state.
E A Q State
1(high) 0 1 High
1 1 0 Low
High
0(low) 0 0
impedance
High
0 1 0
impedance
• For both high and low states, the output Q draws a current from the input of the
OR gate.
• When E is low, Q enters a high impedance state; high impedance means it is
electrically isolated from the OR gate’s input, though it is physically connected.
Therefore, it does not draw any current from the OR gate’s input.
• When 2 or more devices are connected to a common bus, to prevent the devices
from interfering with each other, the tristate gates are used to disconnect all
devices except the one that is communicating at a given instant.
• The CPU controls the data transfer operation between memory and I/O device.
Direct Memory Access operation is used for large volume data transfer between
memory and an I/O device directly.
• The CPU is disabled by tri-stating its buses and the transfer is effected directly by
external control circuits.
• HOLD signal is generated by the DMA controller circuit. On receipt of this
signal, the microprocessor acknowledges the request by sending out HLDA signal
and leaves out the control of the buses. After the HLDA signal the DMA
controller starts the direct transfer of data.
READY (input)
• Memory and I/O devices will have slower response compared to microprocessors.
• Before completing the present job such a slow peripheral may not be able to
handle further data or control signal from CPU.
• The processor sets the READY signal after completing the present job to access
the data.
• The microprocessor enters into WAIT state while the READY pin is disabled.
The 8085 instruction set can be classified into the following five functional
headings.
2. ARITHMETIC INSTRUCTIONS:
Includes the instructions, which performs the addition, subtraction, increment or
decrement operations. The flag conditions are altered after execution of an instruction in
this group.
3. LOGICAL INSTRUCTIONS:
The instructions which performs the logical operations like AND, OR,
EXCLUSIVE- OR, complement, compare and rotate instructions are grouped under this
heading. The flag conditions are altered after execution of an instruction in this group.
4. BRANCHING INSTRUCTIONS:
The instructions that are used to transfer the program control from one memory
location to another memory location are grouped under this heading.
Description: The contents of the operand (register or memory) and the Carry flag are
added to the contents of the accumulator and the result is placed in the accumulator.
The contents of the operand are not altered; however, the previous Carry flag is reset.
All flags are modified to reflect the result of the addition.
Description: The contents of the operand (register or memory) are added to the contents
of the accumulator and the result is stored in the accumulator. If the operand is a memory
location, that is indicated by the 16-bit address in the HL register. All flags are modified
to reflect the result of the addition.
Description : The 8-bit data (operand) are added to the contents of the accumulator, and
the result is placed in the accumulator. All flags are modified to reflect the result of the
addition.
Description: The contents of the accumulator are logically ANDed with the contents of
the operand (register or memory), and the result is placed in the accumulator. If the
operand is a memory location, its address is specified by the contents of HL registers.
Flags S, Z, P are modified to reflect the result of the operation. CY is reset. In 8085 AC is
set.
Description: The contents of the accumulator are logically ANDed with the 8-bit data
(operand) and the results are placed in the accumulator. Flags S, Z, P are modified to
reflect the results of the operation. CY is reset. In 8085, AC is set.
Description: The contents of the operand (register or memory) are compared with the
contents of the accumulator.
Description: The second byte (8-bit data) is compared with the contents of the
accumulator.
Description: The contents of the accumulator are changed from a binary value to two 4-
bit binary-coded decimal (BCD) digits. This is the only instruction that uses the auxiliary
flag (internally) to perform the binary-to-BCD conversion. Flags S, Z, AC, P. CY flags
are altered to reflect the results of the operation.
Description: The 16-bit contents of the specified register pair are added to the contents of
the HL register and the sum is saved in the HL register. The contents of the source
register pair are not altered. If the result is larger than 16 bits the CY flag is set. No other
flags are affected.
Description: The contents of the specified register pair are decremented by 1. This
instruction views the contents of the two registers as a 16-bit number. No flags are
affected.
Description: The Interrupt Enable flip-flop is set and all interrupts are enabled. No flags
are affected.
Description: The MPU finishes executing the current instruction and halts any further
execution. The MPU enters the Halt Acknowledge machine cycle and Wait states are
inserted in every clock period. The address and the data bus are placed in the high
impedance state. The contents of the registers are unaffected during the HLT state. An
interrupt or reset is necessary to exit from the Halt state. No flags are affected.
19. IN: Input Data to Accumulator from a Port with 8-bit Address
Description: The contents of the input port designated in the operand are read and loaded
into the accumulator. No flags are affected.
Description: The contents of the specified register pair are incremented by 1. The in
struction views the contents of the two registers as a 16-bit number. No flags are affected.
Jump Conditionally:
Description:
Jump on carry
Jump on No carry
Jump on Positive
Jump on minus
Jump on Parity Even
Jump on parity Odd
Jump on Zero
Jump on No Zero
Description: The contents of the designated register pair point to a memory location.
This instruction copies the contents of that memory location into the accumulator. The
contents of either the register pair or the memory location are not altered. No flags are
affected.
Description: The instruction copies the contents of the memory location pointed out by
the 16-bit address in register L and copies the contents of the next memory location in
register H. The contents of source memory locations are not altered. No flags are
affected.
Description: The instruction loads 16-bit data in the register pair designated in the
operand. This is a 3-byte instruction; the second byte specifies the low-order byte and
third byte specifies the high-order byte.
Description: This instruction copies the contents of the source register into the
destination register; the contents of the source register are not altered. If one of the
operand is a memory location, it is specified by the contents of HL registers. No flags are
affected.
Description: The 8-bit data is stored in the destination register or memory. If the operand
is a memory location, it is specified by the contents of HL registers. No flags are affected.
Description: The contents of the accumulator are logically OR with the contents of the
operand
(register or memory), and the results are placed in the accumulator. If the operand is a
memory location, its address is specified by the contents of HL registers. Flags Z, S, P are
modified to reflect the results of the operation. AC and CY are reset.
Description: The contents of the accumulator are logically OR with the 8-bit data in the
operand and the results are placed in the accumulator. Flags S, Z, P are modified to
reflect the results of the operation. CY and AC are reset.
32. OUT: Output Data from Accumulator to a Port with 8-Bit Address
Description: The contents of the accumulator are copied into the output port specified by
the operand. Flags No flags are affected.
Description: The contents of registers H and L are copied into the program counter. The
contents of H are placed as a high-order byte and of L as a low-order byte. No flags are
affected.
Description: The contents of the memory location pointed out by the stack pointer
register are copied to the low-order register (such as C, E, L, and flags) of the operand.
The stack pointer is incremented by 1 and the contents of that memory location are
copied to the high-order register (B, D, H, A) of the operand. The stack pointer register is
again incremented by 1. No flags are modified.
Description: The contents of the register pair designated in the operand are copied into
the stack in the following sequence. The stack pointer register is decremented and the
contents of the high-order register (B, D, H, A) are copied into that location. The stack
pointer register is decremented again and the contents of the low-order register (C, E, L,
flags) are copied to that location. No flags are modified.
Description: Each binary bit of the accumulator is rotated right by one position through
the Carry flag. Bit D is placed in the Carry flag and the bit in the Carry flag is placed in
the most significant position, D. Flags CY is modified according to bit D S, Z, P, AC are
not affected.
Description: Each binary bit of the accumulator is rotated left by one position. Bit D is
placed in the position of D as well as in the Carry flag. Flags CY is modified according to
bit D S, Z, P, AC are not affected.
39. RRC: Rotate Accumulator Right
Description: Each binary bit of the accumulator is rotated right by one position. Bit D is
placed in the position of D as well as in the Carry flag. Flags CY is modified according to
bit Do. S. Z, P, AC are not affected.
Description: The program sequence is transferred from the subroutine to th4e calling
program. The two bytes from the top of the stack are copied into the program, counter
and the program execution begins at the new address. The instruction is equivalent to
POP Program Counter. No flags are affected.
Description: This is a multipurpose instruction used to read the status of interrupts 7.5,
6.5, 5.5 and to read serial data input bit. No flags are affected.
Description: The RST instructions are equivalent to 1-byte call instruction to one of the
eight memory locations on page 0. The instructions are generally used in conjuction with
interrupts and inserted using external hardware. However, these can be used as software
instructions in a program to transfer program execution to one of the eight locations. No
flags are affected.
Description: The 8-bit data (operand) and the borrow are subtracted from the contents of
the accumulator, and the results are placed in the accumulator. All flags are altered and
the results are placed in the accumulator.
Description: The contents of register L are stored in the memory location specified by
the 16 bit address in the operand, and the contents of H register are stored in the next
memory location by incrementing the operand. The contents of registers HL are not
altered. This is a 3-byte instruction; the second byte specifies the low-order address and
the third byte specifies the high order address. No flags are affected.
Description: The instruction loads the contents of the H and L registers into the stack
pointer register; the contents of the H register provide the High order address, and the
contents of the L register provide the low order address. The contents of the H and L
registers are not altered. No flags are affected.
Description: The contents of the accumulator are copied to a memory location specified
by the operand. This is a 3-byte instruction; the second byte specifies the low order
address and the third byte specifies the high order address. No flags are affected.
Description: The contents of the accumulator are copied into the memory location
specified by the contents of the operand (register pair). The contents of the accumulator
are not altered. No flags are affected.
Description: The contents of the register or the memory location specified by the
operand are subtracted from the contents of the accumulator, and the results are placed in
the accumulator. The contents of the source are not altered. All flags are affected to
reflect the result of the subtraction.
Description: The 8-bit data (the operand) are subtracted from the contents of the
accumulator and the results are placed in the accumulator. All flag are modified to reflect
the results of the subtraction.
Description: The contents of register H are exchanged with the contents of register D
and the contents of register L are exchanged with the contents of register E. No flags are
affected.
Description: The contents of the operand (register or memory) are Exclusive OR with
the contents of the accumulator, and the results are placed in the accumulator. The
contents of the operand are not altered. Z,S,P are altered to reflect the results of the
operation. CY and AC are reset.
Description: The 8 bit data (operand) are exclusive ORed with the contents of the
accumulator, and the result are placed in the accumulator. Z,S,P are altered to reflect the
results of the operation. CY and AC are reset.
Description: The contents of the L register are exchanged with the stack location pointed
out by the contents of the stack pointer register. The contents of the H register are
exchanged with the next stack location (SP+1); however, the contents of the stack pointer
register are not altered. No flags are affected.
ADDRESSING MODES:
Immediate Addressing:
In immediate addressing mode, the data is specified in the instruction itself. The
data will be a part of the program instruction.
Eg. MVI B, 3EH - Move the data 3EH given in the instruction to B register.
Direct Addressing:
In direct addressing mode, the address of the data is specified in the instruction.
The data will be in memory. In this addressing mode, the program instructions and data
can be stored in different memory.
Eg. LDA 1050H - Load the data available in memory location 1050H in to
accumilator..
Register Addressing:
In register addressing mode, the instruction specifies the name of the register in
which the data is available.
Eg. MOV A, B - Move the content of B register to A register.
Implied Addressing:
In implied addressing mode, the instruction itself specifies the data to be operated.
Eg. CMA - Complement the content of accumulator.
ASSEMBLER:
An ASSEMBLER is a program, which is used to translate assembly language
program to correct binary code for each instruction.
Types of assembler:
1. One pass assembler:
• It is an assembler in which the source codes are processed only once.
• Very fast.
• Backward reference only used.
• It issues an error message if it encounters a label or variable that is defined
at a later end of a program. So it cannot have forward references.
2. Two pass assembler:
• The source codes are processed two times.
• In the first pass it assigns addresses to all the labels and attach values to all
the variables used in the program.
• In the second pass it converts the source code into machine code.
Advantages of assembler:
• Translates mnemonics into binary code with speed and accuracy.
• Allows the programmer to use variables in the program.
• It is easier to alter the program and reassemble.
• It identifies the syntax error.
• It can reserve memory locations for data or result.
• It provides list file for documentation.
Assembler directives:
• They are the instructions to the assembler regarding the program being
assembled.
• Also called as pseudo instructions or pseudo opcodes.
• They will give information’s like start and end of program, values of
variables used in the program, storage locations of output and input data
etc.
• Assemblers are
ORG origin of a program
END End of program
EQU Equate
DB Define Byte
DW Define Word
DS Define Storage
SUBROTINE:
• It is a group of instructions written separately from the main program to
perform a function that occurs repeatedly in the main program.
• It is called in the main program by using CALL addr16 instruction. The
addr16 is the starting address of subroutine.
• It should be terminated by RET instruction.
Advantage of subroutine:
• Modular programming: The various tasks in a program can be developed
as separate modules and called in the main program.
• Reduction in the amount of work and program development time.
• Reduces memory requirement for program storage.
DELAY ROUTINE:
It is a subroutine used for maintaining the timings of various operations in
microprocessor.
List:
• List is a linked data structure used in programming techniques.
• The linked data structure will have a number of components linked in a particular
fashion.
• Each component will consist of a string data and a pointer to next component.
• Types of list are,
• Linear linked lists
• Linked list with multiple pointers
• Circular inked list
• Tress
Array:
• It is a series of data of the same type stored in successive memory locations.
• EACH value in the array is referred to as an element of the array.
Flow chart:
• It is a graphical representation of the operation flow of the program.
• It is a graphical form of algorithm.
• Symbols used for flow chart are,
Symbol Operation
Race track shape box
To indicate the start or end of the program
Parallelogram
To represent input or output operation
3. Linker: A program used to join together several object files into one large
object file.
7. Emulator: A system that can be used to test the hardware and software of a
newly developed microprocessor based system.
ADDITION OF TWO 8-BIT NUMBERS
PROGRAM:
MEMORY
MNEMONICS OPCODE COMMENTS
ADDRESS
8001 00
8003 00
8004 90
8009 0C
800A 80
800D 00
800E 95
8011 01
8012 95
8013 HLT 76 Stop the program