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Content

Topologies
Single-phase inverters Three-phase inverters

Gating patterns
Square wave operation Pulse width modulation (PWM) Selected harmonic elimination (SHE) Delta modulation

Microprocessor control of inverters


1

4.1 Introduction
Inverters:
Input: dc voltage, fixed magnitude Output: ac voltage, adjustable frequency and adjustable magnitude

Main feature:
dc-to-ac conversion Solid state device, no rotating machines.

4.1 Introduction
Types
Voltage source inverter (VSI): voltage source dc power supply. Output voltage is defined, based on the gating pattern. Output current is dependent on the load
Widely used in industry

Current source inverter (CSI): current source dc power supply. Output current is defined, based on the gating pattern. Output voltage is dependent on the load

4.2 Square wave operation


Single-phase inverter
Circuit diagram
T1~T4 IGBTs, switching devices D1~D4 Freewheeling diodes C dc filter capacitor (VSI) Vd dc link voltage

P
+

T1
g1
C

D1

T3

D3 B D2

g3

Vd
N

A T4

io +
D4
L

vo R

g4

g2

T2

4.2 Square wave operation


vg1, vg2
vg3, vg4 vAN

waveforms
T
t t Vd t Vd Vd t t t
Period I II III IV T1, T2 on T3, T4 on D3, D4 on D1, D2 on

vBN

vAB
io

Vd

Period I: vg1=vg2>0 T1, T2 on, current path: Vd+T1LoadT2Vdvo=Vd Period II: vg3=vg4>0 But io>0 D3, D4 on, energy stored in L is releasing to Vd, current path: Vd-D4LoadD3Vd+ Period III: vg3=vg4>0 But io<0 T3, T4 on, current path: Vd+T3LoadT4VdPeriod IV: vg1=vg2>0 But io<0 D1, D2 on, energy stored in L is releasing to Vd, current path: Vd-D2LoadD2Vd+

4.2 Square wave operation


rms value of output voltage 1 T 2 vo dt = Vd T 0 Fourier series output voltage Vo ,rms = vo (t ) = 4Vd 4V sin nt = d n =1, 3, 5... n

Analysis

I on ,rms
Von ,rms

nL

1 1 sin t + sin 3t + sin 5t + ... 3 5 rms value of fundamental component 2 4Vd f = 2 = Vo1,rms = 2 = 0.9Vd T Fourier series of output current io (t ) =
n =1, 3, 5...

Harmonic Equivalent circuit

2 I on ,rms sin (nt n ) =

n =1, 3, 5...

n R + (nL )
2

4Vd

sin (nt n )

use harmonic equivalent circuit I on ,rms = Von ,rms R 2 + (nL )


2

and n = tan 1

nL R
6

4.2 Example
RLC load
P + g1 Vd
N

T1 C g4 A T4

D1
+

T3 g3 vo
L

D3 B D2

io C g2 T2

D4

Load

Example R = 10, L = 31.5mH, C = 112F, Vd = 220V, f o = 60Hz Find : a) Fourier series of io (up to 9th order harmonic) b) I o1,rms , c) THD, d) Pload , and e) I d
8

4.2 Square wave operation


Three-phase inverter
Circuit diagram
T1~T6 IGBTs, switching devices D1~D6 Freewheeling diodes C dc filter capacitor Vd (VSI) Vd dc link voltage R three-phase resistive load

P + g1 C T1 A

D1

T3 g3
B

D3

T5

D5 iA iB iC D2 R n

g5
C

g4 T4

g6
D4

g2 T6 D6
T2

11

4.2 Square wave operation


vg1

Waveforms, gate signals


T
60 60 60

Note:

vg4 60 60 60 vAN vg3 vg6 vBN vg5 vg2 vCN


120 120

Vd

t (1) v and v are complimentary g1 g4 t vg3 and vg6 are complimentary t


vg5 and vg2 are complimentary (2) VAN is controlled by vg1. They t have the same wave shape

t Vd t t t Vd t

VBN is controlled by vg3. They have the same wave shape VCN is controlled by vg5. They have the same wave shape

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4.2 Square wave operation


vAN vBN vCN

Waveforms, line-to-line voltages


Vd
120

t Vd
120

Note: (1) VAN leads VBN 120 VBN leads VCN 120 VCN leads VAN 120

t Vd

vAB
vBC

t (2) V leads V 120 AB BC t t


VBC leads VCA 120 VCA leads VAB 120 (3) VAN lags VAB 30 VBN lags VBC 30 VCN lags VCA 30

Vd
60

Vd Vd Vd Vd

vCA

Vd

Vd

t
13

4.2 Square wave operation


vg1 vg2 vg3 vg4 vg5 vg6
T6 on I II III IV V VI

Switching sequence
T1 on
T2 on T3 on T4 on T5 on T6 on I II III IV T1 on Note:

t Period I: T5, T6 and T1 on t Period II: T6, T1 and T2 on t Period III: T1, T2 and T3 on t Period IV: T2, T3 and T4 on t Period V: T3, T4 and T5 on t
Period VI: T4, T5 and T6 on

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4.2 Square wave operation


Waveforms, phase voltage on load
Period I: T5, T6 and T1 on Period III: T1, T2 and T3 on Period V: T3, T4 and T5 on

+ Vd

A R C R

+ Vd

A R B R

R R R R R

R R R

+ Vd

C R
A

2 vAn = vCn = 1 d , vBn = 3 V d 3V

2 vAn = vBn = 1 d , vCn = 3 V d 3V

2 vBn = vCn = 1 d , vAn = 3 V d 3V

Period II: T6, T1 and T2 on

+ Vd

A R C R

Period IV: T2, T3 and T4 on

Period VI: T4, T5 and T6 on

+ Vd

C R
A

+ Vd

1 vAn = 2 d , vBn = vCn = 3 V d 3V

1 vBn = 2 d , vAn = vCn = 3 V d 3V

1 vCn = 2 d , vAn = vBn = 3 V d 3V

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4.2 Square wave operation


Waveforms, phase voltage on load
vAn
2 3 d

1 3 d

Note:

VAn lags VAB 30 VBn lags VBC 30 VCn lags VCA 30

vBn

t
vCn

t
I II III IV V VI I II III IV

16

4.2 Square wave operation


rms value VLL,rms =

Analysis, line-to-line voltage

1 T 2 2 v dt = Vd = 0.816Vd o T 0 3 Fourier series v AB (t ) = = n n n 4Vd sin sin sin nt + n 2 3 6 n =1, 3,5...

2 3Vd 5 1 t + t + sin sin 5 6 5 6 rms value of fundamental component VAB1,rms = 2 3Vd

7 1 sin 7t + 6 7

+ ...

2=

Vd = 0.78Vd

triple - order harmonics 9 1 4Vd 3 1 4Vd = 0, VAB 9,rms = =0 sin sin 3 3 2 9 2 3 Other harmonics VAB 3,rms = VAB 5,rms = 1 4Vd 5 = 0.156Vd sin 5 3 2

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4.2 Square wave operation


Analysis, phase voltage
rms value V p ,rms 1 = T

2 2 2 VLL,rms 2 1 Vd 2Vd Vd = = = v dt = + + V 0 . 471 V d d 3 3 3 3 9 3 3 3 2 o

Fourier series v An (t ) = 8Vd n n n 2V sin sin cos sin nt = d 2 3 6 n =1, 3, 5... 3n

1 1 sin t + sin 5t + sin 7t + ... 5 7

rms value of fundamental component VAn1,rms = 2Vd

2=

Vd = 0.45Vd

triple - order harmonics VAn 3,rms = 0, VAn 9,rms = 0 Other harmonics 1 2Vd VAn 5,rms = = 0.09Vd 2 5
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4.2 Square wave operation


Analysis, harmonic equivalent circuit
V An ,n , rms I An , rms n V Bn ,n , rms I Bn ,rms jn L jn L jn L R

R R

VCn ,n ,rms I Cn , rms

Harmonic Equivalent circuit

Fourier series of i A iA =
n =1, 3, 5, 7...

3n R 2 + (nL ) n L R

4Vd

sin

n n sin sin( nt n ) 2 3

where n = tan 1

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4.2 Square wave operation


Load neutral voltage
Note: In practical design, the neutral of capacitors is not grounded because of the grounded threephase power supply.

Vd 2 + Vd g4 C 2 T4

C T1 g1 A

D1

T3
g3
B

D3

T5

D5 iA iB iC D2 R n + vn

g5
C

Neutral point grounded three-phase inverter vn: voltage of load neutral respect to ground vA: voltage of node A respect to ground vB: voltage of node B respect to ground vC: voltage of node C respect to ground
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Ground

g6
D4

g2 T6
D6
T2

4.2 Square wave operation


Load neutral voltage
vg1 vg4 vA
Vd 2 Vd 2

frequency : 3 f1 , where f1 is fundamental frequency

t magnitude t t

1 peak - to - peak value : Vd 6 harmonic component : Triplen - order harmonics of v A


2Vd 1 1 sin t + sin 3t + sin 5t 3 5 1 1 + sin 7t + sin 9t... 7 9

vAn vn
1 6 d

2 3 d

vA =

1 3 d

v An =

1 d 6V

2Vd 1 1 sin t + sin 5t + sin 7t + ... 5 7 2V 1 1 1 vn = d sin 3t + sin 9t + sin 15t + ... 3 9 15

21

4.2 Square wave operation


Load neutral voltage
VAn ,rms I jn L An , rms VBn ,rms I Bn ,rms VCn ,rms I Cn ,rms
R

jn L R

jn L R

Harmonic Equivalent circuit Triple-order harmonic: voltages are in phase. But no current path between node n and ground. Then the voltage will be applied to the load neutral Other harmonics: voltages are not in phase (120 lagging or leading). The three harmonic voltages are three-phase balanced voltages, then load neutral voltage is zero.
22

4.3 Pulse Width Modulation


Purpose of using PWM
To make inverter output voltage adjustable To make inverter output frequency adjustable To eliminate low order harmonics

Method
Change the pulse width according to the modulating waveform (sinusoidal, trapezoidal, et al) Carrier waveform: triangular wave
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4.3 Pulse Width Modulation


Principle
Half bridge inverter
T1, T2 IGBTs, switching devices D1, D2 Freewheeling diodes C dc filter capacitors (VSI) Vd dc link voltage R load

Vd 2 O + Vd 2 C

T1

g1

D1

g2
T2 D2

30

4.3 Pulse Width Modulation


Waveforms, gate signals
Note: m V c V

(1) vg1 and vg2 are complimentary (2) vm is modulating wave (sine) vc is carrier wave (triangular) (3) When vmvc vg1=logic 1

vg1 vg 2 v AO
Vd 2 Vd 2

t t t

vm<vc vg1=logic 0 (4) When vg1=logic 1T1 onvAO=+Vd/2 When vg1=logic 0T2 onvAO=-Vd/2

v AO1

31

4.3 Pulse Width Modulation


Terminology
Amplitude modulation index (ratio) V ma = m V
c

Frequency modulation index (ratio) f mf = c fm where f m is frequency of vm f c is frequency of vc usually m f > 9

is peak value of v where V m m is peak value of v V


c c

usually 0 < ma 1
How to find fundamental component? use Fourier analysis an =

v AO cos ntdt and bn =

v AO sin ntdt

Fundamental freqency? Fundamental frequency = f m

32

4.3 Pulse Width Modulation


Spectrum
V AO ,h 0 .8 0.5Vd
0.22

Given : ma = 0.8, m f = 15, f m = 60Hz Find spectrum of v AO


0.818

0.22 h

13 15 17

27 29 31 33

Assume Vd = 100V, VAO,1 = ? AO ,1 V AO ,1 = 0.8 0.5Vd = 0.8 0.5 100 = 40V = 0.8 V 0.5Vd AO ,1 40 V VAO,1 = = = 28.28V 2 2

33

4.3 Pulse Width Modulation


Features
No low order harmonics: in the example, no 3rd, 5th, 7th, 9th, 11th order harmonics High order harmonics can be easily filtered out

f X L Blocking harmonic current X C Bypassing harmonic current


34

4.3 Pulse Width Modulation


How to determine harmonic components
Use table 8-1 on text page 207 Note:
mf 9, if mf <9, table 8-1 may not be used Based on half bridge inverter
h 1st mf mf 2 mf 4 2mf 1 2mf 3 2mf 5 ma 0.2 0.2 1.242 0.016 . 0.4 0.4 1.15 0.061 0.6 0.6 1.006 0.131 . 0.8 0.8 0.818 0.22 1.0 1.0 0.601 0.318
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AO ,h V 0.5Vd

4.3 Pulse Width Modulation


Conclusions
The fundamental component is proportional to amplitude modulation index (ma) The fundamental frequency is determine by the frequency of modulating waveform (vm)

Questions
Q: How to change inverter output frequency? A: Change the frequency of vm (modulating frequency) Q: How to change inverter output voltage? A: Change the amplitude modulation index.

36

4.3 Pulse Width Modulation


Over modulation
m V c V

m V Define : if ma = >1 c V over modulation Waveform : if ma >> 1,

vg1 vg 2 v AO No switching
Vd 2 Vd 2

t t t

v AO become a squarewave

No switching

39

4.3 Pulse Width Modulation


AO ,1 V 0.5Vd 4 1.0

Fundamental versus ma

Linear

Over modulation

Square wave

1.0

3.24

ma
40

4.3 Pulse Width Modulation


Drawback of over modulation
Low order harmonic components start to appear
V AO ,h 0.5Vd 1 .0

Example : ma = 2.5, m f = 15

1 3 5 7 9 11 13 15 17 19 Due to over modulation

mf
41

4.4 Single-phase full bridge inverter with PWM operation Circuit diagram
P
+

T1
g1
C

D1

T3 g3 T2

D3
B D2

Vd
N

A T4

D4 g2

g4

42

4.4 Single-phase full bridge inverter with PWM operation Waveforms, bipolar PWM
m V
c V

Note:

(1) vg1 and vg4 are complimentary signals t vg2 and vg3 are complimentary signals (2) vmvc vg1=vg2=logic 1

vg1 , vg 2 vg 3 , vg 4
v AB

vm<vc vg1=vg2=logic 0

(3) When vg1=vg2=logic 1T1 and T2 onvAB=Vd t Vd


v AB1

Vd

When vg1=vg2=logic 0T3 and T4 onvAB=-Vd

43

4.4 Single-phase full bridge inverter with PWM operation How to determine harmonic components
Use table 8-1 on text page 207 Note:
Table 8-1 is designed for half bridge inverter Half bridge inverter: VAO,p-p=Vd Full bridge inverter: VAB,p-p=2Vd

(Coefficients in Table 8-1) 2 for full bridge inverter


Given : Full bridge inverter, bipolar PWM, Vd = 300V, ma = 0.8, m f = 39, f m = 47 Hz Find : (1) VAB1,rms = ? (2) Dominant harmonics, m f 2, m f , m f + 2 (rms value)
44

4.4 Single-phase full bridge inverter with PWM operation Waveforms, unipolar PWM
vm vm
Note: (1)vmvc vg1=logic 1,vg4=logic 0

vm<vc vg1=logic 0,vg4=logic 1 -vmvc vg3=logic 1,vg2=logic 0


-vm<vc vg3=logic 0,vg2=logic 1

vg1 vg 3
v AB

(2) vg1=vg3=logic 1T1 and T3 t onvAB=0

t
Vd
v AB1

vg1=vg3=logic 0T4 and T2 onvAB=0 vg1=logic 1 and vg3=logic 0T1 and T2 onvAB=Vd vg1=logic 0 and vg3=logic 1T4 and T3 onvAB=-Vd
46

Vd

4.4 Single-phase full bridge inverter with PWM operation Spectrum for unipolar PWM
V AB ,h 0 .8 Vd

1 Bipolar PWM

mf
2mf -1

2mf 2mf +1

Dominant harmonics: mf , mf 2, mf 4 Unipolar PWM Dominant harmonics: 2mf 1, 2mf 3


47

4.4 Single-phase full bridge inverter with PWM operation Summary


Table 8-1 can be used for (1) Single-phase half bridge inverter (2) Single-phase full bridge inverter with bipolar PWM Note: coefficient2, dominant harmonics: mf, mf 2, mf 4 (3) Single-phase full bridge inverter with unipolar PWM Note: coefficient2, dominant harmonics: 2mf 1, 2mf 3
50

4.5 Three-phase inverter with PWM operation Circuit diagram


P + g1 Vd
N

T1 C A

D1

T3

D3

T5

D5 iA iB iC D2 R n

g3
B

g5
C

g4 T4

g6
D4

g2 T6

D6

T2

51

4.5 Three-phase inverter with PWM operation Waveforms


vmA vmB vmC
Note: (1) Modulating waves: three-phase sine waves (vmA, vmB, vmC) with adjustable amplitude and frequency (2) Carrier wave: triangular wave, fixed amplitude, frequency may be adjusted, depends on applications (3) vmAvc T1 onvAN=Vd vmA<vc T4 onvAN=0 vg1 and vg4 are complementary (4) vmBvc T3 onvBN=Vd vmB<vc T6 onvBN=0 vg3 and vg6 are complementary (5) vmCvc T5 onvCN=Vd

t
v AN

t
vBN

t
vCN

t
v AB

v AB ,1

vmC<vc T2 onvCN=0 vg5 and vg2 are complementary


52

4.5 Three-phase inverter with PWM operation


Spectrum

No low order harmonic

53

4.5 Three-phase inverter with PWM operation


How to determine harmonic components
Use table 8-2 on text page 228
h 1st mf 2 mf 4 2mf 1 2mf 5 3mf 2 3mf 4 ma 0.2 0.122 0.010 0.116 0.4 0.245 0.037 0.2 0.6 0.367 0.080 0.227 0.8 0.49 0.135 0.005 0.192 0.008 1.0 0.612 0.195 0.011 0.111 0.020

rms value!
VLL ,h Vd

54

4.6 PWM Signal Generation


Analog circuit
Control wave Carrier wave Comparator + Logic inverter Synchronous PWM: The triangular waveform is synchronized with the sine wave Features: Simple circuit and low cost Sensitive to the noise Gate signal for top device Gate signal for bottom device

Asynchronous PWM: The triangular waveform is NOT synchronized with the sine wave Producing sub-harmonics: the frequency of the harmonic is not integer times of fundamental frequency.
56

4.6 PWM Signal Generation


Digital circuit
In the interrupt service routine, CPU write the data of sine wave to the compare register Digital comparator Processor
System bus

Compare register

Buffer register

+ -

Counter control

Digital counter Triangular wave is generated by hardware automatically. CPU can control the frequency and the magnitude. Every time when the triangular wave reaches the maximum or minimum value, a interrupt will be generated.
57

Advantages: Stable, very robust to the noise Easy to be controlled by CPU/DSP Reduce the load of CPU/DSP Disadvantages: Expensive hardware High frequency counter

4.6 PWM Signal Generation


Software
Interrupt request Digital comparator OC1 Processor
System bus

+ -

TCNT

Advantages: Software, less hardware Stable, very robust to the noise Easy to be controlled by CPU/DSP Disadvantages: Increase the calculation load of CPU/DSP
58

TCNT: Free running counter OC1: output compare register #1

4.6 PWM Signal Generation


Software
vc vm (sine)
' vm (stair )

' use vm to approximate

vm for simplicity Ts sample period

Ts

Tp = Tg =
k +1 k +2

Interrupt request

Tg

Tp Tg

Ts [1 + ma sin k ] 2 Ts Tp 2

k +1 = k + = t
59

4.6 PWM Signal Generation


Software programming
At t1, the number in free running counter (TCNT) matches the number of the output compare register (OC1), an interrupt request will be made. Interrupt service routine
Determine the type of interval (gap, or pulse) Set the output pin to logic 0 for gap interval or logic 1 for pulse interval. Calculate the time interval for following T period Clear the interrupt flag and return

If the calculation in the interrupt service routine can not be completed during Tg, the program will crash. What shall we do?
60

4.7 Selected Harmonic Elimination Techniques (SHE)


Purpose:
To eliminate a number of unwanted low order harmonics To control the fundamental output voltage

Waveforms

61

4.7 Selected Harmonic Elimination Techniques (SHE)


Waveforms
Three independent switching angles: 1, 2, and 3
Given 1, 2, and 3, the other switching angles are determined due to symmetrical

1, 2, and 3 are used to


Eliminate two harmonics (usually 5th and 7th), and To control the fundamental output voltage

1, 2, and 3 should be pre-calculated (offline calculation)


Use numerical iteration methods to solve a set of nonlinear equations.

62

4.7 Selected Harmonic Elimination Techniques (SHE)


Calculations results
Example: At 50% of maximum fundamental voltage, 1=22, 2=36 and 3=52.

Microprocessor programming
Use look-up table
fundamental

1% 2% 3% 4%

29.2 30.3 59.5 29.6 30.8 59.1


63

4.8 Delta Modulation


Block diagram
* ia

Three-phase inverter
g1

ia

Controller

g4
ia
* ia , reference current (phase A)

ia , actual inverter output current (phase A)


ia , error signal (phase A)
64

4.8 Delta Modulation Waveforms


Upper band limit (UBL)
* ia

Note: (1) Assume vg1=1T1 onia until t1 (2) At t1, ia reaches the UBL vg1=0 vg4=1T4 onia until t2 (3) At t2, ia reaches the LBL vg1=1 vg4=0T1 onia

* ia

Lower band limit (LBL)

vg1
t1 t2

As a result, the actual current ia will be kept within the upper and lower band limits
65

4.8 Delta Modulation


Q &A
Q: How to adjust the frequency of ia? A: Adjust the frequency of reference current Q: How to adjust the magnitude of ia? A: Adjust the magnitude of reference current Q: What if the band width is reduces? A: ia will follow reference current more closely. But switching frequency

66

4.8 Delta Modulation


Summary
If reference current is sine wave, actual current is also sine wave on which some high order harmonics are superimposed. High order harmonics can be filtered out easily. No low order harmonics. Inverter output current can be accurately controlled.

67

4.8 Delta Modulation


Implementation
R2

R6

R1

* a

ia R5
R3
R4

ia

vg 4
v g1

R1 = R2 = R3 = R4 = R

Band Width 2

Band Width 2
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Summary
Voltage source inverter, Topologies
Single-phase inverters
Half-bridge inverter Full-bridge (H-Bridge) inverter

Three-phase inverters

Gating patterns
Square wave operation Pulse width modulation (PWM) Selected harmonic elimination (SHE) Delta modulation

Harmonics
Fourier series Harmonic components, table 8-1 and 8-2 Dominant harmonic component

Waveforms
Gate signals Voltage waveforms

Signal generation
Analog circuit Digital circuit Microprocessor
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