Embedded hardware units

It is primarily used as timing pulse for external memory access. It indicates the time when every instruction is fetched. It is used to demultiplex the lower order address bus line and data bus lines using the external latch. The o/p signal of ALE pin is a clock signal with a frequency of 1/6th of internal clock frequency Even when there is no external memory the controller o/ps the ALE signal at a constant rate. This signal can be used for internal timing and also can be used as clock source for peripherals or I/O devices.

It has both RAM & ROM.When accessing external program memory space it should be grounded to be operated.

Comparison of microprocessors and microcontrollers

S.NO Micro processor Micro controller

It has ALU+general Regs+SP+PC+Interrupts.

purpose It has micro proc essor+ built in ROM

and RAM+ I/O ports +timer/counter+ ADC/DAC + Serial communication circuits + Interrupt handling circuits Most of the instructions are single or double byte only

Multibyte instructions( to and from ext memory to CPU)

It has opcodes to move data between ext mem Only one or two opcodes for moving data between external and CPU.
memory and cpu

One or two types of bit handling instruction. Functions of the pins are unique data is handled in bytes only.

Many bit handling instructions are available Many pins have multifunctions Data handled in bytes and in bits

Micro proc needs more no of additional ext It can function as a digital computer without addition of components to operate as digital computer.

much external components.

the PCB of micro proc based system is large in the PCB of micro controller based size and hence system is expensive compare to system is small in size and hence micro controller system. system is cheaper single memory mapping bw data and prog Separate memory mapping for data mem. and prog mem. more flexible in desing point of view Access time for I/O and memory is more
Less flexible

Access time for I/O and memory is less

used for designing general purpose digital used for designing application computer sys. specific dedicated system It is used for processing applications It is used for controlling applications

discrete components are used, system is not system is more reliable. reliable. due to ext ROM mem software security due to onchip ROM mem software maintenance is difficult. security can be maintained The main function of micro pro is to read the The main function of micro data perform computation on data and display controller is to read the data, the result or store in mem. perform computation and control the environment based on the calculation

Salient features of a 8051 microcontroller

(TCON,TMOD,SCON,PCON,IE&IP)

12)two external & three internal interrupts.

8051 clock

8051 clock pulses synchronies all the internal operations of the microcontroller. The oscillator ckt is formed using resonator and capacitors. Resonator can be ceramic or quartz crystal. Maximum clock frequency generated by 8051 is 16 MHz. The clock network is connected to the pin numbers 18 and 19.each and every operation to be performed by the microcontroller r subdivided into some smaller tasks. E.g.: the complete execution of AND instruction involves sub tasks such as fetching instructions from the program memory, decording, executing and writing into memory etc. Each and every subtask is completed with few no: of clock pulses. Two clock pulses make one clock state. 6 clock states makes one machine cycle. Time for execution of an instruction= c*12/clock freq where c is no: of machine cycles taken for the execution of an instruction.

There are two high ALE pulses generated in one machine cycle thereby two instruction bites can be fetched in one machine cycle.

It is used for all arithmetic operations,logical operations,data move operations and bit level Boolean operations.

 Stack refers to an area of internal RAM. Stack area is used for storing and retrieving data quickly. Stack pointer is a 8 bit register used to store the address in the stack memory space. Upon RESET stack pointer is set at 07h. The stack memory can use the internal RAM are from 08h to 1Fh and general purpose area 30h -7Fh. The stack address in the stack pointer goes up or incremented as data is stored. When data is retrieved from the stack the SP is decremented. The size of the stack is limited to the size of the internal RAM. The address of stack pointer can be set to any internal RAM address using data move instructions. The stack area is chosen such that it is not disturbing the memory space for the register bank bit addressable area scratch pad area.

 It is used to hold the address of the instruction bit in program memory .It always holds the address of the next instruction to be executed It is 16 bit register It is the only register that does not have any internal address. PC is automatically incremented by one after every instruction byte is fetched. The content of PC can be altered by certain instructions.

Program status word ( Flag register)

It is also a

16 bit register. It can Be split into two 8 bit registers-DPL( data pointer low)and DPH (data pointer high). It is used to furnishes memory address for internal and external program memory and external data memory. It can be specified by its 16 bit DPTR or by its 8 bit name DPL or DPH. DPTR does not have a single internal address instead DPL and DPH are assigned internal address.

8051 operations which doesnot use 128 bytes of internal RAM memory 00h to 7Fh are done using SFRs. There are 21 SFRs within the range 80h to FF h. This registers are also mapped as part of internal data memory. The complete range of addresses from 80h to FF h are not used by SFRs. Each of this 21 SFRs are assigned with an internal 8 bit memory address and the registers can be addressed either by using their names or by using their internal address.

Memory organization Internal Ram organization

Internal RAM of 8051 is of 128 byte size. It has three areas: 1) 4 register banks with 8 re4sister (R0 to R7) in each totally making 32 bytes (00h-1Fh). 2) 16 bytes of bit addressable memory area(20h -2Fh) 3) 80 bytes of general purpose scratch pad RAM memory (30h-7Fh).Each register can be addressed by its name or by its internal RAM address. 4) On RESET register bank) is selected. Any other register bank can be selected but programming the register select bits(RS1 And RS0) in the flag register. 5) At time the register on only one register bank can be used. Internal ROM (000h to FFF h) The internal ROM of 8051 is of 4kbyte size. The 8051 memory (data memory and program memory) are organized in two entirely different physical memory locations. But both the memory uses the same address range. The internal circuitry of 8051 access the correct memory based on the nature of operation in progress. Two 16 bit address pointers one for accessing program memory (PC) and another one for accessing data memory(data pointer). If the program address in the PC is higher than 0FFh then the processor will understand the address range is following on the external memory space and hence it has to fetch the instruction from the external program memory. The program instructions can also be fetched exclusively from the external program memory with the address range 0000h to FFFF h by connecting the external access pin to ground. The circuit designer has to design whether the complete program has to be stored in internal ROM or completely to be stored in external RAM or in a combination of both internal ROM and external RAM.

External memory Connection diagram for external data and code memory

External memory Timing:

Both external program memory and data memory can be connected to 8051. Both External memories are accessed by 16 bit PC and DPTR. Both external program and data memory can be upto 64KB. 8051 accesses external RAM whenever certain program instructions are executed. External ROM can be accessed whenever the EA pin is grounded or when the PC contains address higher than max internal ROM address. During any memory access cycle Port 0 is time multiplexed.ie., it first provides lower bytes of 16 bit memory address then it atc as a bi directional data bus for reading or writing from or into the memory. Port 2 pins provides the higher bytes of memory address during the entire memory Read or write cycle. Lower order address byte from port0 pins is latched into external register for temporarily saving the byte. Port0 pins become free to serve as a data bus. If the memory access is for the ext program memory then signal at PSEN pin will go low and enables the ext ROM to place a byte of program code that is a byte of instruction in the data bus. If the axis is for ROM the Read or write pins will go low enabling the flow of data to and from ext RAM and data bus.

The use of memory consumes most of the port pins. Therefore port 1 pins and part of port3 pins can be used for general input,outout functions. RAM can be extended upto 64 KB using 6284 chip. ROM can be extended upto 64KB using 27512 chip. Accessing External RAM and Rom is slower.

INPUT/OUTPUT PORTS:
There are 4 IO/OP ports each with 8 pins, totally making 32 IO pins enabling 8051 to interface with ext IO/OP devices.upon reset all the port pins are configured OP port pins. For using the pins as IP pins port pins have to be programmed.

PORT 0 (Pin 32-39)

1.To use the pins of port0 both as OP and IP pins each pin must be connected externally to a 10 kilo ohm pullup resistor. On reset P0 will act as a Output port.

Port -0 as IP port:
Port 0 pins must be programmed by writing 1 to all the pins. EX: MOV A, #FFH MOV P0,A

Dual role of port 0:

Alternate function of port 0 is AD0 to AD7.when it connected to ext memory P0 provides both addr and data which is indicated by ALE pins.

When ALE =0 it provides data.( D0-D7). When ALE=1 it provides Addr.(A0-A7) This multiplexing of address and data lines through port 0 has been done to save 8051 pins.

PORT1: (pins 1-8)

It already has internal pull up resistors. Upon reset P1 pins are configured as OP port pins. they can be configured as IP pins by wirting 1s to all the pins. EX: MOV A, #FFH MOV P1,A

PORT2(pins 21-28)
It has internal pull up resistors. upon reset it act as a OP port.it can also act as IP ports by writing 1s to all the pins.

Dual Role:
Port 2 pins along with port0 pins are used to provide 16 bits addr for ext memory. Port 2 is used for providing higher bytes ( A8-A15 for higher bytes 16 bit addr.) While this function is taking place it cannot be used for general purpose IP/OP functions.

PORT3:
It has internal pull up resistors. upon reset it act as a OP port.it can also act as IP ports by writing 1s to all the pins.They are used for providing some extremely important signals like interrupt ,serial communication signals etc. Therefore unless and otherwise extremely important ,these pins are not used as general purpose I/O pins.

Dual Role:

TIMER / COUNTER in 8051

The 8051 microcontroller has two independent 16 bit up counting timers named Timer 0 and Timer 1 and this article is about generating time delays using the 8051 timers. Generating delay using pure software loops have been already discussed here but such delays are poor in accuracy and cannot be used in sensitive applications. Delay using timer is the most accurate and surely the best method. When the counter is running on the processors clock , it is called a Timer, which counts a predefined number of processor clock pulses and generates a programmable delay.

Timer is used to generate time delay Counter is used to count the events happening external to 8051 at pins 14 and 15. Both the timers have 16 bit registers .They are specified as TO and T1 Both TO and T1 can be accessed as two 8 bit registers TLX and THX ( Timer low register and timer high register)

Registers involved in timer / counter operations are TMOD and TCON register. TMOD (timer mode control register)

TCON (timer control register) TMOD Register

Timer or counter can hold or start by using software or hardware Gate bit - is used for determining whether the operation of timer or counter is through software or hardware. If gate bit=0 starting and stopping of timer/counter is by software. IF gate bit =1 starting and stopping of timer/counter is by hardware. If we are using TO all the bits regarding to T1 are made 0. If we are using T1 all the bits regarding T0 are made 0. C/T bit used for selecting timer/counter operation If C/T bit = 1 , then counter operation If C/T bit = 0 , then timer operation

M0 M1 bits timer/ counter mode selection bits

Timer Mode 1 programming (operation) 1 )In this mode timer value is 16 bit .that is it can hold values from 0000h-FFFFh.These values are loaded to TH and TL registers of T0 or T1. 2) After loading the values in TL and TH timer is to be started using program instructions.

SET B TR0 or SET B TR1 3) Once the timer is started it starts counting upto FFFFh and after that it rolls over to 0000h at that time timer flag TF is SET. This TF bit is monitored continuously in the program through the instruction JNB. JNB TF,XX When TF=1 to stop the timer using the instruction CLR TF .

4) To Repeat the process TH and TL are reloaded with initial values. And TF must be reset to 0.

MODE-1

PROGRAMMING STEPS

1)TMOD is loaded with the value indicating the selection of timer & timer mode. 2)TL & TH are loaded with initial count values. ( 0000h to FFFF h) 3)start the timer.( SET B TR0 or SET B TR1) 4)Timer flag TF is monitored continuously using JNB TF,XX. if TF=1 go out of the loop. 5) stop the timer ( CLR TRO or CLR TR1) 6)Reset TF flag using CLR TF. 6)Goback to step 2.

Timer Mode 0 programming (operation)

Same as mode 1 except that it is a 13 bit timer. It can hold values from 0000 h to 1FFF h. When it exceeds max.value 1FFF h , then it rolls over to 0000 h and TF is set to 1.

TIMER MODE -2 PROGRAMMING

It is 8 bit timer with autoload. Timer register can hold values from 00h to FFh in TH or TL. After TH is loaded, 8051 use a copy of loaded value to TL. Timer is started(using SETB TRO or SETB TR1). After the timer is started it starts counting up incrementing the TL register upto FFh. When the TL register rolls over from FFh to 00h,then the timer flag TF is set to 1. TL is reloaded automatically with original value from TH. To repeat the process TF is cleared.

MODE-2

PROGRAMMING STEPS

1)TMOD is loaded with the value indicating the selection of timer & timer mode. 2)TH is loaded with initial count value. 3)start the timer. 4)Timer flag TF is monitored continuously using JNB TF,XX. if TF=1 go out of the loop.

5)Clear TF flag using CLR TF. 6)Goback to step 4.( not to step 2 since it is auto reload mode)

Timer Mode -3
(split timer mode Same timer splitted in to two 8 bit timer to count delay for two different actions.This timer is not much used in 8051.

TR0 (timer zero run control bit) & TR1 bits Through this bit,timer 0 can be started or halted. When TR0=0-timer-0 is halted. When TR0=1,timer 0 is started. When Tr1=0- timer-1 is halted. When Tr1=1-timer-1 is started TF0 & TF1 bits Timer flag bits When timer registers ( TH & TL) overflows from their max. values then these flags are set indicating the desired count has been reached.

COUNTERS

A timer can be generalized as a multi-bit counter which increments/decrements itself on receiving a clock signal and produces an interrupt signal up on roll over. When the counter is running on an external clock source (may be a periodic or aperiodic external signal) it is called a Counter itself and it can be used for counting external events.

Counter is used to count the events happening external to 8051 at pins 14 and 15 . The same 16
bit timers T0 and T1 are used interchangeably as counters. The source of frequency for the counter operation is through the external pulse applied through pins 14&15. Regs TMOD, TH,TL & TCON are all same for the counter operation as that of the counter operation. In TMOD register , the bit C/T(compliment) is set to one for counter operation. For T0 as a counter pin 3.4(14) provides the clk pulses and counter counts up for each clk pulses coming from that pin.for T1 as counter pin3.5 provides clk pulse and counter counts up for each clk pulse coming from that pin.

Serial communication in 8051

8051 serial data communication ckt uses 1) SBUF Reg to hold data , 2) SCON reg to ctrl data communication , 3) PCON Reg to ctrl data rates and 4) pins RXD and TXD SUBF REG: It is a 8 bit Reg.it has 2 regs, one is write only which is used to hold data to be transmitted out of 8051. Through TXD pin. Other is read only and is used to hold the received data thro RXD pin. Both the mutually exclusive Regs uses the same internal address 99H. Data transmission A byte of data transmitted via TXD pin must be placed in SBUF reg. Data is framed up with the start and stop bits. Once data is written to SBUF transmission of serial data begins. Once all the bits in the SBUF are transmitted then Ti flag is set to 1 which indicates transmission is over and SBUF is empty & another data byte can be transmitted. If data is sent without checking TI flag then data In SBUF reg is over written by the new data which leads to the loss of previously stored data.

DATA RECEPTION: When a byte of data is received from the external source via RXD pin, deframing of start and stop bits take place and a byte of data is placed in SBUF register. SBUF register holds the data before sending it to further operation. Once all the bits are received in the SBUF then RI flag is set to 1 which indicates that reception of a character of data is over and SBUF is empty & it is ready to receive another data byte. If data is received without checking TI flag then data In SBUF reg is over written by the new data which leads to the loss of previously stored data.

SCON register (serial mode control register)

 SMO serial port mode bit 0 SM1- serialport mode bit 1.Both SM1 and SM0 are Set or cleared by program. SM2- multi processor communication bit REN- receive enable bit. 1- Enable reception , 0- disable reception TB8- transmitted bit 8 RB8-received bit 8. Both TB8 and RB8 are used in modes 2 and 3 TI transmit interrupt flag RI-receive interrupt flag Serial data flags are included in SCON to aid efficient data transmission and reception.

Data TX is under complete control of program but RX data is unpredictable.

SM0 0 0 1 1

SM1 0 1 0 1 0 baud rate f/12 ( shift register mode)

1 variable baud rate (standard UART) 2 3 f/32 or f/64 ( multiprocessor mode) variable baud rate

SM2 : 1 multi processor system : 0 Single processor REN 1 : enables the reception of data 0 : disables the reception of data TB8 - it SET or cleared by the program in modes 2 and 3 RB8 it set or cleared by the program in modes 2 and 3 Both TB8 and RB8 bits are used for only modes 2 and 3. Default mode of operation is mode 0.therefore generally these two bits are set to 0.

 TI(transmit interrupt flag)- When TI=1 indicates one byte of data has been transmitted, ready to transmit another byte. This flag is raised at the end of 8th bit in mode 0 beginning of stop bit for other modes. RI(Receive interrupt flag)- When RI=1 indicates one byte of data has been received, ready to receive another byte. This flag is raised at the end of 8th bit in mode 0 and half way through stop bit in other modes.

Serial mode 0 : ( shift register mode) Baud rate is 1/12 of oscillator frequency Character size is 8 bits SBUF to receive or transmit 8 bit data using RXD pin for both the functions

D7

D6

D5

D4

D3

D2

D1

D0

Serial mode 1 : (standard UART) SBUF becomes full duplex receiver/transmitter that may receive or transmit data at the same time. RXD pin receives all data. TXD pin transmits all data. Character size is 10 bits ( 1 start bit + 8 data bits + 1 stop bit ) Stop bit D7 D6 D5 D4 D3 D2 D1 D0 Start bit

When Timer 1 is used in mode 2 ( SMOD = 0 or 1 in PCON)

Baud rate =( 2 SMOD / 32 d) (Oscilator freq / 12 d [256 d - TH1] )

When Timer 1 is used in other modes Baud rate =( 2 SMOD / 32 d) ( Timer 1 overflow frequency) For generating standard Baud rate crystal frequency of 11.0592 MHz is used. Serial mode 2 : ( multiprocessor mode) Similar to mode 1 Transmitted data size is 11 bits ( 1 start bit + 9 data bits + 1 stop bit) Stop bit D8 D7 D6 D5 D4 D3 D2 D1 D0 Start bit

Baud rate =( 2 SMOD / 64 d) (Oscilator freq) Baud rate >> standard communication rates as in mode 1. This is used because high baud rates are used for multiprocessor applications. Serial mode 3 : Identical to mode 2 except that baud rate is determined exactly as in mode 1 using timer 1 to generate communication frequency. PCON register

SMOD

--

--

--

GF1

GF0

PD

IDL

SMOD - Serial baud rate modify bit There are two ways in which baud rate can be increased. --- By using high frequency crystal oscillators ---- By changing the SMOD bit in the PCON register SMOD = 1 gives double the baud rate than for SMOD = 0, for modes 1,2 & 3. GF0&GF1 general purpose user flags ( set/cleared by the programmer) PD-power down bit (PD=1 for using in power down configuration) IDL idle mode bit

The rate of data transfer in serial data communication is stated in bps (bits per second). Another widely used terminology for bps is baud rate. Baud rate is defined as the number of signal as change per second. Baud rate for SMOD 0. When SMOD 0,8051 divides 1/12 of crystal frequency by 32 and uses that frequency for timer 1 to set the baud rate. If XTAL = 11.0592 is used then Machine Cycle frequency. 11.0592 MHz/12 = 921.6 kHz and 921.6 kHz/32 = 28,000 Hz, since SMOD 0. This is the frequency used by timer 1 to set the baud rate. Baud rates for SMOD 1 With the fixed crystal frequency, we can double the baud rate by making SMOD =1. When the SMOD bit (D7 of PCON register) is set to 1, 1/12 of XTAL is divided by 16 (instead of 32) and that is frequency used by timer I to set baud rate. In the case of XTAL = 11.0592 MHz. Machine cycle frequency 11 .0592 MHz/12 921.6 kHz and 921.6 kHz/16 = 57,600 Hz since SMOD = 1 This is the frequency used by timer 1. to set the baud rate.

Programming 8051 for serial data transfer via TXD pin 1. TMOD register is loaded with desired value to select the timer and its mode (20 h indicates timer 1 is used in mode 2) 2. TH1 is loaded with the value to set the baud rate for serial data transfer (assume XTAL=11.059MHz)

3. SCON register is loaded with the value 50h(serial mode 1) where 8 bit of data is framed with start and stop bits. 4. TR1 is set to 1, to start the timer 1 5. TI flag is cleared by using the instruction CLR TI. 6. Characters byte to be transferred serially is written into SBUF registers. 7. TI flag is continuously monitored using the instrnction JNB TI,XX to see if the charater has been transmitted completely. 8. Go to step 5 for next character transfer.

PROGAMMING 8051 to receive data serially 1. TMOD register is loaded with value 20h (timer 1 mode 2). 2. TH1loaded with values for descried baud rate. 3. SCON register loaded with value 50h indicating serial mode 1(8bit data formed with start and stop bits). 4. TR1 is set to 1 to start the timer 1. 5. RI flag is cleared with CLR RI instruction. 6. RI flag is monitored continuously with JNB RI, XX instruction to check whether the entire byte of character has be received. 7. When RI=1, SBUF register has the received byte its contents are moved to the safe only location in8051. 8. Go to step 5 for receiving the next character. Function of TI flags A byte of character to be transmitted is written into SBUF register. First start bit is transmitted. Then the 8 bits of character are transmitted 1 bit at a time. Stop bit is transmitted. Till now TI=0.when stop bit is transmitted.

TI=1 indicating the last bit of the character was transmitted and it is ready to transfer the next chara. Then anew chara (8 bits of data) is loaded in the SBUF register, then TI=0then the untransmitted bits of the previous data byte in the SBUF register is lost and SBUF register is overwritten with new data byte. The TI flag is set by 8051 but it has to be cleared by the programmer when the SBUF register is loaded with new data byte.

Function of RI flags 8051 receives the start bit via RXD pin. 8 bits of the character byte is received 1 bit at a time. At the end stop bit is received. After receiving the stop bit data byte is formed and placed in SBUF register within 8051. Till this point RI flag = 0 indicating that data transfer of a particular byte is taking place. when the stop bit is received RI flag is SET to 1 indicating that entire data byte has been received and it is placed in SBUF register. Importance of RI flag: 1. When 8051 receives the start bit via RXD pin it indicates that the next bit is going to be the first bit of the character to be received. 2. The 8 bits of a char byte received one bit at a time. On receiving the last bit a byte is forms & placed in the SBUF reg. 3. Next stop bit is received .when this is received RI flag is set to 1. Indicating that char byte has received & must be picked up by 8051 before it is overwritten by next incoming data byte. Then RI is set to 1. The full 8 bit of the received characters placed in the SBUF reg must be safely copied to some other reg or mem space before it is lost. Once SBUF contents are copied to safe place RI flag must be cleared to 0 using CLR RI instruction.

4. In order to allow the next received char to be placed in SBUF reg otherwise there will be a loss of received data. 5. RI flag is raised by 8051 and it is to be cleared by the programmer. 6. RI flag is continuously monitor using the instruction JNB RI, XX.

Interrupts in 8051

Instead of continuously monitoring the status of the device when interrupts are used an interrupt signal will be given to the microcontroller by the respective device which needs service. ISR( INT service routine) It is a set of programming instruction stored at some predefined address in the memory. the group of mem location set aside to hold the address of the ISR is called INT vector table. Interrupts may be generated by 1. Internal chip operation 2. External hardware sources 6 interrupts are available in 8051. 5 INTs are available for the user. There are 3 internal interrupts ( Interrupts for Timer 0,Timer 1 , serial communication interrupts

RI&TI) and two external interrupts ( INTO & INTI). Reset is a common interrupts in all the processors. Internal INTs are : ( Timer 0,Timer1 , serial commu) There are 2 INTs used for external hardware ( ext IP0 , IP 1) One common INT is reset. Interrupt vector table ( IVT):

Steps in executing an INT: On activation of any INT (internal/ external) micro controller performs the following instruction 1. It completes the instruction under execution & saves the address of the next instruction which is holded by the PC in to the stack. 2. Micor ctlr jumps to IVT. 3. Micro ctlr gets address of the ISR from IVT then goes to the address and executes the prog till last instruction RETS I. 4. On RET I instruction micro ctlr returns back to the main prog. 5. The address of the PC will be taken from the top of the stack and the execution of main prog continues. Registers involved in the interrupt handling function of 8051 are Interrupt Enable register (IE)and Interrupt priority register(IP).

IE register

To enable any interrupt ,the particular bit has to set to 1.

Steps for executing timer interrupt ( For timer 0)

Load the IE register with the instruction MOV IE, # 82 h (1000 0012) When TF=1 microcontroller gets out of the loop and goes to interrupt vector table and from where it goes to the interrupt service routine and performs he necessary tasks. After RETI instruction it comes back to the main program. Upon branching to the interrupt vector table 8051 automatically clears TF flag

TFO =1 ---------- 000Bh ( Timer 0 Interrupt vector) TFO =1 ---------- 001Bh(Timer 1 Interrupt vector)

Steps for programming serial communication interrupts There is only one interrupt for serial communication RI and TI flags are used for serial communication interrupts.

In the polling method ,these two flags are continuously monitored in the program and once these TI/RI = 1, some actions needs to be taken out. In the interrupt method , they need not be monitored continuously.When IE.4 =1, then serial communication interrupt is enabled When RI/TI is raised to 1 8051 automatically gets interrupted at its branches to interrupt vector table and from there to the corresponding ISR. In that ISR processor examines whether RI/TI caused the interrupt and response accordingly. Last instruction before RETI in ISR must be for clearing RI/TI flags. Clearing flag is not automatically done by 8051. RI/TI =1 ---------- 0023h (serial communication interrupt)

Programming external hardware interrupt There are two external hardware interrupts INT0 and INT1 at pin numbers 12 and 13 There are two types of activation level for these two interrupts. 1) Level triggered activation 2) edge triggered activation Level triggering In this mode INT0 and INT1 pins are normally high and when a low level signal is applied to them it triggers the interrupt. In the ISR before RETI instruction this INT0 or INT1 pin must be brought back to high otherwise again and again the same interrupt will be triggered. TCON register TCON.0 (IT0) and TCN.2 (IT1) are made as 0 in order to have low level trigger activation.

Edge triggering In this mode whenever a high to low transition of the pulse takes place it triggers an interrupt INT0 and INT1.For setting this mode TCON.0 and TCON.2 bits in the TCON register are set to 1.

TCON register TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

The least four bits of TCON register are used for interrupt service. IT0 & IT1 used for setting the type of interrupt signal (IT0 for INT0 and IT1 for INT1) IT0=0 --- low level triggered interrupt signal for INT0 IT0 =1--- Edge triggered interrupt signal for INT0 When IT0 or IT1 = 0 , then IE0 and IE1 are not used at all. IE0 and IE1 bits are used only for edge triggered interrupt signal. Thsee two flag bits are only internally used. Upon reset both INT0 and INT1 pins are low level triggered. Only when IT0 =1 or IT1 = 1 - -- Edge triggered interrupt signal , then only IE0 and IE1 bits are used .otherwise they are set to 0.

Interrupt priority This register is used to set the priority to the interrupts by setting the particular bit as 1..

Addressing modes

Syntax MOV A, #n MOV B, #n MOV Rr, #n MOV DPTR, #nn Example MOV A, #0ah MOV B, #0ah MOV Rr, # 0ah MOV DPTR, #abcdh

Register addressing mode Syntax MOV A, Rr MOV Rr,A MOV Rr,DPL MOV Rr,DPH Example MOV A,R0 MOV R3,A MOV R2,DPL MOV R7,DPH

Direct addressing mode

Direst addressing mode Syntax MOV A,add MOV add,A MOV Rr,add MOV add,Rr MOV add,#n MOV add1,add2 Example MOV A,08h MOV 09h,A MOV R2,bch MOV cd,R4 MOV 0f,#55 MOV 8ch,2bh

Indirect addressing mode

Syntax MOV @Rp,#n MOV @Rp,add MOV @Rp,A MOV add,@Rp MOV A, @ Rp

Example MOV @R0,#12h MOV @R1,13h MOV @R0,A MOV 34h,@R1 MOV A, @ R1

MOVC A,@A+PC ---- ( (A+PC)) is moved to A registeer Indexed addressing mode Syntax MOVC A,@A+DPTR MOVC A,@A+PC