QCVM Improvements

Dale Weiler June 27, 2013

Motivation and Scope

Given the increased importance of various modern language features, QC developers are at a disadvantage in having to rely on compiler specic features emulated through non-performant measures. This puts a tremendous amount of eort in the hands of compiler writers. The scope of this proposal will include additional instructions to the VM, some specications about how these new instructions are intended to be implemented, and their semantics.

Contents
1 Forward 1.1 Target . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Proposal Summary . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Consistency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Arithmetic Instructions 2.1 Addition Instructions . . . . 2.2 Subtraction Instructions . . 2.3 Multiplication Instructions . 2.4 Division Instructions . . . . 2.5 Remainder Instruction . . . 3 3 3 3 4 4 4 4 5 5 5 5 6 6 6 6 7 7 7 7 8 8 8 8 9 9 9 9 9 9 9 10

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3 Conversion Instructions 3.1 Integer to oat conversion instruction . . . . . . . . . . . . . . . 3.2 Float to integer conversion instruction . . . . . . . . . . . . . . . 4 Bitwise Instructions 4.1 Bitwise exclusive OR Instructions 4.2 Bitwise NOT instructions . . . . 4.3 Bitwise AND instructions . . . . 4.4 Bitwise OR instructions . . . . .

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5 Rational instructions 5.1 Integer rational instructions . . . . . . . . . . . . . . . . . . . . . 5.2 Integer oating rational instructions . . . . . . . . . . . . . . . . 5.3 Floating integer rational instructions . . . . . . . . . . . . . . . . 6 Equality instructions 6.1 Equal testing instructions . . . . . . . . . . . . . . . . . . . . . . 6.2 Not-equal testing instructions . . . . . . . . . . . . . . . . . . . . 7 Logical instructions 7.1 Logical AND instructions . . . . . . . . . . . . . . . . . . . . . . 7.2 Logical OR instructions . . . . . . . . . . . . . . . . . . . . . . . 7.3 Logical NOT instructions . . . . . . . . . . . . . . . . . . . . . . 8 Load and store instructions 9 Miscellaneous instructions 10 Sample Implementation

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1.1

Forward
Target

It should be noted this document targets the original QC VM. Its well known existing enhancements presently exist out in the wild. This document attempts to acknowledge these enhancements and include them to prevent wasting precious opcode space.

1.2

Proposal Summary

We propose to enable a strict subset of the FTEQW integer opcodes. as well as implementing additional component-wise vector opcodes for performing bit-wise operations on vectors much like SIMD in modern CPU architectures.

1.3

Consistency

This proposal requests constraints and semantics for various proposed instructions which are aligned with those present in existing languages to facilitate in more obvious and consistent behavior as one would expect when targeting these instructions.

2
2.1

Arithmetic Instructions
Addition Instructions
OP ADD I OP ADD IF OP ADD FI

Constraints ADD I requires all operands be integer type. ADD IF requires operand A to be integer type and B to be oat type. ADD FI requires operand A to be oat type and B to be integer type. Semantics The result of these instructions is the sum of the operands.

2.2

Subtraction Instructions

OP SUB I OP SUB IF OP SUB FI Constraints SUB I requires all operands be integer type. SUB IF requires operand A to be integer type and B to be oat type. SUB FI requires operand A to be oat type and B to be integer type. Semantics The result of these instructions is the dierence resulting from the subtraction of the second operand from the rst.

2.3

Multiplication Instructions
OP OP OP OP MUL MUL MUL MUL I IF FI VI

Constraints MUL I requires all operands be integer type. MUL IF requires operand A to be integer type and B to be oat type. MUL FI requires operand A to be oat type and A to be integer type. MUL VI requires operand A to be vector type and B to be integer type. Semantics For all instructions with exception to MUL VI the result is the multiplication of operand A and B, and result stored in operand C. The result of the MUL VI instruction is a vector result of each component of operand A multiplied by the integer value of operand B, result is stored in operand C.

2.4

Division Instructions
OP OP OP OP DIV DIV DIV DIV I IF FI VF

Constraints DIV I requires all operands be integer type. DIV IF requires operand A to be integer type and B to be oat type. DIV FI requires operand A to be oat type and A to be integer type. DIV VF requires operand A to be vector type and B to be oat type. Semantics For all instructions with exception to DIV VI the result is the division of operand A and B, and result stored in operand C. The result of the DIV VI instruction is a vector result of each component of operand A divided by the oating value of operand B, result is stored in operand C.

2.5

Remainder Instruction

OP MOD Constraints Each operands of the MOD instruction shall be interpreted as integer type in the VM. Semantics The result of the MOD instruction is the remainder from the result of a division of the rst operand by the second. If the quotient of A/B
1 2

DIV A, B, A

is representable, the expression (A/B)*B+A%B

1 2 3 4 5

DIV MUL F MOD ADD F

A, C, A, TEMP1,

B, B, B, TEMP2,

C TEMP1 TEMP2 TEMP1

shall equal A

3
3.1

Conversion Instructions
Integer to oat conversion instruction
OP CONV IF

Constraints

Operand A shall be of integer type.

Semantics The result shall be the round-to-nearest LIA-1 value of an integer to oating-point cast.

3.2

Float to integer conversion instruction

OP CONV FI Constraints Operand A for CONV FI shall be oat type.

Semantics If the oating value is innite or NaN or if the integral part of the oating value exceeds the range of the integer type, then the resulting value is unspecied.

4
4.1

Bitwise Instructions
Bitwise exclusive OR Instructions
OP BITXOR V OP BITXOR VF OP BITXOR I

Constraints Each of the operands for BITXOR V shall be vector type. The rst operand for BITXOR V shall be vector type, the second operand shall be oat type. Each of the operands for BITXOR I shall be integer type. Semantics The result of the BITXOR V instruction is the component-wise bit-wise exclusive OR of the operands (that is, each bit in the corresponding resultant vector component is set if and only if exactly one of the corresponding bits in the converted operands is set). The result of the BITXOR VF instruction is the component-wise bit-wise exclusive OR of operand A against a vector of (B, B, B). The result of the BITXOR I instruction is the bit-wise exclusive OR of the operands (that is, each bit in the result is set if and only if exactly one of the corresponding bits in the converted operands is set).

4.2

Bitwise NOT instructions

OP BITNOT V OP BITNOT I

Constraints Each of the operands for BITNOT V shall be vector type. shall be oat type. Each of the operands for BITNOT I shall be integer type. Semantics The result of the BITNOT V instruction is the bit-wise complement of each of the components of the vector operand (that is, each bit in the result is set if and only if the corresponding bit in the converted operand is not set). Integer promotions are performed on the operand components, and the result has a vector type. The result of the BITNOT I instruction is the bit-wise complement of each of the components of the integer operand(that is, each bit in the result is set if and only if the corresponding bit in the operand is not set).

4.3

Bitwise AND instructions

OP OP OP OP BITAND BITAND BITAND BITAND V I IF FI

4.4

Bitwise OR instructions
OP OP OP OP BITOR BITOR BITOR BITOR V I IF FI

5
5.1

Rational instructions
Integer rational instructions
OP OP OP OP GE I LE I GT I LT I All operands shall have integer type.

Constraints

Semantics Each of the instructions: less than, greater than, less than or equal to, and greater than or equal to shall yield 1 if the specied relation is true and 0 if it is false. The result has type integer.

5.2

Integer oating rational instructions

OP OP OP OP GE IF LE IF GT IF LT IF Operand A shall have integer type, operand B shall have oat

Constraints type.

Semantics The usual arithmetic conversions are performed. Each of the instructions: less than, greater than, less than or equal to, and greater than or equal to shall yield 1 if the specied relation is true and 0 if it is false. The result has type integer.

5.3

Floating integer rational instructions

OP OP OP OP GE FI LE FI GT FI LT FI Operand A shall have oat type, operand B shall have integer

Constraints type.

Semantics The usual arithmetic conversions are performed. Each of the instructions: less than, greater than, less than or equal to, and greater than or equal to shall yield 1 if the specied relation is true and 0 if it is false. The result has type integer.

6
6.1

Equality instructions
Equal testing instructions
OP EQ I OP EQ IF OP EQ FI

Constraints All operands shall have integer type for EQ I. Operand A shall have integer type, operand B shall have oat type for EQ IF. Operand A shall have oat type, operand B shall have integer type for EQ FI.

Semantics The equal to instructions are analogous to the relational instructions. Each of the instructions yields 1 if the specic relation is true and 0 if it is false. The result has type integer. The usual arithmetic conversions are performed for equality tests such as integer-oat, and oat-integer.

6.2

Not-equal testing instructions

OP NE I OP NE IF OP NE FI Constraints All operands shall have integer type for NE I. Operand A shall have integer type, operand B shall have oat type for NE IF. Operand A shall have oat type, operand B shall have integer type for NE FI. Semantics The not-equal-to instructions are analogous to the relational instructions. Each of the instructions yields 1 if the specic relation is true and 0 if it is false. The result has type integer. The usual arithmetic conversions are performed for equality tests such as integer-oat, and oat-integer.

7
7.1 7.2 7.3

Logical instructions
Logical AND instructions Logical OR instructions Logical NOT instructions

8 9

Load and store instructions Miscellaneous instructions

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

Sample Implementation
OP BITXOR V OP BITXOR VF OP BITNOT V OP BITAND V OP BITOR V 2049 2050 2051 2052 2053

#d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e

// FTEQW p r o g s v7 #d e f i n e OP ADD I #d e f i n e OP ADD FI #d e f i n e OP ADD IF #d e f i n e OP SUB I #d e f i n e OP SUB FI #d e f i n e OP SUF IF #d e f i n e OP MUL I #d e f i n e OP MUL IF #d e f i n e OP MUL FI #d e f i n e OP MUL VI #d e f i n e OP DIV VF #d e f i n e OP DIV I #d e f i n e OP DIV IF #d e f i n e OP DIV FI #d e f i n e OP CONV ITOF #d e f i n e OP CONV FTOI #d e f i n e OP BITAND IF #d e f i n e OP BITOR IF #d e f i n e OP BITAND FI #d e f i n e OP BITOR FI #d e f i n e OP GE I #d e f i n e OP LE I #d e f i n e OP GT I #d e f i n e OP LT I #d e f i n e OP AND I #d e f i n e OP OR I #d e f i n e OP GE IF #d e f i n e OP LE IF #d e f i n e OP GT IF #d e f i n e OP LT IF #d e f i n e OP AND IF #d e f i n e OP OR IF #d e f i n e OP GE FI #d e f i n e OP LE FI #d e f i n e OP GT FI #d e f i n e OP LT FI #d e f i n e OP AND FI #d e f i n e OP OR FI #d e f i n e OP NOT I #d e f i n e OP EQ I #d e f i n e OP EQ IF #d e f i n e OP EQ FI #d e f i n e OP NE I #d e f i n e OP NE IF #d e f i n e OP NE FI #d e f i n e OP STOREP I #d e f i n e OP LOAD I

116 115 118 119 120 121 132 179 180 181 139 133 183 184 122 // rename i n DP t o t h i s ( c o n s i s t e n c y ) 123 // rename i n DP t o t h i s ( c o n s i s t e n c y ) 185 186 187 188 162 161 164 163 189 190 166 165 168 167 191 192 170 169 172 171 192 193 138 134 173 174 135 194 195 126 125

10

56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

#d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e #d e f i n e

OP GSTOREP I OP GSTOREP F OP GSTOREP ENT OP GSTOREP FLD OP GSTOREP S OP GSTOREP FNC OP GSTOREP V OP GADDRESS OP GLOAD I OP GLOAD F OP GLOAD FLD OP GLOAD ENT OP GLOAD S OP GLOAD FNC OP GLOAD B OP BOUNDCHECK

197 198 199 200 // i n t e g e r s 201 202 // p o i n t e r s 203 204 205 206 207 208 209 210 213 211

76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111

// . . . ( i n s t r u c t i o n s w i t c h b e g i n ) c a s e OP BITXOR : OPC > f l o a t = ( ( p r v m i n t t ) )OPA > f l o a t ) ( ( p r v m i n t t )OPB > float ) ; break ; c a s e OP BITXORV : // i v e c t o r a r e OPC > i v e c t o r [ 0 ] OPC > i v e c t o r [ 1 ] OPC > i v e c t o r [ 2 ] break ; c a s e OP BITXORVF : // i v e c t o r a r e OPC > i v e c t o r [ 0 ] OPC > i v e c t o r [ 1 ] OPC > i v e c t o r [ 2 ] break ;

integers = OPA > i v e c t o r [ 0 ] OPB > i v e c t o r [ 0 ] ; = OPA > i v e c t o r [ 1 ] OPB > i v e c t o r [ 1 ] ; = OPA > i v e c t o r [ 2 ] OPB > i v e c t o r [ 2 ] ;

integers = OPA > i v e c t o r [ 0 ] ( ( p r v m i n t t )OPB > f l o a t ) ; = OPA > i v e c t o r [ 1 ] ( ( p r v m i n t t )OPB > f l o a t ) ; = OPA > i v e c t o r [ 2 ] ( ( p r v m i n t t )OPB > f l o a t ) ;

c a s e OP BITNOT : OPC > f l o a t = ( ( i n t )OPA > f l o a t ) ; break ; c a s e OP BITNOT V : // i v e c t o r a r e OPC > i v e c t o r [ 0 ] OPC > i v e c t o r [ 1 ] OPC > i v e c t o r [ 2 ] break ; c a s e OP BITOR V : // i v e c t o r s a r e OPC > i v e c t o r [ 0 ] OPC > i v e c t o r [ 1 ] OPC > i v e c t o r [ 2 ] break ;

integers = OPA > i v e c t o r [ 0 ] ; = OPA > i v e c t o r [ 1 ] ; = OPA > i v e c t o r [ 2 ] ;

integers = OPA > i v e c t o r [ 0 ] = OPA > i v e c t o r [ 1 ] = OPA > i v e c t o r [ 2 ]

| OPB > i v e c t o r [ 0 ] ; | OPB > i v e c t o r [ 1 ] ; | OPB > i v e c t o r [ 2 ] ;

c a s e OP BITAND V : // i v e c t o r s a r e i n t e g e r s

11

112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168

OPC > i v e c t o r [ 0 ] = OPA > i v e c t o r [ 0 ] & OPB > i v e c t o r [ 0 ] ; OPC > i v e c t o r [ 1 ] = OPA > i v e c t o r [ 1 ] & OPB > i v e c t o r [ 1 ] ; OPC > i v e c t o r [ 2 ] = OPA > i v e c t o r [ 2 ] & OPB > i v e c t o r [ 2 ] ; break ; // FTEQC p r o g s v7 j u s t e n a b l e t h i s a l r e a d y // an i n t e g e r t y p e i s v e r y u s e f u l . c a s e OP ADD I : OPC > i n t = OPA > i n t + OPB > i n t ; break ; c a s e OP ADD IF : OPC > i n t = OPA > i n t + ( p r v m i n t t ) OPB > f l o a t ; break ; c a s e OP ADD FI : OPC > f l o a t = OPA > f l o a t + ( p r v m v e c t ) OPB > i n t ; break ; c a s e OP SUB I : OPC > i n t = OPA > i n t OPB > i n t ; break ; c a s e OP SUB IF : OPC > i n t = OPA > i n t ( p r v m i n t t ) OPB > f l o a t ; break ; c a s e OP SUB FI : OPC > f l o a t = OPA > f l o a t ( p r v m v e c t ) OPB > i n t ; break ; c a s e OP MUL I : OPC > i n t = OPA > i n t OPB > i n t ; break ; c a s e OP MUL IF : OPC > i n t = OPA > i n t ( p r v m i n t t ) OPB > f l o a t ; break ; c a s e OP MUL FI : OPC > f l o a t = OPA > f l o a t ( p r v m v e c t ) OPB > i n t ; break ; c a s e OP MUL VI : OPC > v e c t o r [ 0 ] = ( p r v m v e c t ) OPB > i n t OPA > v e c t o r [ 0 ] ; OPC > v e c t o r [ 1 ] = ( p r v m v e c t ) OPB > i n t OPA > v e c t o r [ 1 ] ; OPC > v e c t o r [ 2 ] = ( p r v m v e c t ) OPB > i n t OPA > v e c t o r [ 2 ] ; break ; c a s e OP DIV VF : { f l o a t temp = 1 . 0 f / OPB > f l o a t ; OPC > v e c t o r [ 0 ] = temp OPA > v e c t o r [ 0 ] ; OPC > v e c t o r [ 1 ] = temp OPA > v e c t o r [ 1 ] ; OPC > v e c t o r [ 2 ] = temp OPA > v e c t o r [ 2 ] ; } break ; c a s e OP DIV I : OPC > i n t = OPA > i n t / OPB > i n t ; break ; c a s e OP DIV IF : OPC > i n t = OPA > i n t / ( p r v m i n t t ) OPB > f l o a t ; break ; c a s e OP DIV FI : OPC > f l o a t = OPA > f l o a t / ( p r v m v e c t ) OPB > i n t ; break ; c a s e OP CONV IF :

12

169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225

OPC > f l o a t = OPA > i n t ; break ; c a s e OP CONV FI : OPC > i n t = OPA > f l o a t ; break ; c a s e OP BITAND I : OPC > i n t = OPA > i n t & OPB > i n t ; break ; c a s e OP BITOR I : OPC > i n t = OPA > i n t | OPB > i n t ; break ; c a s e OP BITAND IF : OPC > i n t = OPA > i n t & ( p r v m i n t t )OPB > f l o a t ; break ; c a s e OP BITOR IF : OPC > i n t = OPA > i n t | ( p r v m i n t t )OPB > f l o a t ; break ; c a s e OP BITAND FI : OPC > f l o a t = ( p r v m i n t t )OPA > f l o a t & OPB > i n t ; break ; c a s e OP BITOR FI : OPC > f l o a t = ( p r v m i n t t )OPA > f l o a t | OPB > i n t ; break ; c a s e OP GE I : OPC > f l o a t = OPA > i n t >= OPB > i n t ; break ; c a s e OP LE I : OPC > f l o a t = OPA > i n t <= OPB > i n t ; break ; c a s e OP GT I : OPC > f l o a t = OPA > i n t > OPB > i n t ; break ; c a s e OP LT I : OPC > f l o a t = OPA > i n t < OPB > i n t ; break ; c a s e OP AND I : OPC > f l o a t = OPA > i n t && OPB > i n t ; break ; c a s e OP OR I : OPC > f l o a t = OPA > i n t | | OPB > i n t ; break ; c a s e OP GE IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t >= OPB > f l o a t ; break ; c a s e OP LE IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t <= OPB > f l o a t ; break ; c a s e OP GT IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t > OPB > f l o a t ; break ; c a s e OP LT IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t < OPB > f l o a t ; break ; c a s e OP AND IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t && OPB > f l o a t ; break ; c a s e OP OR IF :

13

226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282

OPC > f l o a t = ( p r v m v e c t )OPA > i n t | | OPB > f l o a t ; break ; c a s e OP GE FI : OPC > f l o a t = OPA > f l o a t >= ( p r v m v e c t )OPB > i n t ; break ; c a s e OP LE FI : OPC > f l o a t = OPA > f l o a t <= ( p r v m v e c t )OPB > i n t ; break ; c a s e OP GT FI : OPC > f l o a t = OPA > f l o a t > ( p r v m v e c t )OPB > i n t ; break ; c a s e OP LT FI : OPC > f l o a t = OPA > f l o a t < ( p r v m v e c t )OPB > i n t ; break ; c a s e OP AND FI : OPC > f l o a t = OPA > f l o a t && ( p r v m v e c t )OPB > i n t ; break ; c a s e OP OR FI : OPC > f l o a t = OPA > f l o a t | | ( p r v m v e c t )OPB > i n t ; break ; c a s e OP NOT I : OPC > f l o a t = !OPA > i n t ; break ; c a s e OP EQ I : OPC > f l o a t = OPA > i n t == OPB > i n t ; break ; c a s e OP EQ IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t == OPB > f l o a t ; break ; c a s e OP EQ FI : OPC > f l o a t = OPA > f l o a t == ( p r v m v e c t )OPB > i n t ; break ; c a s e OP NE I : OPC > f l o a t = OPA > i n t != OPB > i n t ; break ; c a s e OP NE IF : OPC > f l o a t = ( p r v m v e c t )OPA > i n t != OPB > f l o a t ; break ; c a s e OP NE FI : OPC > f l o a t = OPA > f l o a t != ( p r v m v e c t )OPB > i n t ; break ; c a s e OP STORE I : OPB > i n t = OPA > i n t ; break ; c a s e OP STOREP I : p t r = ( p r v m e v a l t ) ( prog > e d i c t s f i e l d s + OPB > i n t ) ; ptr > i n t = OPA > i n t ; break ; c a s e OP LOAD I : ed = PRVM PROG TO EDICT(OPA > e d i c t ) ; OPC > i n t = ( ( p r v m e v a l t ) ( ( i n t ) ed>v + OPB > i n t ) )> i n t ; break ; case case case case OP GSTOREP I : OP GSTOREP F : OP GSTOREP ENT : OP GSTOREP FLD :

// i n t e g e r s

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283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314

c a s e OP GSTOREP S : c a s e OP GSTOREP FNC : // p o i n t e r s p r i g l o b a l s [OPB > i n t ] = OPA > i n t ; break ; c a s e OP GSTOREP V : p r i g l o b a l s [OPB > i n t ] = OPA > i v e c t o r [ 0 ] ; p r i g l o b a l s [OPB > i n t +1] = OPA > i v e c t o r [ 1 ] ; p r i g l o b a l s [OPB > i n t +2] = OPA > i v e c t o r [ 2 ] ; break ; c a s e OP GADDRESS : i = OPA > i n t + ( p r v m i n t t ) OPB > f l o a t ; OPC > i n t = p r i g l o b a l s [ i ] ; break ; c a s e OP GLOAD I : c a s e OP GLOAD F : c a s e OP GLOAD FLD : c a s e OP GLOAD ENT : c a s e OP GLOAD S : c a s e OP GLOAD FNC : OPC > i n t = p r i g l o b a l s [OPA > i n t ] ; break ; c a s e OP GLOAD V : OPC > i v e c t o r [ 0 ] = p r i g l o b a l s [OPA > i n t ]; OPC > i v e c t o r [ 1 ] = p r i g l o b a l s [OPA > i n t + 1 ] ; OPC > i v e c t o r [ 2 ] = p r i g l o b a l s [OPA > i n t + 2 ] ; break ; // . . . ( i n s t r u c t i o n s w i t c h end )

15