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VSRD-IJEECE, Vol. 2 (3), 2012, 100-113

R RE ES SE EA AR RC CH H A AR RT TI IC CL LE E

Dynamic Voltage Restorers with Three Level Inverter

1

Venkata Ravindra Reddy Putti and 2K. Veeresham

ABSTRACT
This paper presents the application of dynamic voltage restorers (DVR) with three level inverter on power distribution systems for mitigation of voltage sags/swells at critical loads. DVR is one of the compensating types of custom power devices. An adequate modeling and simulation of DVR, including controls in MATLAB, show the flexibility and easiness of the MATLAB environment in studying and understanding such compensating devices. In this paper, it is demonstrated that this device can tightly regulate the voltage at the load terminal against imbalance or harmonic in the source side. Extensive simulation results are included to illustrate the operating principles of a DVR. The author presents results with balanced, unbalanced and nonlinear loads based on dq method. Keywords : DVR, Three Level Inverter, DQ-Model And Power Control.

1. INTRODUCTION
Modem power systems are complex networks, where hundreds of generating stations and thousands of load centers are interconnected through long power transmission and distribution networks[1]. The main concern of consumers is the quality and reliability of power supplies at various load centers where they are located at. Even though the power generation in most well-developed countries is fairly reliable, the quality of the supply is not so reliable. Power quality is obtaining increasing attention by the utilities, as well as by both industrial and commercial electrical consumers. For higher power sensitive loads where the energy storage capabilities of uninterruptible power supplies (UPS) become very costly, the dynamic voltage restorer (DVR) shows promise in providing a more cost effective solution[1, 8]. A DVR is a power-electronic controller that can protect sensitive loads from disturbances in the supply system. It is connected in series with a distribution feeder and is capable of generating or absorbing real and reactive power at its ac terminals. The basic principle of a DVR is simple: by inserting a voltage of required magnitude and frequency, the DVR can restore the load-side voltage
____________________________ 1

Research Scholar, 2Associate Professor, 1,2Department of Electrical and Electronics Engineering, Dadi Institute of Engineering & Technology, Vishakhapatnam, Andhra Pradesh, INDIA. *Correspondence : ravindra.reddy.253@gmail.com

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to the desired amplitude and waveform even when the source voltage is unbalanced or distorted. Usually a DVR is connected to protect sensitive loads during faults in the supply system. DVR has become popular as a cost effective solution for the protection of sensitive loads from voltage sags. Implementations of the DVR have been proposed at both a low voltage (LV) level, as well as a medium voltage (MV) level[2]; and give an opportunity to protect high power sensitive loads from voltage sags. The performance of a DVR is determined solely by its controller. The design of high performance control algorithms for DVR control with improved robustness and desirable steady-state and transient characteristics is therefore an important area of study. The behaviour of the device is studied through steady-state analysis, and limits to achievable performance are found. DVR is an effective solution for power quality problems related to voltage. One of the most common control algorithms that are used for the DVR is based on dq method. This paper introduces a new approach for the estimation of the symmetrical components. Voltage quality problems encompass a variety of disturbances such as sags, swells, flicker, harmonics, and voltage interruption. These disturbances can originate from faults in the distribution system, the starting of heavy loads or the load dynamics. Compensation for voltage disturbances such as sags, swells, flicker, and supply unbalance can be achieved in various ways[5-8]. A typical DVR-connected distribution system is shown in Fig. 1, where the DVR consists of essentially a seriesconnected injection transformer, a voltage source inverter, an inverter output filter, and an energy storage device that is connected to the dc link. The power system upstream to the DVR is usually represented by an equivalent voltage source and source impedance connected in series. The basic operational principle of the DVR is to inject an appropriate voltage in series with the supply through an injection transformer when voltage sag is detected at the point of common coupling (PCC). Loads that are connected downstream are thus protected. Fig.1 is designed to mitigate voltage sags on lines feeding sensitive equipment. Viable alternative to uninterruptible power systems (UPS's) and other utilization voltage solutions to the voltage sag problem. . DVR consists of energy storage unit, PWM inverter, and injection transformer as shown in Fig.1

Fig. 1: Typical Model of DVR DVR is a device that injects a dynamically controlled voltage Vinj in series to the bus voltage by means of a booster transformer as depicted in Fig. 1 There are three single phase booster transformers connected to a three

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phase converter with energy storage system and control circuit[8]. The amplitudes of the three injected phase voltages are controlled such as to eliminate any detrimental effects of a bus fault to the load voltage VL(t). This means that any differential voltage caused by transient disturbances in the ac feeder will be compensated by an equivalent voltage generated by the converter and injected on the medium voltage level through the booster transformer. The DVR works independently of the type of fault or any event that happens in the system, provided that the whole system remains connected to the supply grid, i.e. the line breaker does not trip. For most practical cases, a more economical design can be achieved by only compensating the positive- and negative sequence components of the voltage disturbance seen at the input of the DVR. This option is reasonable because for a typical distribution bus configuration, the zero sequence part of a disturbance will not pass through the step down transformers because of infinite impedance for this component. For most of the time the DVR has, virtually, "nothing to do," except monitoring the bus voltage. This means it does not inject any voltage (Vinj = 0) independent of the load current. Therefore, it is suggested to particularly focus on the losses of a DVR during normal operation. Two specific features addressing this loss issue have been implemented in its design, which are a transformer design with low impedance and the semiconductor devices used for switching. An equivalent circuit diagram of the DVR and the principle of series injection for sag compensation are depicted in Fig. 2 and phasor diagram is shown in Fig.3.

Fig. 2: Equivalent Circuit Diagram

Fig. 3 : Phasor Diagram

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2. OPERATION OF DVR
In normal conditions, the DVR operates in stand-by mode. However, during disturbances, nominal system voltage will be compared to the voltage variation. This is to get the differential voltage that should be injected by the DVR in order to maintain supply voltage to the load within limits. The amplitude and phase angle of the injected voltages are variable, thereby allowing control of the real and reactive power exchange between the DVR and the distribution system. The DC input terminal of a DVR is connected to an energy storage device of appropriate capacity. As mentioned, the reactive power exchange between the DVR and the distribution system is internally generated by the DVR without AC passive reactive components. The real power exchanged at the DVR output ac terminals is provided by the DVR input DC terminal by an external energy source or energy storage system. Also, there is a resemblance in the technical approach to DVRs to that of providing low voltage ride-through (LVRT) capability in wind turbine generators. The dynamic response characteristics, particularly for line supplied DVRs are similar to LVRT-mitigated turbines. Moreover, since the device is connected in series, there are conduction losses, which can be minimized by using Integrated Gate-Commutated Thyristor (IGCT) or GTO technology in the inverters.

3. MODELLING OF DVR
Power quality has a significant influence on high-technology equipments related to communication, advanced control, automation, precise manufacturing technique and on-line service. For example, voltage sag can have a bad influence on the products of semiconductor fabrication with considerable financial losses. Power quality problems include transients, sags, interruptions and other distortions to the sinusoidal waveform. One of the most important power quality issues is voltage sag that is a sudden short duration reduction in voltage magnitude between 10 and 90% compared to nominal voltage. Voltage sag is deemed as a momentary decrease in the rms voltage, with duration ranging from half a cycle up to one minute. Deep voltage sags, even of relatively short duration, can have significant costs because of the proliferation of voltage-sensitive computerbased and variable speed drive loads. The fraction of load that is sensitive to low voltage is expected to grow rapidly in the coming decades. Studies have shown that transmission faults, while relatively rare, can cause widespread sags that may constitute a major source of process interruptions for very long distances from the faulted point. Distribution faults are considerably more common but the resulting sags are more limited in geographic extent. The majority of voltage sags are within 40%of the nominal voltage. Therefore, by designing drives and other critical loads capable of riding through sags with magnitude of up to 40%, interruption of processes can be reduced significantly. The DVR can correct sags resulting from faults in either the transmission or the distribution system. This paper presents modelling and analysis of a DVR with 3-level inverter and sinusoidal pulse width modulation (SPWM) based controller by using the Matlab / Simulink. The proposed control scheme is simple to design and allows flexibility in cost or robustness constraints. In addition, the performance of the designed DVR is examined under different sag conditions. The voltage generated by power stations has a sinusoidal waveform with a constant frequency. Any disturbances

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to voltage waveform can result in problems related with the operation of electrical and electronic devices. Users need constant sine wave shape, constant frequency and symmetrical voltage with a constant rms value to continue the production. This increasing interest to improve overall efficiency and eliminate variations in the industry have resulted more complex instruments that are sensitive to voltage disturbances. The typical power quality disturbances are voltage sags, voltage swells, interruptions, phase shifts, harmonics and transients. Among the disturbances, voltage sag is considered the most severe since the sensitive loads are very susceptible to temporary changes in the voltage. Voltage sag (dip) is a short duration reduction in voltage magnitude between 10% to 90% compared to nominal voltage from half a cycle to a few seconds[4]. The characterization of voltage sags is related with the magnitude of remaining voltage during sag and duration of sag[5]. The magnitude has more influence than the duration on the system. Voltage sags are generally within 40% of the nominal voltage in industry. They can cause damaged product, lost production, restarting expenses and danger of breakdown. Motor starting, transformer energizing, earth faults and short circuit faults will cause short duration increase in current and this will cause voltage sags on the line. The wide area solution is required to mitigate voltage sags and improve power quality. One new approach is using a DVR[1, 8]. The basic operation principle is detecting the voltage sag and injecting the missing voltage in series to the bus as shown in Fig.1. DVR has become a cost effective solution for the protection of sensitive loads from voltage sags. Unlike UPS, the DVR is specifically designed for large loads ranging from a few MVA up to 50MVA or higher[5]. The DVR is fast, flexible and efficient solution to voltage sag problems[4, 8].

4. MODELLING MULTILEVEL INVERTER

The variable output voltage of the inverter is achieved by voltage source inverter (VSI). Solid-state semiconductor devices with turn off capability are used in inverter circuits. A VSI is energized by a stiff DC voltage supply of low impedance at the input. The output voltage is independent of load current. In VSIs, the values of output voltage variations are relatively low due to capacitor[5]. It is difficult to limit current because of the capacitor. The three phase Pulse Width Modulation (PWM) VSI is most popular and common inverter type and it will be used in this study[4]. In general, increasing the switching frequency in voltage source inverters (VSI) leads to the better output voltage / current waveforms. Harmonic reduction in controlling a VSI with variable amplitude and frequency of the output voltage is of importance and thus the conventional inverters which are referred to as two-level inverters have required increased switching frequency along with various PWM switching strategies. In the case of high power / high voltage applications, however, the two-level inverters have some limitations to operate at high frequency mainly due to switching losses and constriction of device rating itself. Moreover, the semiconductor switching devices should be used in such a manner as problematic series / parallel combinations to obtain capability of handling high power. Nowadays the use of multilevel approach is believed to be promising alternative in such a very high power conversion processing system. Advantages of this multilevel approach include good power quality, good electromagnetic compatibility (EMC), low switching losses, and high voltage capability.

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5. MULTILEVEL CONCEPT
Recent advances in power electronics have made the multilevel concept practical. In fact, the concept is so advantageous that several major drives manufacturers have obtained recent patents on multilevel power converters and associated switching techniques. It is evident that the multilevel concept will be a prominent choice for power electronic systems in future years, especially for medium-voltage operation. Multi-level inverters are the modification of basic bridge inverters. They are normally connected in series to form stacks of level. The topological structure of multilevel inverter must cope with the following points. It should have less switching devices as far as possible. It should be capable of enduring very high input voltage such as HVDC transmission for high power applications. Each switching device should have lower switching frequency owing to multilevel approach.

It is a fact that, until today, multilevel topologies are the best alternative to implement low-frequency based inverters with low output voltage distortion. This chapter makes a review about most common multilevel topologies and shows which ones are more suitable to implement inverters for SARES.

6. THE MULTILEVEL CONCEPT AND NOTATION

A multilevel inverter can be defined as a device that is capable to produce a stepped waveform. The generalized stepped waveform is shown in Fig. 4.

Fig. 4 : Multilevel Concept Usually, and also in this work, the follow definitions apply:

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p:number of steps in a quarter-cycle; 2*p + 1: number of levels of a converter; 4*p:number of steps of a converter.

7. QUARTER-WAVE SYMMETRIC MULTILEVEL WAVEFORM

The optimized harmonic stepped waveform is assumed to be the quarter-wave Symmetric. The first half cycle of the quarter-wave symmetric waveform is depicted in Fig. 5.

Fig. 5 : First Half Cycle Of The Quarter-Wave Symmetric Waveform The output voltage level is zero from t = 0 to t = 1. At t = 1, the output voltage level is changed from zero to +V1, and from +V1 to +(V1+V2) at t = 2. The process will be repeated until t = /2, and the output voltage level becomes +V1 +V2++V(S-1)+VS. Then, in the second quarter, the level of output voltage will be decreased to +V1 +V2++V(S-1) at t = -S. The process will be repeated until t = -1 and output voltage becomes zero again. In the second half of the waveform, the process will be repeated all of previous steps except the amplitude of the dc sources change from positive to negative. The next period will then repeat the same cycle.

8. FOURIER SERIES ANALYSIS

The Fourier series coefficient are given by

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For all n, the Fourier series is given as

Hence, Finally, the Fourier series of the quarter-wave symmetric parallel connected multilevel waveform is written as follows:

Where, ak is the switching angles, which must satisfy the following condition

Where, s is the number of H-bridge cells. n is odd harmonic order. and E is the amplitude of dc voltages.

9. TOTAL HARMONIC DISTORTION (THD) CALCULATION

As introduced in the first chapter, the total harmonics distortion (THD) is mathematically given by

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Where H1 is the amplitudes of the fundamental component, whose frequency is w0 and Hn is the amplitudes of the nth harmonics at frequency nw0

Therefore, output voltage THD of the presented waveform can be calculated. Theoretically, to get exact THD, infinite harmonics need to be calculated. However, it is not possible in practice. Therefore, certain number of harmonics will be given. It relies on how precise THD is needed. Usually, n = 63 is reasonably accepted.

10. ADVANTAGES OF MULTILEVEL VOLTAGES

In general, multilevel power converters can be viewed as voltage synthesizers, in which the high output voltage is synthesized from many discrete smaller voltage levels. The main advantages of this approach are summarized as follows: The voltage capacity of the existing devices can be increased many times without the complications of static and dynamic voltage sharing that occur in series-connected devices. Spectral performance of multilevel waveforms is superior to that of their two- level counterparts. Multilevel waveforms naturally limit the problems of large voltage transients that occur due to the reflections on cables, which can damage the motor windings and cause other problems. The voltage control is achieved by modulating the output voltage waveform within the inverter. Multilevel power converters that provide more than two levels of voltage to achieve smoother and less distorted. This paper presents a generalized multilevel inverter (3-level inverter) based DVR topology with self voltage balancing. The existing multilevel inverter such as diode-clamped multilevel inverter can be used for balancing the load voltage through DVR configuration. 3-level diode clamped inverter shown in Fig. 6 and phase (a) switching states are shown in table1.

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Fig. 6 : 3-level Diode Clamped Multilevel Inverter S.no 1 2 3 Sa1 1 0 0 Sa2 1 1 0 Sa11 0 1 1 Sa22 0 0 1 Va +Vdc/2 0 -Vdc/2

Table 1: Switching States on Phase a of 3-level Diode Clamped Inverter

11. MODULATION TECHNIQUES

Pulse width modulation (PWM) control strategies development concerns the development of techniques to reduce the total harmonic distortion (THD) of the current. It is generally recognized that increasing the switching frequency of the PWM pattern reduces the lower-frequency harmonics by moving the switching frequency carrier harmonic and associated sideband harmonics further away from the fundamental frequency component. While this increased switching frequency reduces harmonics, resulting in a lower THD by which high quality output voltage waveforms of desired fundamental r.m.s value and frequency which are as close as possible to sinusoidal wave shape can be obtained. Any deviation from the sinusoidal wave shape will result in harmonic currents in the load which result in electromagnetic interference (EMI), harmonic losses and torque pulsation in the case of motor drives. The quality of the output waveform will improve with increase in switching frequency. Higher switching frequency can be employed for low and medium power inverters, whereas, for high power and medium voltage applications the switching frequency is of the order of 1 kHz. One of the most important problems in controlling a VSI with variable amplitude and frequency of the output voltage is to obtain an output waveform as much as possible of sinusoidal shape employing simple control techniques. Indeed, current harmonics caused by non-sinusoidal voltage feeding imply power losses, electromagnetic interference (EMI), and pulsating torques in ac motor drives. Harmonic reduction can then be strictly related to the performance of an inverter with any switching strategy.

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Under the aspect of harmonic content reduction, multilevel inverters are of the highest importance. They are particularly suitable in high-power applications when the semiconductor devices are not able to operate at high switching frequencies. It is also worth noting that, when solid-state switches, which further lower the highest possible switching frequencies. The multilevel structures allow raising the power handled in the conversion processes, in a very natural and powerful way. The inverter control of three-phase six-step inverter is simple and switching loss is low because there are only six switching per cycle of fundamental frequency. Because an inverter contains electronic switches, it is possible to control the output voltage as well as optimize the harmonics by performing multiple switching within the inverter with the constant dc input voltage Vdc.

12. SINUSOIDAL PULSE WIDTH MODULATION (SPWM)

In sinusoidal PWM instead of maintaining the width of all pulses the same as in the case of multiple PWM, the width of each is varied in proportion to the amplitude of a sine wave evaluated at the same pulse. The distortion is reduced significantly compared to multiple PWM (Figure-7). The dq based controller of DVR with 3-level inverter is shown in Fig. 8.

Fig. 7 : Sinusoidal Pulse Width Modulation

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Fig. 8 : Control of DVR with 3-level inverter based on DQ method

13. RESULTS
The performance of the designed DVR is evaluated by using the Matlab / Simulink program as a simulation example. The DVR is connected to a 50Hz distribution system with a load of 172 Vph-rms, and non linear load. Maximum distribution system having unbalanced load, so in this paper we are discussed about performance of DVR with balanced, unbalanced and nonlinear load. Fig. 9 shows the remaining voltage at PCC, injected voltage and load voltage at 0.4 and 0.2 voltage sags for balanced load. The sag occurs between 0.1-0.16 seconds. The sag is mitigated quickly and almost constant load voltage is obtained. And the respective source voltage, injected voltage by DVR, Load voltage and load current is shown in Fig. 9. Fig. 10 shows the results for unbalanced load and Fig. 11 shows the results for nonlinear load. From these results, proposed control of DVR is shown good performance in both transient and steady state operation.

Fig. 9: DVR Response in Balanced Load

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Fig. 10 : DVR Response In Unbalanced Load

Fig. 11: DVR Response In Non Linear Load

14. CONCLUSION
This paper presents a systematic study of a dynamic voltage restorer that can tightly regulate voltage at the load terminals against any variation in the supply-side voltage while consuming no real power in the steady state. The paper demonstrates the capability of the device through steady-state analysis. A number of options to obtain the time-varying DVR reference voltages are proposed. Also, a structure to realize the DVR by 3 level VSIs is also discussed. The proposed control of DVR is an economical approach to improve multiline power quality. The DVR considered in this paper consists of several algorithms of DVRs which are electrically far apart,

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connected to a common dc link. The control scheme for the DVR includes a multi loop feedback control system, which is identical for both the voltage compensation and the real-power control. The only difference is the way the reference signal is generated, and it depends on the mode of operation. In real-power-flow control mode, the reference is generated according to the real-power requirement demanded by the DVR performing the voltage restoration. All discussions are supplemented by simulation results using MATLAB. From the studies presented in the paper, it can be safely concluded that a DVR is a voltage regulator, voltage restorer, and voltage conditionerall in one.

15. REFERENCES
[1] H.P. Tiwari, Sunil Kumar Gupta, Dynamic Voltage Restorer Based on Load Condition, International Journal of Innovation, Management and Technology, Vol. 1, No. 1, April 2010 [2] Mohammed El Gamal Ahmed Lotfy G. E. M. Ali, Firing Approach for Higher Levels of Diode Clamped Multi-Level Inverters, Proceedings of the 14th International Middle East Power Systems Conference (MEPCON10), Cairo University, Egypt, December 19-21, 2010, Paper ID 115. [3] Paisan Boonchiam and Nadarajah Mithulananthan, Understanding of Dynamic Voltage Restorers Through MATLAB Simulation, Int. J. Sc. Tech.,Vol. 11, No. 3, July-September 2006. [4] Arindam Ghosh and Gerard Ledwich, Compensation of Distribution System Voltage Using DVR IEEE Transactions on Power Delivery, vol. 17, NO. 4, October 2002. [5] Arindam Ghosh, Amit Kumar Jindal, and Avinash Joshi, Design of a Capacitor-Supported Dynamic Voltage Restorer (DVR) for Unbalanced and Distorted Loads, IEEE Transactions on Power Delivery, vol. 19, NO. 1, January 2004. [6] John Godsk Nielsen, Michael Newman, Hans Nielsen, and Frede Blaabjerg, Control and Testing of a Dynamic Voltage Restorer (DVR) at Medium Voltage Level, IEEE Transactions on Power Electronics, vol. 19, NO. 3, MAY 2004. [7] Michael John Newman, Donald Grahame Holmes, John Godsk Nielsen, Frede Blaabjerg, A Dynamic Voltage Restorer (DVR) With Selective Harmonic Compensation at Medium Voltage Level, IEEE Transactions on Industry Applications, vol. 41, NO. 6, November/December 2005. [8] D. Mahinda Vilathgamuwa, H. M. Wijekoon, and S. S. Choi, A Novel Technique to Compensate Voltage Sags in Multiline Distribution SystemThe Interline Dynamic Voltage Restorer, IEEE Transactions on Industrial Electronics, vol. 53, NO. 5, October 2006.

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