4. 5. 6.

7.

erties of varactor-tuned microstrip antennas, Antenna Propag Soc Int Symp Dig 4 (1992), 2229 2232. X. He, S. Gong, Y. Ji, and Q. Liu, Meshed microstrip patch antennas with low RCS, Microwave opt technol lett 46 (2005), 117120. E. Yablonovitch, Inhibited spontaneous emission in solid-state physics and electronics, Phys Rev Lett 58 (1987), 2059 2062. N. Jin, A. Yu, and X. Zhang, An enhanced 2 2 antenna array based on a dumbbell EBG structure, Microwave opt technol lett 39 (2003), 395399. F. R. Yang, K. P. Ma, Y. X. Qian, and T. Itoh, A uniplannar compact photonic-bandgap (UC-PBG) structur and its applications for microwave circuit, IEEE Trans Microwave Theory Tech 47 (1999), 1509 1514.

2007 Wiley Periodicals, Inc.

PULSE GENERATOR BASED ON COMMERCIALLY AVAILABLE DIGITAL CIRCUITRY

K. C. Chang and C. Mias School of Engineering, Warwick University, Coventry, CV4 7AL, United Kingdom Received 26 October 2006 ABSTRACT: The circuitry of a low cost pulse generator based on a commercially available digital integrated circuit is presented. The circuit produces rectangular pulses of amplitude 0.77 V and width 362 ps at half amplitude, and 0.688 V peak-to-peak monocycle pulses with a 10 dB bandwidth of 1.2787 GHz (0.1191 to 1.3978 GHz). 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 14221427, 2007; Published online in Wiley InterScience (www.interscience.wiley. com). DOI 10.1002/mop.22425 Key words: ultrawideband; monocycle pulse generator 1. INTRODUCTION

Figure 1 The functional block diagram of the proposed TLK2521 pulse generator setup. In addition to the pulse generator the setup includes the external power supply, the sampling oscilloscope and the attenuators

Considerable attention is currently being devoted to time domain research due to the varied time-domain reectometry applications and the widespread interest in ultrawideband (UWB) communications [1 4]. Our interest lies in the area of short pulse propagation methods for material measurements [5, 6]. In particular, we aim towards the development of low cost short pulse measurement systems. The transmitter is a key component of a short pulse measurement system and work has been published recently on low cost UWB pulse transmitters based on transistors/diodes [79] and on UWB transmitters based on digital circuits [10]. In this article, we report the development of a low cost shortpulse transmitter. Our proposed pulse transmitter is based on a commercially available digital integrated circuit (IC) employed for data communications. We show the circuit design that produces rectangular pulses and the delay line circuit employed to transform the rectangular pulse into a monocycle pulse. The transient shape and frequency spectrum of both pulses is presented. Although it might seem odd to use a commercial transceiver IC as a pulse generator, the work highlights the fact that commercial chips do exist that with some modications can be readily used in other applications.
2. PULSE GENERATOR DESIGN

The pulse generator circuit presented here takes advantage of the commercially available high speed digital Texas Instruments IC

TLK2521. The TLK2521 is a transceiver, intended for use in high-speed bidirectional point-to-point data transmission systems. It performs parallel-to-serial, serial-to-parallel data conversion, and clock extraction functions for a physical layer interface device. It supports an effective serial interface speed of 2.5 Gbits per second. Figure 1 shows the functional block diagram of the pulse generator [11]. Its detailed circuit design is shown in Figure 2. The Multicomp MCDM(R)-10-T DIP switches S1 and S2 control the presence or absence of pulses in the output stream. The switches are operated manually. However, a low-cost Field Programmable Gate Array (FPGA) digital interface can be employed instead. A 125 MHz Saronix S1903C-125.00 oscillator is used to clock the parallel data into the TLK2521. It also feeds the internal Phase Lock Loop (PLL) of the TLK2521, which produces an oscillating signal of frequency 20 125 MHz necessary for the parallel-toserial conversion. An external power 4 V power supply feeds the 125 MHz oscillator and the STMicroelectronics LD1117D25C 2.5 V voltage regulator. This low drop regulator supplies the TLK2521. The regulators maximum output current is 800 mA, double the maximum current requirement for the TLK2521 chip. During the parallel-to-serial operation of the TLK2521, 18 bits of parallel input data are framed with two additional bits; a start bit always at high logic and a stop bit always at low logic. The bits are clocked at a frequency of 125 MHz. The output serial stream is subsequently transmitted at a rate of 2.5 Gbits per second. If the output binary digits are set through TXD0 to TXD17 (see Fig. 2) to alternate logic, i.e., high followed by low, one may obtain an output oscillating signal of frequency 1.25 GHz. If all the binary digits are set to low then a single pulse is achieved, the start bit. The pulse width can increase by setting to logic high bits adjacent to the start bit. By setting each adjacent bit to logic high the pulse width increases by 400 ps assuming an 125 MHz external oscillator. The parallel input data (TXD0 to TXD17) are set by the DIP switches with 1 k pull-up resistor and 100 nF capacitor at each pin (see Fig. 2). The 100 nF capacitor helps to stabilize the voltage at the input pin of the TLK2521 by coupling ac signals to the ground. The circuit design allows a differential output as shown in Figure 1 or a single-ended output by terminating one of the outputs, DOUTTXP (pin 60) or DOUTTXN (pin 59) with a 50 termination resistor.

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Figure 2 Detailed circuit design of the pulse generator

The TLK2521 chip requires a 2.5 V positive voltage supply and it provides a Positive Emitter Coupled Logic (PECL) output with a differential voltage swing of 1.5 V. The on chip PREEMPH pin (see Fig. 2) provides pre-emphasis of the start bit for stronger pulse output. The receiving part of the chip was not used. Thus, pins DINRXP and DINRXN (see Fig. 2) were set to low to reduce potential noise. Pins RD0 to RD17 were left open to reduce the number of on-board resistors. In Figure 2 the TKL2521 pins were divided into three groups: Transmit (U1A), Receive (U1B), and the third group (U1C). Only the TX group (U1A) was used in this work. As the TLK2521 chip contains both Low Voltage TransistorTransistor Logic (LVTTL) and PECL, care must be taken in the circuit design (see Fig. 3) to avoid interference. LVTTL currents may generate noise that can potentially interfere with PECL signals when the two types of signals share a common ground. The

125 MHz oscillator may also be a potential source of interference to the PECL signals. Thus, as a precaution, signal and ground planes were divided into the analogue PECL section and the digital LVTTL sections. The analogue and digital sections are connected together by Meggitt Sigma BMB2A0120AN4 ferrite beads L2, L3 and L4 [Figs. 2 and 3(b)]. The ferrite bead allows dc connection but appears as high impedance for high frequency signals. A low-cost double-sided FR4 printed circuit board is used to construct the circuit. The upper metalisation layer [Figs. 3(a) and 4(a)] contains the majority of the signal tracks and the lower metalisation layer is the ground plane [Figs. 3(b) and 4(b)]. The latter is divided [Fig. 3(b)] into the digital ground (DGND) and the analogue ground (AGND) sections. Signal routing on the lower layer was kept to a minimum to avoid the presence of ground slots that break the continuity of the ground plane. The

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supply lines to prevent temporal changes in the supplied voltage level. These capacitors are placed close to component voltage supply pins. Leadless surface mount devices (SMD) are employed to avoid lead inductance. The GTX CLK pin (see Fig. 2) of the TLK2521 chip is clocked by an on board SMD oscillator of 125 MHz. The oscillator requires a minimum supply voltage of 3.3 V. This is obtained from the external power supply via an RLC lter (L1, R24, C23) for jitter reduction. The ENABLE (EN) pin of the oscillator is connected to the power supply via the R26 resistor and to the ground via a coupling capacitor for noise reduction. The SMA connector P3 (Figs 2 and 3) provides the external trigger to the sampling oscilloscope.
3. PULSE GENERATOR MEASUREMENTS

Both the ultrawideband (UWB) pulse and trigger signal from our generator are fed to the sampling oscilloscope (Agilent Innium DCA-J 86100C) using 1 m low-cost exible coaxial SMA cables. As the maximum input voltage level at the sampling oscilloscopes signal and trigger ports is 2 V peak-to-peak (p-p), attenuators were used to prevent the risk of oscilloscope damage. A 6 dB attenuator was used at the trigger port. The pulse amplitudes are shown in Figure 5. A 3 dB attenuator is used at the oscilloscopes signal

Figure 3 The pulse generators upper (a) and lower (b) metalisation layers. U1, TLK2521 transceiver; U2, 125MHz Oscillator; U3, LD1117D25C voltage regulator. [Color gure can be viewed in the online issue, which is available at www.interscience.wiley.com]

ground slots force the return current to detour, creating unwanted inductance that may lead to serious ringing and cross-talk problems in the circuit. In our two-layer PCB design, the 2.5 V voltage is distributed by microstrip lines to the DIP switches and the TLK2521 chip. If FPGA switches are employed the switching operation may possibly draw substantial current for short durations of time, thus shunt capacitors of 100 nF and 10 F were placed along the 2.5 V

Figure 4 Photographs of the upper (a) and lower (b) metalisation layers of the pulse generator. [Color gure can be viewed in the online issue, which is available at www.interscience.wiley.com]

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Figure 5 Rectangular pulse output waveforms for different DIP switch settings (the start and stop bits are also included): (a) 10000000000000000000, (b) 10101010101010101010, (c) 11001100110011001100, (d) 10110011011111100100

port. The measured amplitude of the pulse, in Figure 5(a), is 545 mV p-p. Hence, the actual voltage level is 545 (2)1/2 mV p-p. The rise and fall times of the pulse, as recorded by the oscilloscope, are 152 and 218 ps, respectively. The Fourier Series spectrum of the periodic pulse of Figure 5(a) is shown in Figure 6. The rst sidelobe attenuation is at about 21.1 dB. The minimum at 0 Hz is due to the negative base voltage, which is approximately 0.017 V. The spectral components are computed using the standard formula, Am 1 T0

T0

at e jm 0t dt

(1)

where, 0 2/T0 and T0 8 ns. For each spectral component, the square of its absolute value ( Am 2) is normalized by the square value of the maximum absolute spectral component amplitude max[ Am ]. The ratio is plotted in Figure 6. The integral was evaluated using the trapezoidal rule. Figure 5 also demonstrates the exibility of the developed pulse generator. With different settings of the DIP switches, dif-

Figure 6 The spectrum of the rectangular pulse in Figure 5(a). The 10 dB point corresponds to 1.623 GHz (approximately)

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Figure 7 The monocycle pulse generator. [Color gure can be viewed in the online issue, which is available at www.interscience.wiley.com] Figure 9 Monocycle pulse waveform. DIP switch: 10000000000000000000

ferent output waveforms can be obtained. In Figure 5(a), all DIP switch values are set to low and hence the waveform shows a repetition of the start pulse at 125 MHz. Figures 5(b) and 5(c) show the change in the output waveform when a single and a dual bit alternate, i.e., for waveforms 10101010101010101010 and 11001100110011001100, respectively. In Figure 5(d) the modulated pattern 10110011011111100100 is shown.
4. PULSE DELAY CIRCUIT AND MONOCYCLE PULSE GENERATOR RESULTS

Approximately, the 10 dB bandwidth is 1.2787 GHz and the central frequency is 0.7584 GHz.
5. CONCLUSION

The pulse generator can be easily congured to have two SMA output signals that are of opposite polarity (see Fig. 7). If the negative polarity signal is delayed relative to the positive polarity signal and subsequently both signals are combined then a monocycle pulse can be generated. To achieve this, the pulse delay circuit in Figure 8 was fabricated. The microstrip lines of the delay circuit have a 50 characteristic impedance. The delay circuit was designed [11] to provide the following delay line options: 100, 200, 400, and 800 ps. Thus, with different combinations of jumper settings, a delay from 100 to 1500 ps in steps of 100 ps can be achieved. A double-sided low-cost FR4 PCB was used to fabricate the pulse delay circuit. Its conguration was chosen to allow us to establish quickly, through trial and error, a suitable delay time. A delay time of 500 ps was found to be necessary to generate the monocycle pulse. The pulse is shown in Figure 9. The monocycle possesses an equal amplitude for the positive and negative cycles. The spectrum of the pulse is shown in Figure 10.

A detailed circuit description of a pulse/monocycle pulse generator is presented. Experimental results are shown demonstrating rectangular pulses of amplitude 0.77 V and width 362 ps at half amplitude. The monocycle pulse has an amplitude of 0.688 V p-p. It has a 10 dB bandwidth of 1.2787 GHz with central frequency at fc 0.7584 GHz. It is an UWB pulse of fractional bandwidth B/fc greater than 0.2. The proposed circuit offers the exibility to increase the pulse duration. The circuit can be improved further to avoid the ringing trail of the monocycle pulse. It can also be made more compact. In addition, a multi-layer board can be used. The latter will allow ICs of higher speeds to be employed to generate even shorter pulses. It will also lead to a reduction of the existing cross-talk. Such improvements will be the subject of future work.

Figure 8 The microstrip pulse delay circuit. [Color gure can be viewed in the online issue, which is available at www.interscience.wiley.com]

Figure 10 The spectrum of the monocycle pulse (one period); f1 0.1191 GHz and f2 1.3978 GHz

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REFERENCES 1. I. Gresham, A. Jenkins, R. Egri, C. Eswarappa, N. Kinayman, N. Jain, R. Anderson, F. Kolak, R. Wohlert, S.P. Bawell, J. Bennett, and J.P. Lanteri, Ultra-wideband radar sensors for short-range vehicular applications, IEEE Trans Microwave Theory Tech 52 (2004), Part 1, 21052122. 2. F. Elbahhar, A. Rivenq, M. Heddebaut, and J.M. Rouvaen, Using UWB Gaussian pulses for inter-vehicle communications, IEE Proc Commun 152 (2005), 229 234. 3. R.J. Fontana, Recent system applications of short-pulse ultra-wideband (UWB) technology, IEEE Trans Microwave Theory Tech. 4. E.C. Fear and M.A. Stuchly, Microwave detection of breast cancer, IEEE Trans Microwave Theory Tech 48 (2000), Part 1, 1854 1863. 5. A. Deutsch, T.-M. Winkel, G.V. Kopcsay, C.W. Surovic, B.J. Rubin, G.A. Katopis, B.J. Chamberlin, and R.S. Krabbenhoft, Extraction of r(f) and tan (f) for printed circuit board insulators up to 30 GHz using a short-pulse propagation technique, IEEE Trans Adv Pack 28 (2005), 4 12. 6. A. Muqaibel, A. Safaai-Jazi, A. Bayram, A.M. Attiya, and S.M. Riad, Ultrawideband through-the-wall propagation, IEEE Proc Microwaves Antenn Propag 152 (2005), 581588. 7. J.S. Lee and C. Nguyen, Uniplanar picosecond pulse generator using step-recovery diode, Electron Lett 37 (2001), 504 506. 8. M. Miao and C. Nguyen, A uniplanar picosecond impulse generator based on MESFET and SRD, Microwave Opt Technol Lett 39 (2003), 470 472. 9. J. Han and C. Nguyen, On the development of a compact subnanosecond tunable monocycle pulse transmitter for UWB applications, IEEE Trans Microwave Theory Tech 54 (2006), 285293. 10. H. Kim, D. Park, and Y. Joo, All-digital low-power CMOS pulse generator for UWB system, Electron Lett 40 (2004), 1534 1535. 11. K.C. Chan, Ultrawideband (UWB) signal transmission and propagation, M.Sc. Dissertation, School of Engineering, Warwick University, UK, 2005. 2007 Wiley Periodicals, Inc.

1. INTRODUCTION

Since a dielectric resonator (DR) was introduced as an antenna by Long et al. [1], dielectric resonator antennas (DRAs) have received much attention [25]. DRAs share many of the advantages of the microstrip antennas, such as small size, low prole, and light

Figure 1 The structure of stacked disc-ring dielectric resonator antenna

EQUIVALENT CIRCUIT MODEL OF A TRI-RESONANCE WIDEBAND DIELECTRIC RESONATOR ANTENNA

Yu-Feng Ruan,1 Yong-Xin Guo,2 and Xiang-Quan Shi1 1 Nanjing University of Science and Technology, 200 Xiao Lingwei, Nanjing, Jiangsu 210094, Peoples Republic of China 2 Institute for Infocomm Research, 20 Science Park Road, No. 02 21/25, TeleTech Park, Science Park II, Singapore 117674 Received 27 October 2006 ABSTRACT: An equivalent circuit model of a tri-resonance wideband dielectric resonator antenna is presented to give a physical insight into the wideband behavior of the antenna. The well-known LevenbergMarquardt algorithm is employed to improve the convergence characteristics of the curve tting method used for nding the complex equivalent circuit model values having three resonators. The equivalent circuit models with various combinations of the antenna parameters such as dielectric constant, probe length, excitation position, and air-gap are provided to verify that the proposed equivalent circuit model can give a good description of the antenna wideband behavior. 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 14271433, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22470 Key words: wideband antennas; dielectric resonator; equivalent circuit; curve tting; LevenbergMarquardt algorithm

Figure 2 Equivalent circuit model of tri-resonance wideband dielectric resonator antenna

Figure 3 Return losses with r 2 6, r 3 3, r1 4.3 mm, r2 2 mm, r3 7 mm, h1 2.5 mm, h2 4.7 mm, f 3 mm, lw 4.5 mm, g2 0, and g1 g3 0.1 mm

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