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V
s
V
o
L
1
+L
2
_ _
v
2
sin v
2
t t
1
_ _ _ _
+
V
s
V
o
L
1
+L
2
t t
1
_ _
+
L
2
L
1
+L
2
I
1
(7)
i
L2
(t) =
L
1
L
1
+L
2
I
1
cos v
2
t t
1
_ _ _ _
+
L
2
1
V
s
V
o
_ _
L
1
+L
2
_ _
2
Z
2
sin v
2
t t
1
_ _ _ _
+
V
s
V
o
L
1
+L
2
t t
1
_ _
+
L
2
L
1
+L
2
I
1
(8)
V
cr
(t) =
L
1
L
1
+L
2
V
s
V
o
_ _
cos v
2
t t
1
_ _ _ _
Z
2
I
1
sin v
2
t t
1
_ _ _ _
+
L
2
L
1
+L
2
V
s
V
o
_ _
(9)
Z
2
=
..............
L
1
L
2
L
1
+L
2
_ _
C
r
_
(10)
v
2
=
1
........................
L
1
L
2
_ _
/ L
1
+L
2
_ _ _ _
C
r
_ (11)
Mode III (t
2
t
3
): At t
2
, V
Cr
reaches the negative value of
output voltage and then the auxiliary diode D
a
turns on
under ZVS. Although the auxiliary diode is conducting, the
resonant capacitor voltage stays constant, so only i
L1
goes
through the switch. In this interval, the switch can be
turned off at ZVS condition. The best time to turn off the
switch is at t
2
because at this moment the switch current is
Fig. 1 Soft single switch ZVS Buck converter
Fig. 2 Waveforms of the proposed converters
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IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522 517
doi: 10.1049/iet-pel.2012.0092 & The Institution of Engineering and Technology 2013
the lowest.
I
1
= i
L1
t
2
_ _
(12)
I
2
= i
L2
t
2
_ _
(13)
i
L1
(t) =
V
s
L
1
t t
2
_ _
+I
1
(14)
i
L2
(t) =
V
o
L
2
t t
2
_ _
+I
2
(15)
V
cr
(t) = V
o
(16)
Mode IV (t
3
t
4
): At t
3
, the switch is turned off and therefore
the resonant capacitor begins to resonate with L
1
. At the same
time, L
2
keeps on discharging linearly to the output capacitor
through D
a
. At t
4
, the auxiliary diode current reaches zero and
D
a
turns off under ZCS condition.
I
2
= i
L1
t
3
_ _
(17)
I
3
= i
L2
t
3
_ _
(18)
i
L1
(t) = I
2
cos v
3
t t
3
_ _ _ _
+
V
s
Z
3
sin v
3
t t
3
_ _ _ _
(19)
i
L2
(t) =
V
o
L
2
t t
3
_ _
+I
3
(20)
V
cr
(t) = V
s
os v
3
t t
3
_ _ _ _
+Z
3
I
2
sin v
3
t t
3
_ _ _ _
+V
s
V
o
(21)
Mode V (t
4
t
5
): During this mode, the resonance continues
between L
1
and C
r
until i
L1
reaches zero and D turns off at
ZCS
i
L1
(t) = 0 (22)
i
L2
(t) = 0 (23)
V
cr
(t) = 2V
s
V
o
(24)
Mode VI (t
5
t
6
): In this mode, all semi-conductor devices
are off and the load is being supplied by the output
capacitor. The duration of this mode is decided by the
control circuit in order to regulate the output voltage.
3 Design consideration
Based on the theoretical analysis of the proposed converter in
the previous section, design considerations are explained as
following
3.1 1-Resonant elements (L
1
, L
2
and C
r
)
To design the converter, P
out
, V
in
and V
o
should be identied,
based on the switch limitations. f
max
is the maximum allowed
switching frequency which is selected practically about a few
hundred kilo Hertz. f
sw
is the switching frequency which
varies in such a way to regulate the output voltage against
load and line variations.
E
in
=
_
t
5
t
1
V
s
i
L1
dt = 2C
r
V
2
S
(25)
E
out
=
V
2
o
R
T (26)
E
out
= E
in
(27)
A =
V
o
V
S
=
.........
2C
r
Rf
sw
_
(28)
Cr =
P
out
2V
2
S
f
sw
(29)
The parameter E
in
is the input source energy delivered to the
converter and E
out
is the consumed energy by the load. The
parameter A is the converter voltage gain.
When the resonant capacitor voltage becomes equal to the
output voltage (at the end of Mode II), the voltage across the
switch becomes zero and thus it can be turned off at ZVS but
at this point its current is equal to L
1
current. Also, the current
of L
1
has to be minimised to achieve ZCS condition.
Although L
1
current increases in Mode II and the duration
of this mode is related to L
2
, thus, L
1
should be larger than
L
2
. Larger L
1
would further restrict the converter frequency.
Thus, the value of L
1
can be selected twice that of L
2
.
Fig. 3 Equivalent circuit of each operating interval, from
af Modes IVI
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518 IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522
& The Institution of Engineering and Technology 2013 doi: 10.1049/iet-pel.2012.0092
To control the output voltage, the converter frequency must
be changed. As the duration of Modes IV is approximately
constant, the length of Mode VI can be varied. To calculate
the maximum frequency, the duration of Modes IV must
be assessed.
Modes I and II occur when the switch is on and in these
modes L
2
resonates with C
r
. The duration of these modes
can be estimated as
t
a
= p
......
L
2
C
r
_
(30)
Modes IIIV happen when the switch is off and in these
modes, L
1
resonates with C
r
. The modes are approximately
equal to
t
b
= p
......
L
1
C
r
_
(31)
To obtain maximum frequency, the duration of Mode VI has
to be zero.
T
min
= t
b
+t
a
= p
......
L
1
C
r
_
+
......
L
2
C
r
_
_ _
(32)
L
2
= 2L
1
(33)
f
max
=
1
t
b
+t
a
=
1
p 1 +
..
2
_ _ ......
L
2
C
r
_ =
0.132
......
L
2
C
r
_ (34)
By considering equations (32)(34), L
1
and L
2
are calculated.
3.2 2-Semiconductor elements rating (S
m
, D
a
and D)
Assuming that the current of L
1
at t
3
is almost zero, the switch
maximum voltage would reach 2V
S
V
o
. However, because
of the small initial current of the L
1
, the switch voltage stress
would be somewhat more than 2V
S
V
o
. Practically the switch
maximum voltage is
V
SW, max
= 1.1 2V
S
V
o
_ _
(35)
The maximum switch current occurs in Mode II, which is the
maximum current of L
r2
and can be estimated as
I
SW, max
= 1.1
2V
S
V
o
Z
1
(36)
The current and voltage stress of diodes D and D
a
are
V
D, max
= 1.1V
S
(37)
I
D, max
= 1.1
V
S
V
S
(38)
V
D
a
, max
= 2.2V
S
(39)
I
D
a
, max
= I
SW, max
(40)
4 Simulation and experimental results
To justify the validity of the theoretical analysis, the proposed
converter is simulated by PSIM. Fig. 4 shows the switch
current and voltage. It can be observed from the gure that
ZCS and ZVS conditions are provided at turn on and turn
off, respectively. Figs. 5 and 6 illustrate the soft-switching
conditions at turn on and turn off for diode (D) and
auxiliary diode (D
a
), respectively.
A 230 W prototype of the proposed converter has been
built. Input and output voltages are 100 and 48 V,
respectively. The switch and diodes are IRF460 and
BYW29, respectively. The inductors and capacitors are
designed as L
1
= 20 H, L
2
= 10 H, C
r
= 100 nF and C =
100 F. The inductor cores are EI2519 with 15 turns
winding and an air gap to obtain the desired inductance.
The experimental switching waveforms of semi-conductor
elements are shown in Figs. 79. These waveforms illustrate
the achieved soft-switching conditions for all semi-conductor
elements as explained for the simulation results. As shown in
Fig. 7, switch is turned on under ZCS and turned off under
zero-current zero-voltage switching (ZCZVS) because of
auxiliary diode turning on. The presented experimental
Fig. 5 Current and voltage of auxiliary diode D
a
Fig. 4 Current and voltage of switch (S)
Fig. 6 Current and voltage of diode D
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IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522 519
doi: 10.1049/iet-pel.2012.0092 & The Institution of Engineering and Technology 2013
results conrm the theoretical analysis and the simulation
results.
The major ringing in Figs. 7 and 8 is basically because of
resonance between inductor L
2
and the inherent capacitance
of the off-turning diode D
a
. There is another minor ringing
occurring when the main switch is turned off. This ringing
is damped because D
a
is already on.
In Fig. 9, there is a decaying oscillation because of the
resonance between the junction capacitance of diode D and
inductor L
1
.
Fig. 10 shows the converter voltage gain with various
loads. It can be observed from this gure that for a specic
load, as the input voltage decreases/increases, the switching
frequency would be increased/decreased by the feedback
loop to regulate the output voltage. Note that similar to
ZCS quasi-resonant converters (and many other resonant
converters with a constant switch on time), the converter
cannot provide regulation at no load. If the converter load is
reduced abruptly, the controller rapidly reduces the
switching frequency and the output voltage remains
constant. The result of this test is shown in Fig. 11. As can
be observed from this gure, the dynamic response of the
converter is very fast. This is because of the small size of
Fig. 10 Vo/Vs against normalised switching frequency
Fig. 7 Switch current and voltage (time scale is 1 s/div)
Top is the current waveform (7 A/div) and bottom is voltage waveform
(50 V/div)
Fig. 8 Current and voltage of D
a
(time scale is 1 s/div)
Top is the current waveform (14 A/div) and bottom is the voltage waveform
(50 V/div)
Fig. 9 Diode current and voltage (time scale is 1 s/div)
Top is the current waveform (4 A/div) and bottom is voltage waveform
(50 V/div)
Fig. 11 Top is the output voltage ripple (1 V/div) and bottom is the
output current (2 A/div and time scale is 25 s/div)
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520 IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522
& The Institution of Engineering and Technology 2013 doi: 10.1049/iet-pel.2012.0092
the resonant components which results in a very small
converter time constant. Fig. 12 illustrates the efciency for
various operating loads, showing that the converter
efciency is approximately 96% in a wide load range. This
is because of soft-switching conditions for all
semi-conductor elements and low number of passive
elements.
5 Inherent PFC characteristics
The linear relationship between input voltage and L
r1
current,
conrms the inherent converter power factor correction (PFC)
feature. To verify this, the circuit shown in Fig. 13 is
implemented at AC input voltage of 110 V and DC output
voltage of 50 V. By employing the same elements and
operating at the same switching frequency as the previous
prototype, the obtained output power is around 230 W.
Since there is no need for feedback to illustrate the proper
converter operation as a PFC, in this case the prototype
PFC converter is operated without feedback. To ensure that
the 100 Hz output voltage ripple would be < 2%, an 1800
F electrolytic capacitor is chosen for output lter. A small
LC lter is used at the input of the converter to lter the
high-frequency switching ripple. The values of lter
components are 10 H and 1 F.
Fig. 14 illustrates the input current and voltage of the
converter and veries the theoretical assertion of almost
unity PF. The total harmonic distortion is < 0.35 and the
power factor is 94%. To regulate the converter output
voltage based on the above mentioned specications, the
switching frequency has to be changed from 50 to 120 kHz.
The voltage of resonant capacitor and its current are shown
in Fig. 15. Also, the current of the resonant inductors L
1
and L
2
are shown in Figs. 16 and 17, respectively. As it can
be observed from these gures the energy in the resonant
tank, which is related to the resonant capacitor voltage and
the current in the resonant inductors, varies in accordance
to the input voltage. The efciency of the PFC circuit at
Fig. 12 Converter efciency against output power
Fig. 13 Soft single switch ZVS Buck converter as a PFC Converter
Fig. 14 Top is the input line current (3 A/div) and bottom is the
input line voltage (100 V/div and time scale is 2.5 ms/div)
Fig. 15 Top is the resonant capacitor current (10 A/div) and
bottom is the resonant capacitor voltage in PFC circuit (100 V/div
and time scale is 2.5 ms/div)
Fig. 16 L
1
current in PFC circuit (10 A/div and time scale is
2.5 ms/div)
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IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522 521
doi: 10.1049/iet-pel.2012.0092 & The Institution of Engineering and Technology 2013
various loads is illustrated in Fig. 18. It can be observed that
PFC efciency at full load is 93%.
6 Conclusions
A fully soft switched converter with a single switch is
presented in this paper. The required passive elements are
very small which makes it suitable for most applications.
The converter efciency is approximately 96% in wide load
range. This is primarily because of the presence of fully
soft-switching conditions for all semi-conductor elements,
the low number of circuit components and the small size of
inductors. The proposed converter is also appropriate for
PFC purposes because of the inherent PFC feature of the
converter. The presented experimental results conrm the
theoretical analysis and demonstrate superior converter
performance.
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Fig. 18 PFC efciency against output power
Fig. 17 L
2
current in PFC circuit (10 A/div and time scale is
2.5 ms/div)
www.ietdl.org
522 IET Power Electron., 2013, Vol. 6, Iss. 3, pp. 516522
& The Institution of Engineering and Technology 2013 doi: 10.1049/iet-pel.2012.0092