IRF9540, RF1S9540SM

Data Sheet January 2002

19A, 100V, 0.200 Ohm, P-Channel Power Features

MOSFETs • 19A, 100V
These are P-Channel enhancement mode silicon gate power
• rDS(ON) = 0.200Ω
field effect transistors. They are advanced power MOSFETs
designed, tested, and guaranteed to withstand a specified • Single Pulse Avalanche Energy Rated
level of energy in the breakdown avalanche mode of • SOA is Power Dissipation Limited
operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching • Nanosecond Switching Speeds
convertors, motor drivers, relay drivers, and drivers for high • Linear Transfer Characteristics
power bipolar switching transistors requiring high speed and
• High Input Impedance
low gate drive power. They can be operated directly from
integrated circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly Developmental Type TA17521.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND D

IRF9540 TO-220AB IRF9540

RF1S9540SM TO-263AB RF1S9540

G
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S9540SM9A.
S

Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN (FLANGE) GATE
SOURCE

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

 IRF9540, RF1S9540SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF9540,
RF1S9540SM UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -100 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -19 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -12 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -76 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 150 W
Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W/oC
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 960 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V (Figure 10) -100 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON) MAX, VGS = -10V -19 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -10A, VGS = -10V (Figures 8, 9) - 0.150 0.200 Ω
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON) MAX, ID = -6A 5 7 - S
(Figure 12)
Turn-On Delay Time td(ON) VDD = -50V, ID ≈19A, RG = 9.1Ω, RL = 2.3Ω, - 16 20 ns
Rise Time tr VGS = -10V, (Figures 17, 18) - 65 100 ns
MOSFET Switching Times are Essentially
Turn-Off Delay Time td(OFF) Independent of Operating Temperature - 47 70 ns
Fall Time tf - 28 70 ns
Total Gate Charge Qg(TOT) VGS = -10V, ID = -19A, VDS = 0.8 x Rated BVDSS, - 70 90 nC
(Gate to Source + Gate to Drain) Ig(REF) = -1.5mA (Figures 14, 19, 20)
Gate to Source Charge Qgs Gate Charge is Essentially Independent of - 14 - nC
Operating Temperature
Gate to Drain “Miller” Charge Qgd - 56 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz - 1100 - pF
Output Capacitance COSS (Figure 11) - 550 - pF
Reverse Transfer Capacitance CRSS - 250 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw on Tab to Symbol Showing the
the Center of Die Internal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) from
Package to the Center of LD
Die
Internal Source Inductance LS Measured From the G - 7.5 - nH
Source Lead, 6mm LS
(0.25in) From Package to
Source Bonding Pad S

Thermal Resistance Junction to Case RθJC - - 1 oC/W

Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 62.5 oC/W

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

 IRF9540, RF1S9540SM

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol - - -19 A
Showing the Integral Re- D
Pulse Source to Drain Current ISDM - - -76 A
verse
(Note 3)
P-N Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TC = 25oC, ISD = -19A, VGS = 0V (Figure 13) - - -1.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = 19A, dISD/dt = 100A/µs - 170 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = 19A, dISD/dt = 100A/µs - 0.8 - µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 4mH, RG = 25Ω, peak IAS = 19A. (Figures 15, 16).

Typical Performance Curves Unless Otherwise Specified

1.2 -20
POWER DISSIPATION MULTIPLIER

1.0 -20
ID, DRAIN CURRENT (A)

0.8
-15

0.6
-10
0.4

-5
0.2

0 0
0 25 50 75 100 125 150 175 25 75 125 175
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

1
THERMAL IMPEDANCE (oC/W)

0.5
ZθJC, TRANSIENT

0.2

0.1 PDM
0.1
0.05
t1
0.02
t2
0.01
SINGLE PULSE NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x RθJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 1 10
t1 , RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

 IRF9540, RF1S9540SM

Typical Performance Curves Unless Otherwise Specified (Continued)

200 -100
VGS = -16V VGS = -14V
100

-80 PULSE DURATION = 80µs

10µs
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

DUTY CYCLE = 0.5% MAX
100µs
1ms
10 -60 VGS = -12V

10ms VGS = -10V

OPERATION IN THIS 100ms -40
AREA IS LIMITED DC VGS = -9V
1 BY rDS(ON) VGS = -8V
-20
VGS = -7V
TC = 25oC
TJ = MAX RATED VGS = -6V
VGS = -5V
SINGLE PULSE 0 VGS = -4V
0.1 0 -10 -20 -30 -40 -50
1 10 100 500
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

-50 -100

IDS(ON), DRAIN TO SOURCE CURRENT (A)

PULSE DURATION = 80µs VGS = -16V VGS = -12V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX VGS = -14V DUTY CYCLE = 0.5% MAX
-40
ID, DRAIN CURRENT (A)

VGS = -10V
-10
-30 VGS = -9V

VGS = -8V
-20 TJ = 125oC
VGS = -7V -1
TJ = 25oC
-10 VGS = -6V
TJ = -55oC
VGS = -5V
VGS = -4V
0 -0.1
0 -2 -4 -6 -8 -10 0 -2 -4 -6 -8 -10 -12 -14
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

0.26
PULSE DURATION = 80µs 2.0
DUTY CYCLE = 0.5% MAX
VGS = -10V, ID = 10A
rDS(ON), DRAIN TO SOURCE ON

NORMALIZED DRAIN TO SOURCE

0.22 VGS = -10V PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX
1.5
RESISTANCE (Ω)

ON RESISTANCE

0.18
VGS = -20V

1.0
0.14

0.10 0.5

0 -20 -40 -60 -80 -100 0.2

ID, DRAIN CURRENT (A) -40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

 IRF9540, RF1S9540SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1.15 2000
ID = 250µA VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE

1600 CRSS = CGD

COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

1.05

C, CAPACITANCE (pF)
CISS
1200

0.95
800
COSS

0.85
400 CRSS

0
0.75 0 -10 -20 -30 -40 -50
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

15 100
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX ISD, SOURCE TO DRAIN CURRENT (A) DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)

12 TJ = 150oC
TJ = -55oC
TJ = 25oC
10
9
TJ = 25oC

6 TJ = 125oC
1

0 0.1
0 -20 -40 -60 -80 -100 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID, DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

0
ID = -19A
VGS, GATE TO SOURCE (V)

-5

VDS = -20V
-10
VDS = -50V
VDS = -80V

0 20 40 60 80
Qg(TOT) , GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

 IRF9540, RF1S9540SM

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
REQUIRED PEAK IAS RG
-
VDD
+

0V DUT VDD
tP IAS
VGS
VDS
IAS tP
0.01Ω
BVDSS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
0

VDS
DUT
12V
0.2µF 50kΩ
BATTERY
0.3µF
Qgs VGS
D Qgd

Qg(TOT)
G DUT
VDD
0
Ig(REF) S 0
+VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR Ig(REF)

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation IRF9540, RF1S9540SM Rev. B

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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4