Superconducting Fault Current Limiter to Mitigate the Effect of DC Line Fault in VSC-HVDC System

Premila Manohar and Wajid Ahmed

Abstract--Voltage source converter based HVDC systems involving overhead transmission lines are prone to severe overvoltages during line faults. At present, they find applications only in back to back and/or underground cable transmission, with low power ratings. A conventional HVDC system suppresses the dc fault very well with the controllers and smoothing reactors while the same is not true with voltage source converter based HVDC systems. This necessitates the operation of some kind of protective devices. A superconducting fault current limiter, in this regard, is a possible device which can mitigate the effects of dc line faults. In this work, it is aimed to evaluate the dynamic performance of VSC-HVDC system integrated with a superconducting fault current limiter. The resistive superconducting fault current limiter is modeled in MATLAB and is interfaced with low voltage VSC-HVDC system, in PSCAD/EMTDC environment. The results of analysis for various ac and dc fault conditions are presented. Index Terms---VSC-HVDC, dc line superconducting fault current limiter, PSCAD/EMTDC. fault, protection, dynamic analysis,
AC System Transformer #1 #2 AC Filter VSC Rectifier
Fig. 1. Two terminal VSC-HVDC system

Phase Reactor

DC line C C

Phase Reactor Transformer #2 #1 AC Filter VSC Inverter

AC System

I. INTRODUCTION The advantages of thyristor based classical HVDC systems for long distance bulk power transmission, asynchronous operation, underground and under water transmission and in stabilizing a predominantly ac network is well established. However, it poses difficulties in terms of reactive power consumption, commutation failure during ac voltage dips, and inversion into weak ac system, large foot print, and heavy dependence on telecommunication between stations hindering the multi terminal HVDC operation. On the other hand the recent voltage source converter (VSC) based HVDC system offers advantages in terms of, independent active and reactive power control absence of harmonic filters suppression of commutation failure connection to passive ac loads

Dr. P. Manohar is with the Department of Electrical and Electronics Engineering, M. S. Ramaiah Institute of Technology, Bangalore-560 054, Karnataka state, India. (e-mail: premilakrvh@yahoo.com). W. Ahmed is with the Department of Electrical and Electronics Engineering, S. J. (Govt.) Polytechnic, Bangalore -560 001, Karnataka state, India. (e-mail: ahmed_wajid@rediffmail.com).

978-1-4244-1762-9/12/$25.00 2012 IEEE

lower foot prints operation without telecommunication between terminals These advantages can lead to a number of new applications such as multi terminal grid operation and city center in-feeds [1]-[2]. At present, the VSC-HVDC systems are being considered only for the case of back to back systems and for underground cables transmissions, involving low power ratings. This is mainly because of the increased power losses in the converters and its vulnerability to DC faults. Here, the absence of DC overhead transmission lines makes the VSC- HVDC system immune to DC line faults. The classical current source converter (CSC) based HVDC systems can be used for both overhead and underground transmission lines. It can handle the DC line fault without severe disadvantages. In CSC-HVDC systems, the smoothing reactor, along with controllers, satisfactorily limits the dc current during line faults. In case of VSC-HVDC system, during line fault, the IGBTs lose control and the freewheeling diodes continue to feed the fault. As a consequence of this, the capacitors on the faulted line start discharging and the voltage of the healthy pole increases to a high value. The VSC-HVDC systems for applications involving overhead transmission lines are, thus, not feasible yet. The schematic of VSC-HVDC system is shown in Fig.1. The protection of VSC-HVDC systems in such cases is of utmost concern and has attracted many researchers to come up with different solutions. The study of protective devices and their recovery characteristics are discussed in detail in [3]-[4]. Further, the applications of some of these protective devices are considered in multi-terminal HVDC applications [5]-[7]. The authors Candelaria et al. in their review paper [8] have consolidated various possible protection criteria. Some of the options discussed are ac protection devices, dc protection components, converter embedded devices and sophisticated controllers. It is observed here that, the controllers along with

978-1-4673-0449-8/12/$31.00 2012 IEEE

some type of dc protective devices are best suited to obtain a satisfactory transient performance and also isolate the line during a permanent fault. In this context, a superconducting fault current limiter (SCFCL) can be technically and economically attractive alternative. The present work explores the application of SCFCL to overcome the effects of DC line fault in a VSC-HVDC system with overhead lines. II. SUPERCONDUCTING FAULT CURRENT LIMITER A fault current limiter fundamentally, offers a very high impedance to fault current, bringing it down to a low level, in a very short time. The SCFCL will be in superconducting state (zero resistance) during normal operation and transits to normal state (high impedance) during fault conditions. The SCFCLs have distinct advantages over conventional FCLs in high voltage networks. SCFCL provides an ultra-fast transition from superconducting to normal state and is self-operating and repetitive in nature. Further, during normal operation the resistance being zero, the losses will be negligibly small. At present, the superconducting fault current limiter (SCFCL) applications are mostly concentrated in ac systems. Various prototype ac SCFCLs have been designed and successfully field-tested, demonstrating their technical feasibility [9]-[12]. Their application in dc systems has not received much attention. One of the major difficulties in the application of SCFCL is the losses in the leads. The dc network will need only two current leads, as against six for 3 phase ac system. These losses, in case of dc operation, are almost zero. Thus dc SCFCLs would require a refrigeration system of much lower power. In fact, this would make them more compact and less expensive. Operationally, ac and dc SCFCLs differ in terms of limitation period, which is substantially larger in case of dc. On the other hand, the peak current immediately after the occurrence of the fault, known as the quench current and resistance increase of the SCFCL are expected to remain the same fundamentally, for both ac to dc networks [13]. The quench current mainly depends upon the material property and the rate of rise of current, which in turn depends upon the overall inductance of the circuit while the resistance during the limitation period is a function of resistivity, specific heat and rms value of the voltage and is independent of ac and dc. A number of studies concerning material aspects, types of FCLs, prototypes and testing have been suggested in the literature [14]-[17]. However, their application in power system and in particular HVDC system has received very limited attention. The dynamic modeling and simulation of an HVDC system including the resistive SCFCL and the application of resistive SCFCL in a back to back HVDC system is described in detail in references [18]-[20]. The results of these studies indicate the effectiveness of resistive SCFCL in controlling the dc fault current during transients.
Fig. 2. E-J characteristic of HTS material

A. Materials for superconducting fault current limiter Various high temperature superconducting (HTS) materials working at 77K have been suggested for power applications. Among them the major material systems are, known as Bi2212 1. B i 2 S r 2 C a C u 2 O 8 + 2. B i 2 S r 2 C a 2 C u 3 O 1 0 + y known as Bi2223 known as Y123 3. Y B a 2 C u 3 O 6 + z Of these, Bi2212 is the most robust material and artifacts with large surface area can be produced. This means that for the same critical current of Bi2212 the critical current density of the FCL can be made higher and hence a Bi2212 made FCLs can have higher ratings. These materials have nonlinear E-J characteristics and also exhibit a very strong dependence on temperature. The mathematical model used in the present work is based on the E-J characteristics of Bi2212 material [14]. B. Mathematical model of superconducting fault current limiter When the current density in the high temperature SCFCL exceeds the critical value, an electric field develops across the FCL. The electric field thus developed at any instant depends upon the current density in the SCFCL and the temperature of the FCL. This nonlinear E-J characteristic and its dependence on temperature forms the basis for the simulation of SCFCL. The E-J characteristic, exhibited by all HTS materials, is shown in Fig. 2. This can be subdivided in to 3 parts: 1) Superconducting state In this state, the HTS material is in the superconducting state. The current density across SCFCL is below the critical value and consequently the electric field across it is very small. The electric field is given by
J E ( J ,T ) = Ec J c (T )

(1)

Here J c ( T ) is the critical current density, T is temperature of the superconductor, E c corresponding electric field, and J is current density of Bi2212 material. The quantity J c ( T ) is temperature dependent and this dependence, obtained experimentally, is taken to be, J ( 77 )( T c T ) (2) J (T ) = c
c

( T c 77 ) 1 . 8

with temperatures expressed in the units of K. Here critical temperature of the superconductor.

Tc is the

because of higher value of the current density, the electric field across the FCL starts picking up and the FCL develops resistance. Because of this resistance, the temperature increases. This increase in temperature causes a further increase in electric field across the FCL. This is self-enhancing process and it continues until the temperature of FCL exceeds a critical value known as critical temperature. At this point, the HTS material enters the normal resistive state. During this phase the electric field is given by,
Ec J c ( 77 ) J (3) E (J ,T ) = E 0 E J ( 77 ) J ( T ) c 0 c 3) Normal resistive state In this state the normal conducting properties of the HTS material are exhibited. Here, the electric field across FCL is linearly proportional to both current density and the temperature of the FCL and is given by, T (4) E ( J , T ) = (T c ) J Tc Here, is the normal resistivity. For bulk Bi2212 material,

C u r r e n t( k A )

2) Flux flow state The HTS material enters this state when the current density across it exceeds a value represented by J 0 . In this state,

3 2.75 2.5

Without FCL With FCL

1.5

1 0.75 0.5 0.35 0

-0.5

-1 0.02

0.04

0.06

0.07

0.08

0.1

0.12

0.14

0.16

Time (sec)

Fig. 4. Current during line to ground fault

35 140

30 FCL Temperature

130

R e sista n ce (O hm s)

25

120 20 110 15 FCL Resistance 10 100

90

0 77 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16

Time (sec)

Fig. 5. Variation of resistance and temperature of SCFCL

the parameters J c ( 77 ), , , at 77K depend upon the material processing condition and falls in the following range: 2 10 7 J c 10 8 A/m , 0 . 1 E 0 10 mV/cm,

100 2000 -cm, 5 15 , and 2 4 . These parameters have to be chosen carefully because they bring about a marked difference in the behavior of FCL. In all the three states mentioned above, the heat diffusion equation of the HTS material is given by, dT (5) c = E ( J ,T ) J
dt

where, c = specific heat of Bi2212 which is again temperature dependent.

Fig. 3. Test circuit for SCFCL simulation

C. Simulation and Validation of the model The SCFCL model described above is simulated on MATLAB and is verified and validated by considering a typical test setup shown in Fig. 3, as used by Lin et al. [14].

This system consists of a 10 kV, 50 Hz, single phase system feeding a load through 10 km long cable. The source impedance consists of resistance and inductance in series. The cable is modeled as a -circuit and the load as simple R-L circuit. The dynamic analysis of this SCFCL test circuit is carried out with a steady current of 250A (rms) under ac conditions. To evaluate the performance of the SCFCL, a line to ground fault lasting three cycles is created on the load side, at 0.06 sec. The total simulation time is 0.5 sec with time step t = 50 s. On the onset of the fault, the current in the circuit goes on increasing. This raises the electric field across the SCFCL due to the current density exceeding the critical value and increase in temperature, which increases the resistance of the SCFCL. SCFCL loses its superconductivity and introduces a resistance in the circuit. This brings down the first peak of the fault current from a peak of 2700 A to about 750 A in less than a cycle. Further, it reduces the consecutive peak values from 2600A to 500A and 2500A to 475A respectively. The variation of current, resistance and temperature with respect to time are shown in Fig. 4 and Fig. 5 respectively. The SCFCL model described using E-J characteristics above is developed using MATLAB code [20] and then interfaced with PSCAD/EMTDC test circuit shown in fig. 3. Modeling the behavior of FCL involves the following steps. Knowing the cross sectional area and current flowing through the superconductor, calculate the current density in the SCFCL at each instant and compare the electric field E ( J , T ) with E0 . With E ( J , T state. When

) E 0 , FCL is in the superconducting E ( J , T ) > E 0 , SCFCL enters the flux flow

state. SCFCL continues to be in flux flow state till R FCL R n ,

T e m pe ra tu re (K )

AC System Transformer #1 #2

Phase Reactor AC Filter VSC Rectifier

SCFCL C

DC line

Phase Reactor Transformer #2 #1 AC Filter VSC Inverter

AC System

Fig. 6. VSC-HVDC system with SCFCL

where Rn = (90)Ln S and Ln and S are length and area of cross section of the superconducting material. When R FCL > R n , the FCL is in normal state and offers maximum resistance to the flow of current. The electric field, voltage drop, temperature and resistance of the SCFCL are calculated at every instant. III. APPLICATION OF SCFCL IN VSC-HVDC SYSTEM This section will assess the usefulness of SCFCL to control the dc line current, in a VSC-HVDC system with overhead dc transmission lines. The SCFCL can be placed in series with DC line, either on the rectifier side or on the inverter side. Here, it is decided to place at the rectifier side, as shown in Fig. 6. The rating of VSC-HVDC system is so selected as to match the rating of the SCFCL considered. However, it can be used for different ratings also. The resistive SCFCL model developed is now integrated with VSC-HVDC system simulated in PSCAD/EMTDC environment. The aim of this study is to evaluate the performance of the VSC-HVDC system with SCFCL for various dynamic conditions. Of specific interest is the dc line fault. The rectifier (sending end) controls the real and reactive power as a function of phase angle difference between sending end and receiving end. The inverter controls the ac voltage magnitude and also dc voltage. A small smoothing reactor is used here to reduce the ripple in the dc current and to control the charge across dc capacitor of VSC. The different parameters used in the study are listed in Appendix I. IV. NUMERICAL SIMULATION AND RESULTS In order to investigate the performance of VSC-HVDC system with SCFCL model various simulation studies are carried out for ac faults on the rectifier side, ac faults on the inverter side and the dc line fault. In all the cases simulated here, the fault is applied at 2.02 sec lasting for the duration for 2 cycles. The time step chosen for the simulations is t = 50 s , which is is sufficient to notice the behavior of SCFCL, which provides ultra fast transition from superconducting state to normal state. A. Single line to ground fault at inverter and rectifier bus In order to investigate the system performance during ac fault, simulations of single line to ground (SLG) faults at the inverter ac bus and rectifier ac bus have been carried out. The

variation of dc current, dc voltage and SCFCL resistance and temperature are compared for the cases with and without SCFCL in Fig. 7. Initially, as long as the current density across the SCFCL is less than the critical value it is in superconducting state offering zero resistance to the flow of current through it. When the current density exceeds the critical value the electric field across SCFCL starts picking up due to which the temperature increases resulting in increase of SCFCL resistance which results in quenching the first peak of the fault current. With SCFCL the dc line current is reduced from 1.75 kA to 0.75kA. Further, after limiting the first peak of the fault current, the SCFCL takes transition to normal resistive state offering maximum resistance and it continues to limit the peaks in the fault period. As seen, the dc voltage during the fault period falls and once the fault is cleared, the dc voltage will come back to steady state. When the single line to ground fault occurs on rectifier ac bus, the SCFCL performance is much more effective. As shown in Fig. 8, the dc line current without SCFCL reaches the negative peak of 0.75 kA and a positive peak of 0.9 kA. The SCFCL acts quickly on the fault current and reduces the negative peak to 0.4 kA and the positive peak to about 0.2 kA. B. Line to Line faults at rectifier and inverter bus The results of line to line (LL) fault on inverter and rectifier ac bus of VSC-HVDC are shown in fig. 9 and fig. 10 respectively. As seen, for the inverter fault the SCFCL acts quickly to reduce the first peak from 1.5 kA to 0.7 kA and further from 1.2 kA to 0.3 kA. When the fault is on rectifier bus the SCFCL has brought the dc line current from negative 1.25 kA to 0.5 kA and further positive peak value from 1.25 kA to 0.25 kA, as shown in fig. 10. C. Three phase to ground fault at inverter and rectifier As shown in Fig. 11, when a three phase to ground fault occurs on inverter bus, without SCFCL the dc line current reaches the maximum value of 2.75 kA and inclusion of SCFCL resulted in limiting the peak to about 0.8 kA. Further, it reduces the successive peaks from 1.75 kA to 0.5 kA and 1.6 kA to 0.25 kA. For a three phase to ground fault at rectifier ac bus, the SCFCL clips the dc line current, to 0.6 kA, further the positive peak is limited to 0.125 kA from 1.25 kA. D. DC line to ground fault When the dc line to ground fault occurs at inverter, the dc line current raised sharply reaching the positive peak of about 8 kA without SCFCL. When the SCFCL is connected on the dc side of rectifier, the peak value is reduced to 2.5 kA. This is shown in Fig. 12. When the dc line to ground fault occurs at rectifier dc side, as shown in Fig. 13, the dc line current during fault period reaches a negative peak of about 8 kA, with SCFCL included this value of current is reduced to about 2 kA.

2 1.75 1.5 Without FCL With FCL

10

Without FCL With FCL

30 FCL Resistance 25

130 125

9.5 1 0.75

R e s is ta n c e (O h m s )

20 110 FCL Temperature 100

d c V o lta g e (k V )

C u rre n t (k A )

0.5 0.25 0

15

-0.5

8.5

10

-1 8 -1.5

90

0 77
7.5

-2

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

2.2

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

2.2

2.02

2.03

2.04

2.06

2.08

2.1

Time (sec)

Time (sec)

Time (sec)

(a). DC line current

(b). DC voltage on inverter side Fig. 7. Single line to ground fault at inverter bus

(c). Resistance and Temperature of SCFCL

1 0.75 0.5

Without FCL With FCL

Without FCL With FCL 1.5

1.5 1.25 1 Without FCL With FCL

C u rre n t (k A )

0.25 0

C u rre n t (k A )

0.75 0.5

0.5

C u rre n t (k A )

0.25 0 -0.25 -0.5 -0.75

0.25 0 -0.25 -0.5

-0.25 -0.5 -0.75 -1

-1

-1
-1.5

-1.25

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

2.2

-2 2

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

2.2

-1.5 2

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

Time (sec)

Time (sec)

Time (sec)

Fig. 8. DC current for SLG fault at rectifier bus

Fig. 9. DC current for L-L fault at inverter bus

Fig. 10. DC current for L-L fault at rectifier bus

3 2.75

Without FCL With FCL

10 9 8 7 Without FCL With FCL

1 0.25 0

1.75

-1.5

Without FCL With FCL

C u rre n t (k A )

0.75

C u rre n t (k A )

C u rre n t (k A )

0.25 0 -0.25 -0.75

5 4

-4

-6 2.5

-1.75 1 0.25 0 -3 2 2.02 2.04 2.06 2.08 2.1 2.12 2.14 2.16 2.18 2.2 -1

-7.5 -8

-10 2 2.02 2.04 2.06 2.08 2.1 2.12 2.14 2.16 2.18 2.2

2.02

2.04

2.06

2.08

2.1

2.12

2.14

2.16

2.18

T e m p e ra tu re (K )
2.2
2.2

Time (sec)

Time (sec)

Time (sec)

Fig. 11. DC current for three phase to ground fault at inverter bus

Fig. 12. DC line current for dc line to ground fault at inverter side

Fig. 13. DC current for dc line to ground fault at rectifier side

V. CONCLUSIONS This paper has successfully integrated and evaluated the performance of VSC-HVDC system with SCFCL. The transient analysis is carried out for different ac/dc faults both on inverter and rectifier ac bus. The focus of this paper is to evaluate the performance of SCFCL for dc line fault which results in large fault current. The study is carried out by placing the SCFCL model on dc side of the rectifier. From the limited results available, it is concluded that the SCFCL can indeed act as an efficient protective device for VSC-HVDC systems with overhead lines. Further studies that need to be addressed are inclusion of a shunt across the SCFCL model after quenching, to maintain the temperature rise, heat dissipated and resistance at constant values. VI. APPENDIX I The circuit parameters used for simulation, Rs = 0.1 , Ls = 30e-3 H, CT = 7e-10 F, LT = 0.15e-7 H, RL = 30 , LL = 0.0551 H. SCFCL parameters, T = 77 K, Tc = 90 K, Jc = 107 A/m2, E0 = 1 V/m, Ec = 0.0001V/m, = 15 , = 10 , Length = 50 m

= 1 10 5 -m, and S = 0.25x10-4 m2

VSC-HVDC system parameters, Pdc = 2.5 MW, Vdc = 10 kV, Idc = 250A,Vac = 13.8 kV, dc line length = 100 km (T section with Rd = 5 , Capacitance = 26 F), dc smoothing reactor = 5 mH, dc side capacitance of VSC, C = 500 F, PWM switching frequency is 33 times the fundamental 60 Hz. VII. REFERENCES
[1] G. Asplund, K. Erksson, and K. Svensson, DC Transmission based on voltage source converters, Proc. CIGRE SC 14 Colloq., South Africa, 1997. B. R. Anderson, VSC transmission tutorial, CIGRE B4 Meeting, Bangalore, India, Sept. 2005. H. Liu, Z. Xu, and Y. Huang, Study of protection strategy for VSC based HVDC system, Proc. IEEE/PES T&D Conference, vol. 1, pp. 49-54, Sept. 2003. J. Yang, J. Zheng, G. Tang, and Z. He, Characteristics and recovery performance of VSC-HVDC DC transmission line fault, Proc. Power and Engineering Conference (APPEEC), pp. 1-4, Apr. 2010. L. Tang and B. T. Ooi, Protection of VSC multi-terminal HVDC against DC faults, 33rd Annual IEEE Power Electronics Specialist Conference, vol. 2, pp. 719-724, Nov. 2002. L. Tang and B. T. Ooi, Locating and isolating DC faults in multiterminal DC systems, IEEE Trans. Power Del., vol. 22, no. 3, pp. 1877-1884, July 2007. L. Livermore, J. Liang, and J. Ekanayake, MTDC VSC technology and its applications for wind power, Proc. Universities Power Engineering Conference (UPEC), Sept. 2010. J. Candelaria and J. D. Park, VSC-HVDC system protection: A review of current methods, Proc. IEEE/PES Power Systems Conference and Exposition (PSCE), Mar. 2011. P. Tixador, Superconducting current limiters-some comparisons and influential parameters, IEEE Trans. App. Superconductivity, vol. 4, no. 4, pp. 190-198, Dec. 1994.

[10] E. Thuries, V. D. Pham, Y. Laumond, T. Yerhaege, A. Fevrier, M. Collet, and M. Bekhaled, Towards the superconducting fault current limiter, IEEE Trans. Power Del., vol. 6, no. 2, pp. 801-808, Apr. 1991. [11] V. Sokolovsky, V. Meerovich, I. Vajda, and V. Beilin, Superconducting FCL: design and application, IEEE Trans. App. Superconductivity, vol. 14, no. 3, pp 1990-1999, Sept. 2004. [12] W. Paul, M. Chen, M. Lakner, J. Rhyner, D. Braun, W. Lanz, and M. Kleimaier, Superconducting fault current limiter-applications, technical and economical benefits, simulations and test results, Proc. 13-201 CIGRE Session 2000, Paris, France. [13] J. Langston, M. Steurer, S. Woodruff, T. Baldwin, and J. Tang, A generic real time computer simulation model for superconducting fault current limiters and its applications in system protection studies, IEEE Trans. App. Superconductivity, vol. 15, no.2, pp. 2090-2093, June 2005. [14] L. Ye and K. P. Juengst, Modeling and simulation of high temperature resistive superconducting fault current limiters, IEEE Trans. App. Superconductivity, vol. 14, no. 2, pp. 839-842, June 2004. [15] H. Kraemer, W. Schmidt, B. Utz, B. Wacker, H. W. Neumueller, G. Ahlf, and R. Hartig, Test of 1 kA superconducting fault current limiter for DC applications, IEEE Trans. App. Superconductivity, vol. 15, no. 2, pp. 1986-1989, June 2005. [16] P. Tixador, C. Villard, and Y. Cointe, DC superconducting fault current limiter, Superconducting Sci. Technology, S118-S125, Feb 2006. [17] CIGRE WG A3.16, Fault current limiters-application, principles and experience, CIGRE SC A3 and B3 Joint Colloq., Tokyo, 2005. [18] P. Manohar, W. Ahmed, and M. Naik, Dynamic modeling and simulation of superconducting fault current limiter for HVDC applications, Proc. National Power Electronics Conference (NPEC), Indian Institute of Science, Bangalore, India, Dec. 2007. [19] P. Manohar and K. K. Dutta, Performance analysis of HVDC system including SCFCL, Proc. National Power Engineering Conference (NPEC), Thiagarajar College of Engineering, Madurai, India, Dec 2010. [20] P. Manohar and K. K. Dutta, Effect of SCFCL on the performance of BTB-HVDC system, International Conference on Electrical Energy Systems (ICEES), SSN College of Engineering, Chennai, India, ISBN: 978-1-4244-9732-4, pp. 288-293, Jan. 2011.

VIII. BIOGRAPHIES
Premila Manohar obtained BE (Electrical, 1981, Karnataka University), ME (Power system, 1985, Mysore University) and PhD (1991, Indian Institute of Science, Bangalore, India). Her research interests are HVDC transmission, application of superconductivity and MEMS. She worked in process simulation industry during 19996-2003 and joined M S Ramaiah Institute of Technology, Bangalore, in 2003. She presently hold the position of Professor in this Institute.

[2] [3]

[4]

[5]

[6]

[7]

[8]

Wajid Ahmed received the Bachelors degree in Electrical Engg., in 1997 from Bangalore University and M.Sc.(Engg.) by Research degree in 2007 from the VTU, Belgaum, Karnataka, India, in the area of HVDC transmission. He is working towards the Ph.D degree at the Department of Electrical Engineering, M.S. Ramaiah Institute of Technology, Bangalore, India. For the last fourteen years he has been working in academia and research, and his research interests include HVDC, SMES and SCFCL applications to HVDC, and digital simulation of power electronics.

[9]