ECEN474: (Analog) VLSI Circuit Design Fall 2010

Lecture 17: Folded Cascode OTA

Sam Palermo Analog & Mixed-Signal Center Texas A&M University

Announcements
HW4 Due Friday 10/22 Exam 2 Wednesday Nov 3 9:10-10:10AM

Agenda
Single-Stage Cascode OTA Folded Cascode OTA

Simple OTA
VDD M5 Rbias Vi+ M1 M2 ViCL M6 Vo

DC Gain Av = Gm Rout = g m1 (ro 2 || ro 6 )

Itail M3 M4

VSS

Gain is limited by single-transistor output resistance

4

Single-Stage Cascode OTA

[Razavi]
DC Gain Av = Gm Rout g m1 ( g m 4 ro 2 ro 4 || g m 6 ro8 ro 6 )

Gain is larger by a gmro factor Output swing range is limited due to large compliance voltage of cascode current source load

Single-Stage Cascode OTA Unity Gain Feedback Voltage Range

Maximum Vout set by M2 saturation Vout Vx + VTH 2 Minimum Vout set by M4 saturation Vout Vb VTH 4 As Vb = Vx + VGS 4 and plugging Vx into M2 sat condition Output (& Input) Range = VTH 4 (VGS 4 VTH 2 ) Less than a VTH !!!

[Razavi]

Cascode configuration constrains output & unity-gain swing

6

Folded Cascode Circuits

[Razavi]

PMOS Input & NMOS Cascode

NMOS Input & PMOS Cascode

Folding about the cascode node will increase input and output swing range

Folded Cascode OTA

[Razavi]

Folded Cascode OTA Unity Gain Feedback Voltage Range

MP

MNC

Maximum Vout set by MP saturation Vout Vb 2 + | VTHP | Minimum Vout set by output NMOS cascode or tail current source saturation Vout VDSATNC + VDSATN OR Vout VDSATITail + VGS1

With proper (high-value) choice of Vb2, a decent output and input swing range can be achieved
9

TAMU-ELEN-474 2009

Jose Silva-Martinez

Folded-Cascode OTA: gm, rout and poles?

VB1 and VB2 must keep M1 - M5 in saturation region VB2 > Vsat,4 + VGS3 (for M4 sat) VB1 < VDD - Vsat,5 VSG2

(for M5 sat)

Notice that ID5 biases both M2 and M1

Gm = g m1 ;

rout (rds 2 g m 2 (rds1 rds 5 )) (rds 3 g m 3 rds 4 )

- 10 -

TAMU-ELEN-474 2009

Jose Silva-Martinez

Example: Folded-Cascode OPAMP Find the gain and the phase from input to output and from input to node 2.

g m1 g o1 + g o 5

g m1 gm2

The low frequency gain is 77 dB and the unity gain frequency is around 80 MHz. The behavior of the gain from the input to node 2 is interesting: above the dominant pole.
- 11 m2 z 2 g +g r C o 5 out L o1

TAMU-Elen-474

Jose Silva-Martinez-08

TYPICAL FOLDED CASCODE (One of the most popular circuit in ADCs)

There is a limitation due the non- dominant pole IBIAS ADC Wcasc VDSAT
vo g 1 = md C p v in go CL 1 + s 1 s + g mc go

- 12 -

TAMU-Elen-474

Jose Silva-Martinez-08

FOLDED-CASCODE OTA
Frequency response: VDD Righ hand side VB3 VX
MP VB2 2ID1 2ID1

VW

Righ hand side: 2 poles (at VW and Vout) Left hand side: 4 poles !!! (at VX, VY, VZ and
iOUT1

VB2

Vout) vout

VY
VB1

vin+ M1

vin-

VB1

The poles at Vy and Vz are associated to N-type transistors higher frequencies

A V (s ) g m1R out 1 1 sC sC 1+ out 1+ PC g out g mp

VZ
2ID1

MN

MN

-VSS

- 13 -

TAMU-Elen-474

Jose Silva-Martinez-08

VDD
M2

VB3 VX M3
VB2 2ID1 2ID1

Output referred noise VW M1 produces an output current given by

VB2

iOUT1

VY
VB1

vin+ M1

vin-

vout
VB1

i 01 = g m 1 v n 1
Each transistor M2 generates a differential output current

M4 M5 MN
2ID1

VZ MN -VSS

i 02 = g m 2 v n 2
Similarly, for each transistor M5

For cascode transistors i04 Vn4 M4 ro5

i 05 = g m 5 v n 5
i 04 = gm4 v vn4 n4 r05 1+ g m 4 r05

At low and medium frequencies, noise contribution of the cascode transistors can be neglected (M3 and M4)

8 2 Remember ieq = kTg m 3

iout2 = 2(ieq12 + ieq22 + ieqn2 )

- 14 -

TAMU-Elen-474

Jose Silva-Martinez-08

FOLDED-CASCODE OTA

M2

VDD
2ID
1

Noise density and noise level

VX

2ID
1

VB3 VW
iOUT1

The output referred current spectral density is

VB2 VB2

i 0 T 2 = 2 g m1 2 v n 1 2 + g m 2 2 v n 2 2 + g m 5 2 v n 5 2
vout

VY
VB1

vin+ M1 2ID

vin-

VB1

And the input referred noise density becomes

VZ M5 M5 -VSS

v eq ,in = 2
2

g m1 2 v n 1 2 + g m 2 2 v n 2 2 + g m 5 2 v n 5 2 g m1 2

The noise level is

v noise =

v eq ,in
BW

2 2 2 2 g v g v 2 m 5 n 5 m 2 n 2 df = 2 v n 1 + + 2 g m1 g m1 2 BW

df

- 15 -

TAMU-Elen-474

Jose Silva-Martinez-08

VDD
M2

VB3 VX
2ID1 2ID1

Noise level for the folded-cascode OTA

VW
2 2 2 2 g v g v 2 m 5 n 5 m 2 n 2 v noise = 2 v n 1 + + 2 g g m1 2 BW m1

VB2 VB2

iOUT1

VY
VB1

vin+ M1

vin-

vout
VB1

df

Lets consider thermal noise (vn2 =(8/3)KT/(gm)) VZ

2ID1

M5

M5

-VSS

vnoise

g m 2 g m5 16 1 df = + + kT 2 2 3 g m1 BW g m1 g m1

Or for a dominant (single) pole system with NBW = (/2)BW

vnoise

8kT g m 2 g m5 ( ) BW 1 + + g g g m1 m1 m1
Noise of diff pair

Low-noise is associated with large gm1 and relatively small gm2 and gm5

Noise Factor (due to other transistors)

- 16 -

Next Time
Two Stage Miller OTA

17