UNIT-I

1.What is Microprocessor ? It is a program controlled semiconductor device (IC}, which fetches, decodes and executes instructions. 2. What are the basic units of a microprocessor ? The basic units or blocks of a microprocessor are ALU, an array of registers and control unit. 3. What is Software and Hardware? The Software is a set of instructions or commands needed for performing a specific task by a programmable device or a computing machine. The Hardware refers to the components or devices used to form computing machine in which the software can be run and tested. Without software the Hardware is an idle machine. 4. What is assembly language? The language in which the mnemonics (short -hand form of instructions) are used to write a program is called assembly language.The manufacturers of microprocessor give the mnemonics. 5. What are machine language and assembly language programs? The software developed using 1s and 0s are called machine language programs. The software developed using mnemonics are called assembly language programs. 6. What is the drawback in machine language and assembly language programs? The machine language and assembly language programs are machine dependent. The programs developed using these languages for a particular machine cannot be directly run on another machine . 7. Define bit, byte and word. A digit of the binary number or code is called bit. Also, the bit is the fundamental storage unit of computer memory. The 8-bit (8-digit) binary number or code is called byte and 16-bit binary number or code is called word. (Some microprocessor manufactures refer the basic data size operated by the processor as word). 8. What is a bus? Bus is a group of conducting lines that carries data, address and control signals.

9. Why data bus is bi-directional? The microprocessor has to fetch (read) the data from memory or input device for processing and after processing, it has to store (write) the data to memory or output device. Hence the data bus is bidirectional. 10. Why address bus is unidirectional? The address is an identification number used by the microprocessor to identify or access a memory location or I / O device. It is an output signal from the processor. Hence the address bus is unidirectional. 11. What is the function of microprocessor in a system? The microprocessor is the master in the system, which controls all activities of the system. It issues address and control signals and fetches the instruction and data from memory. Then it executes the instruction to take appropriate action. 12. Why interfacing is needed for I/0 devices? Generally I/O devices are slow devices. Therefore the speed of I/O devices does not match with the speed of microprocessor. So an interface is provided between system bus and I/O devices. 13. What is the difference between CPU bus and system bus? The CPU bus has multiplexed lines but the system bus has separate lines for each signal. (The multiplexed CPU lines are demultiplexed by the CPU interface circuit to form system bus). 14.What does memory-mapping mean? The memory mapping is the process of interfacing memories to microprocessor and allocating addresses to each memory locations. 15. What is interrupt I/O? If the 1/0 device initiate the data transfer through interrupt then the 1/0 is called interrupt driven I/O. 16. Why EPROM is mapped at the beginning of memory space in 8085 system? In 8085 microprocessor, after a reset, the program counter will have 0000H address. If the monitor program is stored from this address then after a reset, it will be executed automatically. The monitor program is a permanent program and stored in EPROM memory. If EPROM memory is mapped at the beginning of memory space, i.e., at

0000H, then the monitor program will be executed automatically after a reset. 17. What is the need for system clock and how it is generated in 8085? The system clock is necessary for synchronizing various internal operations or devices in the microprocessor and to synchronize the microprocessor with other peripherals in the system. 18. What is multiplexing and what is its advantage? How the address and data lines are demultiplexed in 8085? Multiplexing is transferring different information at different well defined times through same lines. A group of such lines is called multiplexed bus. The advantage of multiplexing is that fewer pins are required for microprocessors to communicate with outside world. The low order address and data lines of 8085 are demultiplexed using an external 8-bit D-Latch (74LS373) and the ALE signal of 8085, as shown in fig.

At the beginning of every machine cycle, ALE is asserted high and then low. Also the low byte of address is given out through ADo AD7 lines. Since the ALE is connected to Enable of Latch, when ALE is asserted high and then low the addresses are latched into the output lines of the latch. Now the lines ADo -AD7 are free for data transfer. 19. List out the control signals and status signal present in 8085. There are two control signals: RD & WR. There are three status signals: IO/M,S1,S0.

20. Explain the function of IO/M, READY , HOLD and HLDA in 8085. The IO/M is used to differentiate memory access and I/O access. For IN and OUT instruction it is high. For memory reference instructions it is low. READY is an input signal to the processor, used by the memory or I/O devices to get extra time for data transfer or to introduce wait states in the bus cycles. HOLD and HLDA signals are used for the Direct Memory Access (DMA) type of data transfer. The DMA contoller place a high on HOLD pin in order to take control of the system bus. The HOLD request is acknowledged by the 8085 by driving all its tri stated pins to high impedance state and asserting HLDA signal high. 21. What is a flag? List the flags of 8085. Flag is a flip flop used to store the information about the status of the processor and the status of the instruction executed most recently. There are five flags in 8085. They are sign flag, zero flag, Auxiliary carry flag, parity flag and carry flag. 22. Define mnemonics. The short-hand forms of describing the instructions are called mnemonics. The mnemonics are given by the manufacturers of microprocessors and programmable devices. 23. What is processor cycle (Machine cycle) ,Instruction cycle, fetch and execute cycle? The processor cycle or machine cycle is the basic operation performed by the processor. To execute an instruction, the processor will run one or more machine cycles in a particular order.The sequence of operations that a processor has to carry out while executing the instruction is called Instruction cycle. Each instruction cycle of a processor in tum consists of a number of machine cycles. In general, the instruction cycle of an instruction can be divided into fetch and execute cycles. The fetch cycle is executed to fetch the opcode from memory. The execute cycle is executed to decode the instruction and to perform the work instructed by the instruction. 24. List the various machine cycles of 8085. The various machine cycles of8085 are (i) Opcode fetch cycle (v) I/0 write cycle (ii) Memory read cycle (vi) Interrupt acknowledge cycle

(iii) Memory write cycle (iv) I/0 read cycle

(vii) Bus idle cycle.

25. What is the need for timing diagram? The timing diagram provides information regarding the status of various signals, when a machine cycle is executed. The knowledge of timing diagram is essential for system designer to select matched peripheral devices like memories, latches, ports, etc., to form a microprocessor system. 26. What is T -state? The T-state is the time period of the internal clock signal of the processor. The time taken by the processor to execute the machine cycle is expressed in T-state. 27. Define opcode and operand. Opcode (Operation code) is the part of an instruction / directive that identifies a specific operation. Operand is a part of an instruction / directive that represents a value on which the instruction acts. 28. What is addressing? What are the various addressing modes available in 8085? The method of specifying the data to be operated by the instruction is called addressing. The 8085 has the following five different types of addressing. 1. Immediate addressing 2. Direct addressing 3. Register addressing 4. Register indirect addressing 5. Implied addressing 29. What is meant by memory mapping? What is memory access time ? The memory mapping is the process of interfacing memories to microprocessor and allocating addresses to each memory locations. The memory access time is the time taken by the processor to read or write a memory location. During read operation it is the time between a valid address on the bus and end of read control signal. During write operation it is the time between a valid address on the bus and the end of write control signal. 30. Compare the memory mapped I/O and standard I/O mapped I/O.

Memory Mapped I/O I/O 1. 16-bit address is allotted to an I/O an I/O device 2. The devices are accessed by by I/O read or I/O write cycle. write cycle. 3. All instructions related to instructions memory can be used for transfer. data transfer. 4. A large number of I/O ports interfaced. can be interfaced.

Standard I/O mapped 1. 8 -bit address is allotted to device. 2. The devices are accessed memory read or memory 3. Only IN and OUT

can be used for data 4. Only 256 ports can be

31. What is an Interrupt ? Haw the interrupt are classified ? Interrupt is a signal send by an external device to the processor so as to request the processor to perform a particular task or work. They are two methods of classifying interrupts Method I :The interrupts are classified into Hardware and Software interrupts Method II:The interrupts are classified into vectored and NonVectored interrupts. 32. What is Vectored and Non- Vectored interrupt? When an interrupt is accepted, if the processor control branches to a specific address defined by the manufacturer then the interrupt is called vectored interrupt. In Non-vectored interrupt there is no specific address for storing the interrupt service routine. Hence the interrupted device should give the address of the interrupt service routine. 33. List the Software and Hardware interrupts of 8085? Software interrupts : RST 0, RSTl, RST 2, RST 3, RST 4, RST 5, RST 6 and RST 7. Hardware interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR. 34. Write 8085 assembly language instructions to store the contents of the flag register in memory location 2000H.

PUSH PSW POP B MOV A,C STA 2000H. HLT 35. Draw the flow chart of a counter.

36. Mention the addressing modes for the following instructions a)MVI,H data -Immediate addressing mode. b)STAX B-Indirect addressing mode. c)OUT 8 bit port address-Direct addressing mode. d)STC-Implicit addressing mode. 37. Mention the two pins present in 8085 for serial communication. SID(Serial input data),SOD(Serial output data) are the two pins present in 8085 for serial communication. 38. Say True or False a) To enable 8085 serial output data line(SOD),bits D7 & D6of accumulator should be at logic 1-True. b) Data transfer instructions do not set the flags-True. 39. Calculate the execution time for the instruction LXI H,5000H to execute once. Execution time =Number of T states x Clock period. Here, Number of T states=10

Clock frequency=2Mhz. Clock period=1/2Mhz. Execution time=10x(1/2Mhz) =5microseconds. 40. What is the difference between 8085 JMP and CALL instruction? JMP instruction loads the PC with the address given within the instruction and resumes the program execution from this location. EX: JMP 2000H CALL instruction is used to transfer program control is used to transfer program control to a subprogram. EX: 6000H CALL 2000H 6003H ----with 2000H 41. What is the function of RIM instruction? RIM instruction copies the status of the interrupts into the accumulator.It also reads the serial data through the SID pin. 42. What are tri-state devices and why they are essential in a bus oriented system? Buffer,Encoder,Decoder are the tri-state devices. Tri-state logic devices are essential to proper functioning of the bus oriented system,in which the same bus lines are shared by several components. 43. How many memory locations can be addressed by a microprocessor with 14 address lines? A microprocessor with its 14 address lines are capable of addressing 2^14=16,384(16k)memory locations. 44. Mention the addressing modes presenting the following instructions a) MVI A,05H b)CALL 3500H c) RAL d) LDAX D a)Immediate addressing mode b)Direct addressing mode c)Implied addressing mode d)Register indirect addressing mode 45. What is ALE?What is the use of this signal in 8085? ALE refers to Address Latch Enable.Whenever 8085 places address in the lines AD7-AD0,it makes the ALE signal high.This signal is used to demultiplex the lower order address bus from multiplexed data bus. 46. Define stack.Mention the instruction related with stack operation. Stack is a set of memory locations in memory. PUSH,POP are the instruction related with stack operations. 47.Write the set of instructions to generate a delay (use 8 bit register) by specifying the count value. L: MOV A,FFH DCR A

JNZ L 48.Write down the instructions to clear the accumulator. XRA A and Sub A,A 49.Mention the T states required to execute the following instruction a)LDA 5500H b)CALL 5000H a) 13 T states b) 18 T states 50.Write the instrution to set & clear the carry flag. STC: Set The Carry flag CLC: Clear the Carry flag. 51. What is masking and why it is required? Masking is preventing the interrupt from disturbing the current program execution. When the processor is performing an important job (process) and if the process should not be interrupted then all the interrupts should be masked or disabled. In processor with multiple 'interrupts, the lower priority interrupt can be masked so as to prevent it from interrupting, the execution of interrupt service routine of higher priority interrupt. 52. When the 8085 processor accept hardware interrupt? The processor keeps on checking the interrupt pins at the second T-state of last Machine cycle of every instruction. If the processor finds a valid interrupt signal and if the interrupt is unmasked and enabled then the processor accepts the interrupt. The acceptance of the interrupt is acknowledged by sending an OOA signal to the interrupted device. 53. When the 8085 processor will disable the interrupt system? The interrupts of 8085 except TRAP are disabled after anyone of the following operations 1. Executing El instruction. 2. System or processor reset. 3. After reorganization (acceptance) of an interrupt. 54. How clock signals are generated in 8085 and what is the frequency of the internal clock? The 8085 has the clock generation circuit on the chip but an external quartz crystal or L C circuit or RC circuit should be connected at the pins XI and X2. The maximum internal clock frequency of 8085A is 3.03 MHz.

1.Whatare the flagsin 8086? - In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag, Direction flag, and Sign flag. 2.Whatare the variousinterruptsin 8086? - Maskable interrupts, Non-Maskable interrupts. 3.Whatis meantby Maskableinterrupts? - An interrupt that can be turned off by the programmer is known as Maskable interrupt. 4.Whatis NonMaskableinterrupts? An interrupt which can be never be turned off (ie.disabled) is known as NonMaskable interrupt. 5.Whichinterruptsare generallyusedfor critical events? - Non-Maskable interrupts are used in critical events. Such as Power failure, Emergency, Shut off etc., 6.Giveexamplesfor Maskableinterrupts? - RST 7.5, RST6.5, RST5.5 are Maskable interrupts 7.Giveexamplefor NonMaskableinterrupts? - Trap is known as Non-Maskable interrupts, which is used in emergency condition. 8.Whatis the Maximumclockfrequencyin 8086? - 5 Mhz is the Maximum clock frequency in 8086. 9.Whatare the varioussegmentregistersin 8086? - Code, Data, Stack, Extra Segment registers in 8086. 10.WhichStackis usedin 8086?

- FIFO (First In First Out) stack is used in 8086.In this type of Stack the first stored information is retrieved first. 11.Whatare the addresslinesfor the softwareinterrupts?-

12.Whatis SIMand RIMinstructions? - SIM is Set Interrupt Mask. Used to mask the hardware interrupts. RIM is Read Interrupt Mask. Used to check whether the interrupt is Masked or not. 13.Whichis the tool usedto connectthe user and the computer? - Interpreter is the tool used to connect the user and the tool. 14.Whatis the positionof the StackPointerafter the PUSHinstruction? - The address line is 02 less than the earlier value. 15.Whatis the positionof the StackPointerafter the POPinstruction?

- The address line is 02 greater than the earlier value. 16.Logiccalculationsare donein whichtypeof registers? - Accumulator is the register in which Arithmetic and Logic calculations are done. 17.Whatare the differentfunctionalunitsin 8086? - Bus Interface Unit and Execution unit, are the two different functional units in 8086. 18.Giveexamplesfor Microcontroller? - Z80, Intel MSC51 &96, Motorola are the best examples of Microcontroller. 19.Whatis meantby crosscompiler? - A program runs on one machine and executes on another is called as crosscompiler. 20.Whatare the addresslinesfor the hardwareinterrupts?-

21.WhichSegmentis usedto storeinterruptand subroutinereturnaddressregisters? - Stack Segment in segment register is used to store interrupt and subroutine return address registers.

22.WhichFlagscan be set or reset by the programmerand alsousedto controlthe operationof the processor? - Trace Flag, Interrupt Flag, Direction Flag. 23.WhatdoesEU do? - Execution Unit receives program instruction codes and data from BIU, executes these instructions and store the result in general registers. 24.Whichmicroprocessoracceptsthe programwrittenfor 8086withoutany changes? - 8088 is that processor. 25.Whatis the differencebetween8086and 8088? - The BIU in 8088 is 8-bit data bus & 16- bit in 8086.Instruction queue is 4 byte long in 8088and 6 byte in 8086.

UNIT-II
1. What is the need for interrupt controller? The interrupt controller is employed to expand the interrupt inputs. It can handle the interrupt request from various devices and allow one by one to the processor. 2. List some of the features of INTEL 8259 (Programmable Interrupt Controller). i) It manage eight interrupt request. ii) The interrupt vector addresses are programmable. iii) The priorities of interrupts are programmable. iv) The interrupt can be masked or unmasked individually. 3. Write the various functional blocks of INTEL 8259. The various functional blocks of 8259 are, Control logic, Read/ Write logic, Data bus buffer, IRR, ISR, IMR, Priority resolver and cascade buffer. IRR - Interrupt Request Register ISR - In-Service Register IMR Interrupt Mask Register. 4. What is Master and Slave 8259? When 8259s are connected in cascade, one 8259 will be directly interrupting 8085 and it is called master 8259. To each interrupt request input of master 8259, one slave 8259 can be connected. The 8259s that interrupt the master 8259 are called slave 8259. 5. How 8259 is programmed? The 8259 is programmed by sending i) Initialization Command Words (ICWs) and ii)Operational Command Words (OCWs). 6. What is a programmable peripheral device ? If the functions performed by a peripheral device can be altered or changed by a program instruction then the peripheral device is

called programmable device. Usually the programmable devices will have control registers. The device can be programmed by sending control word in the prescribed format to the control register. 7. What is handshake port? Explain the working of a handshake input port and output port. In handshake port, signals are exchanged between I/O device and port or port and processor for checking or informing various condition of the device. In handshake input operation, the input device will check whether the port is empty or not. If the port is empty then it will load data to port. When the port receives the data, it will inform the processor for read operation. Once the data is read by the processor, the port will signal the input device that it is empty. Now the input device can load another data to port and the above process is repeated. In handshake output operation, the processor will load a data to port. When the port receives the data, it will inform the output device to collect the data. Once the output device accepts the data, the port will inform the processor that it is empty. Now the processor can load another data to port and the above process is repeated. 8. What are the internal devices of 8255? The internal devices of 8255 are port-A, port-B and port-C. The ports can be programmed for either input or output function in different operating modes. 9. What are the operating modes of port -A 8255? The port-A of 8255 can be programmed to work in anyone of the following operating modes as input or output port. Mode-0 : Simple 1/0 port. Mode-l: Handshake 1/0 port Mode-2 : Bidirectional 1/0 port 10. What are the functions performed by port-C of8255? 1. The port-C pins are used for handshake signals. 2. Port-C can be used as an 8-bit parallel 1/0 port in mode-0. 3. It can be used as two numbers of 4-bit parallel port in mode-0. 4. The individual pins of port-C can be set or reset for various control applications. 11.Write the general format of the control word in I/O mode of 8255. D0Port C lower PC3-PC0, 1=Input, 0=Output D1Port B, 1=Input, 0=Output.

D2Mode selection, 0=Mode0, 1=Mode1. D3Port C upper PC7-PC4, 1=Input, 0=Output. D4Port A,1=Input,0=Output. D5,D6Mode selection, 00=Mode0, 01=Mode1, 1X=Mode2. D71=I/O Mode, 0=BSR Mode 12.Define framing in 8251. Transmission begins with one start bit(low) followed by a character and one or two stop bits(high).This is known as framing. 13. What are the different scan modes of 8279? The different scan modes of8279 are decoded scan and encoded scan. In decoded scan mode, the output of scan lines will be similar to a 2-to-4 decoder. In encoded scan mode, the output of scan lines will be binary count, and so an external decoder should be used to convert the binary count to decoded output. 14. What is baud rate ? The baud rate is the.rate at which the serial data are transmitted. Baud rate is defined as l/(The time for a bit cell). In some systems one bit cell has one data bit, then the baud rate and bits/sec are same. 15. What is USART ? What are the functions performed by INTEL 8251A? The device which can be programmed to perform Synchronous or Asynchronous serial communication is called USART (Universal Synchronous Asynchronous Receiver Transmitter). The INTEL 8251A is an example of USART. The INTEL 825lA is used for converting parallel data to serial or vice versa. The data transmission or reception can be either asynchronously or synchronously. The 8251A can be used to interface MODEM and establish serial communication through MODEM over telephone lines. 16. What are the control words of 8251A and what are its functions? he control words of 8251A are Mode word and Command word. The mode word informs 8251 about the baud rate, character length, parity and stop bits. The command word can be sent to enable the data transmission and reception. 17. What is debouncing? When a key is, pressed it bounces for a short time. If a key code is generated immediately after sensing a key actuation, then the processor will generate the same keycode a number of times.(A key

typically bounces for 10 to 20 msec). Hence the processor has to wait for the key bounces to settle before reading the keycode. This process is called keyboard debouncing. 18. What is the difference in programming the 8279 for encoded scan and decoded scan? If the 8279 is programmed for decoded scan then the output of scan lines will be decoded output and if it is programmed for, encoded scan then the output of scan lines will be binary count. In encoded mode, an external decoder should be used to decode the scan lines. 19. Differentiate between asynchronous and synchronous mode of transmission. Asynchronous: In this format,the transmitter is not synchronized with the receiver by the same master clock.A transmitted character includes information about the starting and ending of the character. Synchronous: In this format,the transmitter is synchronized with the receiver on the same frequency. 20.List out the necessary conditions to generate INTR when port A of 8255 is set up as an output port in model. INTR is an active high output of the 8255 which is made high a)When ACK is made high by peripheral. b)When OBF is high. It can be enabled or disabled by writing 1 or 0 respectively to PC6 in BSR mode

21. Name the 2 modes of entry in which the keyboard display controller work? Explain the modes; 1)2 Key Lockout and 2)N Key Rollover 1) If 2 keys are pressed simultaneously only the first key is recognized. 2) Simultaneous keys are recognized and their codes are stored in internal buffer. 22. What are 3 operating modes in 8279? a. Scanned keyboard b. Scanned sensor matrix c. strobed input 23.Write down the Keyboard display command word for the following specification a. 16,8 bit character display right entry b. Encoded scan keyboard- N Key rollover 8-Bit left entry- 10; 16 Bit left entry- 11 Encoded scan keyboard- n key rollover- 101.

24) What is the use of RS232C? what are the interrupt signals associated with it? RS232C is used for serial communication. It falls under single coded category. TXD- Transmit data. RXD- Receive data. RTS- Request to send. CTS- Clear to send DSR- Data set ready DCD- Data carrier detect 25. Define resolution & Conversion time. Conversion time: It is defined as the totaltime required to convert a given analog input to the equivalent digital output. Resolution: It is the minimum change in input to which output of the device responds. 26. What are the different types of ADC? The different types of ADC are successive approximation ADC, counter type ADC flash type ADC, integrator converters and voltage-tofrequency converters. 27. What is DMA Controller? Direct Memory Access is an I/O technique used for high speed data transfer. In DMA, the MPU releases the control of the buses to a device called a DMA controller. The controller manages data transfer between memory and a peripheral under its control, thus by passing the MPU. 28. Explain the function of the signal ADSTB in DMA controller? The 8257 has eight address lines, but requires 16 address lines to address a memory location. The additional eight lines are generated by using the signal ADSTB to strobe a high-order memory address into the 8212 from the data bus. 29. Explain the function of inservice register, masking register an interrupt request register of 8259? Inservice Register: ISR stores all the levels that are currently being serviced. Masking Register: IMR stores the masking bits of the interrupt lines tobemasked. Interrupt Request Register: IRR stores the interrupt request, when interrupt request lines goes high. 30. What is a Simulator? Simulator is a debugging tool used for microcomputer based system. The simulator program shows all internal registers, entire

memory and peripheral on the monitor. The simulator is supported with single step and breakpoint facilities which help user to debug their programs. 31. How DMA is initiated? When the I/O device needs a DMA transfer, it will send a DMA request signal to DMA controller. The DMA controller in turn sends a HOLD request to the processor. When the processor receives a HOLD request, it will drive its tri-stated pins to high impedance state at the end of current instruction execution and send an acknowledge signal to DMA controller. Now the DMA controller will perform DMA transfer. 32. What is scanning in keyboard and what is scan time? The process of sending a zero to each row of a keyboard matrix and reading the columns for key actuation is called scanning. The scan time is the time taken by the processor to scan all the rows one by one starting from first row and coming back to the first row again. 33. What is synchronous data transfer scheme? For synchronous data transfer scheme, the processor does not check the readiness of the device after a command is been issued for read/write operation. In this scheme the processor will request the device to get ready and then read/W1.ite to the device immediately after the request. In some synchronous schemes a small delay is allowed after the request. 34. What is asynchronous data transfer scheme? In asynchronous data transfer scheme, first the processor sends a request to the device for read/write operation. Then the processor keeps on polling the status of the device. Once the device is ready, the processor executes a data transfer instruction to complete the process. 35. What is the need for Port? The I/O devices are generally slow devices and their timing characteristics do not match with processor timings. Hence the I/O devices are connected to system bus through the ports 36. List some of the features of INTEL 8259 (Programmable Interrupt Controller). 1. It manage eight interrupt request 2. The interrupt vector addresses are programmable. 3. The priorities of interrupts are programmable. The interrupts can be masked or unmasked individually

37. What are the functions performed by INTEL 8251A? The INTEL 825lA is used for converting parallel data to serial or vice versa. The data transmission or reception can be either asynchronously or synchronously. The 8251A can be used to interface MODEM and establish serial communication through MODEM over telephone lines. 38. What are the information that can be obtained from the status word of 8251 ? The status word can be read by the CPU to check the readiness of the transmitter or receiver and to check the character synchronization in synchronous reception. It also provides information regarding various errors in the data received. The various error conditions that can be checked from the status word are parity error, overrun error and framing error. 39. What are the tasks involved in keyboard interface? The task involved in keyboard interfacing are sensing a key actuation, Debouncing the key and Generating key codes (Decoding the key). These task are performed software if the keyboard is interfaced through ports and they are performed by hardware if the keyboard is interfaced through 8279. 40. How a keyboard matrix is formed in keyboard interface using 8279? The return lines, RLo to RL7 of 8279 are used to form the columns of keyboard matrix. In decoded scan the scan lines SLo to SL3 of 8279 are used to form the rows of keyboard matrix. In encoded scan mode, the output lines of external decoder are used as rows of keyboard matrix. 41.What is scanning in display and what is the scan time? In display devices, the process of sending display codes to 7segment LEDs to display the LEDs one by one is called scanning ( or multiplexed display). The scan time is the time taken to display all the 7-segment LEDs one by one, starting from first LED and coming back to the first LED again. 42. What is settling or conversion time in DAC? The time taken by the DAC to convert a given digital data to corresponding analog signal is called conversion time. 43. What are the different types of ADC?

The different types of ADC are successive approximation ADC, counter type ADC flash type ADC, integrator converters and voltage tofrequency converters. 44. How the microprocessor is synchronized with peripherals? The timing and control unit synchronizes all the microprocessor operations with clock and generates control signals necessary for communication between the microprocessor and peripherals.

UNIT-III
1. What are the modes in which 8086 can operate? The 8086 can operate in two modes and they are minimum (uniprocessor) mode and maximum (multiprocessor) mode. 2 .What are the interrupts of 8086? The interrupts of 8085 are INTR and NMI. The INTR is general maskable interruput and NMI is non-maskable interrupt. . 3. How clock signal is generated in 8086? What is the maximum internal clock frequency of 8086? The 8086 does not have on-chip clock generation circuit. Hence the clock generator chip, 8284 is connected to the CLK pin of8086. The clock signal supplied by 8284 is divided by three for internal use. The maximum internal clock frequency of8086 is 5MHz. 4. What is pipelined architecture? In pipelined architecture the processor will have number of functional units and the execution time of functional units are overlapped. Each functional unit works independently most of the time. 5. What are the functional units available in 8086 architecture? The bus interface unit and execution unit are the two functional units available in 8086 architecture. 6. List the segment registers of 8086. The segment registers of 8086 are Code segment, Data segment, Stack segment and Extra segment registers. 7. What is the difference between segment register and general purpose register? The segment registers are used to store 16 bit segment base address of the four memory segments. The general purpose registers are used as the source or destination register during data transfer and computation, as pointers to memory and as counters. 8. What is queue? How queue is implemented in 8086?

A data structure which can be accessed on the basis of first in fIrst out is called queue. The 8086 has six numbers of 8-bit FIFO registers, which is used for instruction queue. 9. Write the special functions carried by the general purpose registers of 8086. The special functions carried by the registers of 8086 are the following. Register Special function AX 16-bit Accumulator AL 8-bit Accumulator BX Base Register CX Count Register DX Data Register 10. Write the flags of 8086. The 8086 has nine flags and they are 1. Carry Flag (CF) 6. Overflow Flag (OF) 2. Parity Flag (PF) 7. Trace Flag (TF) 3. Auxiliary carry Flag (AF) 8. Interrupt Flag (IF) 4. Zero Flag (ZF) 9. Direction Flag (DF) 5. Sign Flag (SF) 11. What are control bits? The flags TF, IF and DF of8086 are used to control the processor operation and so they are called control bits. 12. Describe the difference between the instructions MOV AX,2437H and MOV AX,[2437H]. Difference between the instructions MOV AX,2437H and MOV AX, [2437H] are former instruction takes 2437 as 16-bit data and latter instruction takes 2437 as 16-bit address. 13. State the function of Direction flag in 8086. Direction flag is used with string instructions. If DF= 0, the string is processed from its beginning with the first element having the lowest address. Otherwise, the string is processed from the high address towards the low address. 14. What happens in 8086 processor, when a. overflow of sum occurs during addition of signed numbers. b. overflow of quotient occurs during division operation.

a. When overflow of sum occurs during addition of signed numbers, overflow flag is set to one (OVF =1). b. When overflow of quotient occurs during division operation, type 0 (divide by zero ) interrupt is generated. 15. Discuss the functions of the following prefixes: LOCK, ESCAPE LOCK : In a multiprocessor system each microprocessor has its own local buses and memory. The individual microprocessors are connected together by a system bus so that each can access system resources such as disk drives or memory. Each microprocessor only takes control of the system bus when it needs to access some system resources. The LOCK prefix allows a microprocessor to make sure that another processor does not take control of the system bus while it is in the middle of a critical instruction which uses the system bus. ESCAPE: This instruction is used to pass instructions to a coprocessor such as the 8087 math coprocessor which shares the address and data bus with an 8086. 16. What are the flag manipulation instructions of 8086. LAHF : Load AH from low byte of flag register. SAHF : Store AH to low byte of flag register PUSHF : Push content of flag to the stack. POPF : Pop content of stack and load it in the flag register. 17. What are the three groups of signals in 8086 ? The 8086 signals are categorized in three groups. They are : i. The signals having common function in minimum and maximum mode. ii. The signals having special functions for minimum mode, iii. The signals having special functions for maximum mode. 18. What are the uses of AD0 AD15 lines ? These are the time multiplexed memory 15 address and data lines. Address remains on the line during T I state ,while data is available on the data bus during T2, T3, TW and T4. Here Ti T2, T3, T4 and Tw are the clock states of a machine , cycle. Tw is a wait state. These lines are active high and float to a tristate during interrupt acknowledge and local bus hold acknowledge cycles. 19. What is the operation of RD signal ?

Read signal RD when low, indicates the peripherals that the processor is performing a memory (or) I/O read operation. 20. What is the function of READY signal? This is the acknowledgment from the slow devices (or) memory that they have completed the data transfer. The signal made available by the devices is synchronized by the 8284A clock generator to provide ready input to the 8086. The signal is active high. 21.What is the function of INTR signal ? INTR- Interrupt Request: This is a level triggered input. This is sampled during the last clock cycle of each instruction to determine the availability of the request, If any interrupt request is pending, the processor enters the interrupt acknowledge cycle. This can be internally masked by resetting he interrupt enable flag. This signal is active high and 1ternally synchronized. 22. What is the operation performed when TEST .input in low ? If the TEST input goes low, execution will continue, else, the processor remains in an idle state. The input is synchronized internally during each clock cycle on leading edge of clock.

23. What is the purpose of ALE signal in minimum mode? ALE -Address Latch Enable: This output signal indicates the availability of the valid address on the address / data lines, and is connected to latch enable input of latches. This signal is active high and is never tristated. 24. What is the function of RESET pin ? RESET input causes the processor to terminate the current activity and start execution from FFFFOH. This signal is active high and must be active for at least four clock cycles. It restarts execution when the RESET return low. RESET is also internally synchronized. 25. What is the function of DEN signal in minimum mode ? This signal indicates the availability of valid data over the address / data lines. It is used to enable the Transceivers to separate the data from the multiplexed address / data signal.It is active from the middle of T2 until the middle of T4 DEN is tristated during hold acknowledge cycle. 26. What are the differences between maximum mode and minimum mode?

S.No 1

Minimum mode A processor is in minimum mode when MN /MX pin is strapped to +5v All control signals are given out by microprocessor chip it self There is a single micro processor

Maximum mode A processor is in maximum mode when MN /MX is grounded The processor derive the status signals S2, Sl and So. Another chip called bus controller derives control signals using this status information There may be more than one microprocessor

27. What is the fabrication technology used for 8086? The 8086 is fabricated using the HMOS (High density n-type metal oxide silicon field effect transistors) technology and contains approximately 29,000 transistors. The 8086 packed in a 40 pin DIP and requires a single 5V supply. 28.What are type 3 and type 4 interrupts in 8086? Breakpoint interrupts are type 3 interrupts.It is used to implement breakpoint function in the system. Overflow interrupts are type 4 interrupts.It is used to overflow condition after any signed arithmetic operation in the system. 29.Write down the addressing modes(8086 processor) present in the following instructions i) SUB [2048],DH ii) IN AL,DX i)Direct addressing mode ii)Indirect addressing mode 30.Mention any two intrrupt instructions in 8086. INT N: Interrupt Type N. INTO : Interrupt on Overflow 31.In the following instructions,identify and explain the assembler directives i)BYTE PTR [BX] ii) OFFSET RESULT i) BYTE PTR ii) OFFSET

32.What response an 8086 will make when its RESET input pin is asserted high? RESET input causes the processor to terminate the current activity and start execution from FFFF0H.The signalis active hidh and must be active for atleast four clock cycles. 33.How pipelined architecture is implemented in 8086? In Pipeline architecture the operation of various functional units are overlapped (i.e) the operation of bus interface unit and execution unit are overlapped. In 8086 the pipeline is achieved by the execution of current instruction and fetching opcode to the next instruction by overlapping the operation of instruction queue CPU register. 34. Explain physical address formation in 8086 whose segment address is 1055H and offset address is 2050H. Segment Address: 1055 Offset Address: 2050 Segment address is shifted bitwise towards left for 4 times. 1 0 5 5 0 2 0 5 0 -------------------------------------1 2 5 A 0 -------------------------------------35. What are the difference between near and far jump? Near jump: when the jump is in the same segment, then it is called near jump. It is also called intersegment jump. Far jump: When the jump is made to next segment, then it is called far jump. 36. Calculate the interrupt vector address of the following; TYPE 4=>4*4=16 -INTO=>0010-0012 TYPE 2=>2*4=8 -NMI> 0008-000A 37. Difference between Hardware and Software interrupt; Hardware interrupt: It is initiated by External device. Software interrupt: It is initiated internally.

UNIT-IV
1. What is mean by microcontroller? A device which contains the microprocessor with integrated peripherals like memory, serial ports, parallel ports, timer/counter, interrupt controller, data acquisition interfaces like ADC,DAC is called microcontroller. 2. Explain DJNZ instructions of intel 8051 microcontroller. a. DJNZ Rn, rel Decrement the content of the register Rn and jump if not zero. b. DJNZ direct , rel Decrement the content of direct 8-bit address and jump if not zero.

3. Explain the contents of the accumulator after the execution ot the following program segments: MOV A,#3CH MOV R4,#66H ANL A,R4

4. Write a program using 8051 assembly language to change the date 55H stored in the lower byte of the data pointer register to AAH using rotate instruction. MOV DPL,#55H MOV A, DPL RL A Label :SJMP Label

5. State the function of RS1 and RS0 bits in the flag register of intel 8051 microcontroller? RS1 , RS0 Register bank select bits

6. Give the alternate functions for the port pins of port3.

RD Read data control output. WR Write data control output. T1 Timer / Counter1 external input or test pin. T0 Timer / Counter0 external input or test pin. INT1- Interrupt 1 input pin. INT 0 Interrupt 0 input pin. TXD Transmit data pin for serial port in UART mode. RXD - Receive data pin for serial port in UART mode. 7. Specify the single instruction, which clears the most significant bit of B register of 8051, without affecting the remaining bits. Single instruction, which clears the most significant bit of B register of 8051, without affecting the remaining bits is CLR B.7. 8. Explain the function of the pins PSEN and EA of 8051. PSEN stands for program store enable. In 8051 based system in which an external ROM holds the program code, this pin is connected to the OE pin of the ROM.

EA stands for external access. When the EA pin is connected to Vcc, program fetched to addresses 0000H through 0FFFH are directed to the internal ROM and program fetches to addresses 1000H through FFFFH are directed to external ROM/EPROM. When the EA pin is grounded, all addresses fetched by program are directed to the external ROM/EPROM. 9. Explain the 16-bit registers DPTR and SP of 8051. DPTR: DPTR stands for data pointer. DPTR consists of a high byte (DPH) and a low byte (DPL). Its function is to hold a 16-bit address. It may be manipulated as a 16-bit data register or as two independent 8-bit registers. It serves as a base register in indirect jumps, lookup table instructions and external data transfer. SP: SP stands for stack pointer. SP is a 8- bit wide register. It is incremented before data is stored during PUSH and CALL instructions. The stack array can reside anywhere in on-chip RAM. The stack pointer is initialized to 07H after a reset. This causes the stack to begin at location 08H. 10. Name the special functions registers available in 8051. a. Accumulator g. Port 1 b. B Register h. Port 2 c. Program Status Word. i. Port 3 d. Stack Pointer. j. Interrupt priority control register. e. Data Pointer. k. Interrupt enable control register f. Port 0 11. Write down the different operating modes for serial communication of 8051. Serial communication of 8051 operate under four modes. They are mode 0 , mode 1, mode 2 and mode3 .SM0 and SM1 bits of SCON register specifies the mode.

12. Explain the register IE format of 8051.

EA- Enable all control bit. ET2- Timer 2 interrupt enable bit. ES Enable serial port control bit. ET1 Enable Timer1 control bit. EX1- Enable external interrupt1 control bit. ET0 Enable Timer0 control bit. EX0- Enable external interrupt0 control bit. 13. Compare Microprocessor and Microcontroller. S.No Microprocessor Microcontroller 1 Microprocessor contains Microcontroller contains the ALU,general purpose circuitry of microprocessor registers,stack pointer, and in program counter, clock addition it has built- in ROM, timing circuit and interrupt circuit. RAM, I/O devices, timers and counters. 2 It has many instructions to move data between memory and CPU. It has one or two bit handling instructions. It has one or two instructions to move data between memory and CPU. It has many bit handling instructions.

Access times for memory and I/O devices are more. Microprocessor based system requires more hardware.

Less access times for built-in memory and I/O devices. Microcontroller based system requires less hardware reducing PCB size and increasing the reliability.

14. Name the five interrupt sources of 8051?. The interrupts are: Vector address External interrupt 0 : IE0 : 0003H Timer interrupt 0 : TF0 : 000BH External interrupt 1 : IE1 : 0013H Timer Interrupt 1 : TF1 : 001BH Serial Interrupt Receive interrupt : RI : 0023H Transmit interrupt: TI : 0023H 15. Write a program to load accumulator A, DPH and DPL with 30H. MOV A,#30 MOV DPH,A MOV DPL,A 16. Write a program to subtract the contents of R1 of Bank0 from the contents of R0 of Bank2. MOV PSW,#10 MOV A,R0 MOV PSW,#00 SUBB A,R1 17.How the RS -232C serial bus is interfaced to TTL logic device ? The RS-232C signal voltage levels are not compatible with TTL logic levels. Hence for interfacing TTL devices to RS-232C serial bus, level converters are used. The popularly used level converters are MC 1488 & MC 1489 or MAX 232.

18. List some of the features of 8096 microcontroller. a. The 8096 is a 16-bit microcontroller. b. The 8096 is designed to use in applications which require high speed calculations and fast I/O operations. c. The high speed I/O section of an 8096 includes a 16 bit timer, a 16 bit counter, a 4 input programmable edge detector, 4 software timers and a 6-output programmable event generator. d. It has 100 instructions, which can operate on bit, byte, word ,double words. e. The bit operations are possible and these can be performed on any bit in the register file or in the special function register. 19. What is HS0 of 8096? HS0: The High Speed Output unit (HS0) is used to trigger events at specific times with minimal CUP overhead. These events include: starting an A to D conversion, resetting Timer2, setting 4 software flags, and switching up to 6 output lines. 20. List the features of 8051 microcontroller? The features are *single_supply +5 volt operation using HMOS technology. *4096 bytes program memory on chip(not on 8031) *128 data memory on chip. *Four register banks. *Two multiple mode,16-bit timer/counter. *Extensive boolean processing capabilities. *64 KB external RAM size *32 bidirectional individually addressible I/O lines. *8 bit CPU optimized for control applications. 21.Explain the operating mode0 of 8051 serial ports? In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bits are transmitted/received:8 data bits(LSB first).The baud rate is fixed at 1/12 the oscillator frequency. 22. Explain the operating mode2 of 8051 serial ports? In this mode 11 bits are transmitted (through TXD)or received (through RXD): a start bit(0), 8 data bits(LSB first),a programmable 9th data bit & a stop bit(1).On transmit the 9th data bit (TB* in SCON)can be assigned the value of 0 or 1.Or for eg:, the parity bit(P, in the

PSW)could be moved into TB8.On receive the 9th data bit go in to the RB8 in Special Function Register SCON, while the stop bit is ignored. The baud rate is programmable to either 1/32or1/64 the oscillator frequency. 23. List out the special function registers available in 8051? PCON - Power control SBUF - Serial port data buffer SCON - Serial port control TCON - Timer/Counter control TMOD- Timer/Counter mode control TL0, TL1- Timer0 &Timer1 low byte TH0,TH1- Timer0 &Timer1 high byte IE- Interrupt enable IP -Interrupt priority 24. What are the 16bit data addressing registers? i. Program counter (PC)-It is used to hold the address of a byte in memory. It is automatically incremented after every instruction byte is fetched. ii. DPTR(Data pointer)-It is made up of two 8bit registers namely DPH and DPL, which are used to give memory addresses for internal &external code access and external data access. 25. Mention the flags that are stored in PSW. CY AC F0 RS1 RS0 OV P

CY - Carry flag

RS1 0 0 1 1

RS0 0 1 0 1

Bank 0 Bank 1 Bank 2 Bank 3

AC - Auxillary carry flag F0 - User flag 0 RS1&RS0 Register bank selection bits OV - Overflow flag P - Parity flag (shows parity of register A) I= odd parity 26. Which registers are used in division operation? Register A& Register B (Instruction): DIV AB 27. Write about the stack pointer in 8051?

The 8bit stack pointer register is used by 8051 to hold internal RAM address i.e. top of the stack. The stack pointer is said to 07H when the 8051 is reset. 28. What are the serial data interrupt bits and which register holds them? TI Transmit Interrupt Flag & RI Receive Interrupt Flag. These two flag bits are present in SCON Serial port control register. 29. What are the signals used to read external ROM? PSEN Program store enable & EA External access 30. Explain the various modes of operation of Timer? Timer mode0 set THX 8bit counter, TLX 5bit counter Timer mode1 set THX &TLX as 8bit counter Timer mode2 set TLX counter as an 8bit counter THX used to hold a value that is loaded TLX every time when TLX overflows Timer mode3 Two 8bit timer using timer0. Mode0 13bit timer/counter Mode1 16bit timer/counter Mode2 autoreload of TL from TH Mode3 Two 8bit Timer using Timer0 31.What are the various serial data transmission modes of 8051? Mode0 Shift register mode Mode1 Standard UART Mode2 Multi processor mode Mode3 Identical to mode2 except that the baud rate is determined as in Mode1, using Timer1. 32.What are the interrupts present in 8051? There are 5 interrupts, ii) Timer flag0 iii) Timer flag1 iv) Serial port interrupts (TI&RI) - These are generated by internal operation. v) INT0& vi) INT1 are generated externally.

UNIT-V

1.Write A program to perform multiplication of 2 nos using 8051. MOV A,#data 1 MOV B,#data 2 MUL AB MOV DPTR,#5000 MOV @DPTR,A(lower value) INC DPTR MOV A,B

MOVX @ DPTR,A 2. Write a program to mask the 0th &7th bit using 8051. MOV A,#data ANL A,#81 MOV DPTR,#4500 MOVX @DPTR,A LOOP SJMP LOOP 3.Write about CALL statement in 8051. There are two subroutine CALL instructions. They are *LCALL(Long CALL) *ACALL(Absolute CALL) Each increments the PC to the 1st byte of the instruction & pushes them in to the stack. 4. Write about the jump statement. There are three forms of jump. They are LJMP(Long jump)-address 16 AJMP(Absolute Jump)-address 11 SJMP(Short Jump)-relative address 5. Write program to load accumulator ,DPH,&DPL using 8051. MOV A,#30 MOV DPH,A MOV DPL,A 6.Write a program to find the 2s complement using 8051. MOV A,R0 CPL A INC A 7.Write a program to add 2 8-bit numbers using 8051. MOV A,#30H ADD A,#50H 8.Write a program to swap two numbers using 8051. MOV A, #data SWAP A 9.Write a program to subtract 2 8-bit numbers &exchange the digits using 8051. MOV A,#9F MOV R0,#40 SUBB A,R0 SWAP A

10.Write a program to subtract the contents of R1 of Bank 0from the contents of R0 of Bank 2 using 8051. MOV PSW,#10 MOV A,R0 MOV PSW,#00 SUBB A,R1 11. What is an Interrupt? Interrupt is a signal send by an external device to the processor so as to request the processor to perform a particular task or work. 12. What is program counter? How is it useful in program execution? The program counter keeps track of program execution. To execute a program the starting address of the program is loaded in program counter. The PC sends out an address to fetch a byte of instruction from memory and increments its content automatically. 13. Define stack. Stack is a sequence of RAM memory locations defined by the programmer.