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International Journal of Systems , Algorithms & Applications

FPGA Implementation of a Finite State Machine based Vending Machine

Monisha A, 2Sk. Sadulla, 3V.V.S. Vijay Krishna, 4Prathiba J 1,2,3,4 School of Electronics, Vignan University, Vadlamudi, India e-mail: monishalla@gmail.com1, sadulla09@gmail.com2, v.vijayakrishna@gmail.com3, jp_ece@vignanuniversity.org4

Abstract - The Vending Machines are being used in large numbers in various parts of the world. This paper describes the design and implementation of Finite state machine (FSM) based vending machine as this technique has more advantages over previous ones used in vending machine designs. The whole design is functionally verified using Xilinx ISE simulator 13.1 and the generated bit stream file has implemented in Virtex 5 XC5VLX50T FPGA board. Keywords: Vending Machine; FSM; VHDL implementation; Xilinx ISE simulator; FPGA; VIRTEX 5.

(plural: automata), or simply a state machine, used to design both computer programs and sequential logic circuits is a mathematical model.

I. INTRODUCTION Vending machine is a machine, which dispenses items such are food items, medicines, tickets to customers automatically on insertion of currency or credit cards into the machine. Today gold, diamonds and gems are also sold using a vending machine. Hero of Alexandria, a first-century engineer and mathematician was the first one to refer to a vending machine. Vending machines have gone through significant changes and innovations. Some present day vending machines are designed to accept credit cards and the companies can know the status of machine from remote. Most of the vending machines are based on CMOS, SED and Microcontroller technology [1], [2]. In this paper VHDL implementation of the FPGA based vending machine is proposed on Mealy Model of Finite State Machine [3]. FPGA based machines are less time consuming, flexible, programmable and reduces hardware as it is reprogrammable. Use of such machines saves time and cost. The proposed vending machine has implemented with beverages has the advantage of automatic billing and cancel features. The conceptual model for the proposed vending machine has implemented using Virtex 5 XC5VLX50T FPGA board [4]. In Section 2, Finite state machine and existed types of Mealy and Moore has highlighted which is the key idea behind the Vending machine implementation. The general operation of the vending machines with necessary steps has elaborated in section 3. The taken logic and its practical realization explanation have covered in detail in Section 4. The required explanation of flowchart and its algorithmic procedure of design methodology has mentioned in Section 5. All the evaluated results of the proposed design with the required information of screenshots and its hardware schematics have placed in section 6. And finally the Conclusion and future scope is covered in final section. II. FINITE STATE MACHINE (FSM) A finite state machine (FSM) or finite-state automation
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Figure 1. Mealy machine model.

A state register is used to hold the state of the machine and a next state logic to decode the next state. An output register holds the output of the machine. Hardware in FSM based machine is reduced as the whole algorithm is explained in single process.

Figure 2. Moore machine model.

In the theory of computation, a Mealy machine is a finite state machine that generates an output based on its current state and input. For each transition both input and output signals will be present in state diagram. In this paper Mealy machine based model is proposed for realization and implementing in Virtex 5 XC5VLX50T FPGA board. III. OPERATION The general operation of any vending has resembles the following steps with existed changes based on the end user requirements. 1. Selection: User makes a selection of product. 2. Waiting for Money Insertion: When user inserts money, money counter gives the amount of money inserted into the vending machine. 3. Product Delivery: If correct amount is inserted the product will be dispensed and in case of excess money insertion the balance amount will be returned to the user. 4. Service: The vending machine will demand for service if the product is unavailable in the machine. IV. VHDL IMPLEMENTATION The integrated circuit technology has become very complex
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International Journal of Systems , Algorithms & Applications

thereby the design at gate and flip flop level has become time consuming. In recent years this fact has motivated usage of hardware description language in the design process of digital circuits. Digital systems are of wide variety which range in complexity from a few gates to an interconnection of many complex integrated circuits. Such digital systems can be described and simulated using VHDL. Advantages of VHDL implementation includes minimum cost and time, better design, faster time to market and increased flexibility. The machine can vend four products; they are Kinley 1lt water bottle, Frooti 600ml bottle, Sprite 600ml bottle and Coca Cola as in table 1. Selection of products will be using four input selection pins as follows select1, select2, select3, select4. Inputs are taken for Rs_10 and Rs_20 represent inputs for Rs.10 and Rs.20 notes. Other input signals are clk and reset. When machine is reset it will return to its initial state. Cancel can be selected at any time to get the total amount of money inserted in the machine. Money signal indicates total price of products (bill amount). Money count is an internal signal updated each time a note is inserted at the positive edge of clock. Return is output signal to give the amount of money inserted into machine on activating cancel. Product is the output signal through which product is dispensed on inserting the price of the selected product. Change is the output signal through which the balance amount if any after deducting the price of the product is given. The direction and width of signal is given in table 2. V. PROPOSED DESIGN METHODOLOGY There are four states as described in operation. When reset is pressed the machine will be ready to use. The machine is in initial state. The first step is selection of product. After selection is made the machine will check for availability of product. If product is available it will wait for money insertion otherwise the machine will demand for service. Rs.10/- and Rs.20/- notes can be inserted. Suppose the price of the product is Rs. 30/-, customer can insert three 10/- rupee notes or one 10/- and one 20/- notes or two 20/- rupee notes. The control flow will be as shown in figure 3. The user can cancel the selection at any point of time. The inserted money into machine is returned in that particular transaction. If the money inserted is more than or equal to the price of that product then the product is delivered with balance change if any. The money signal is used to give bill for the particular transaction. Table I. Type Styles.
S.No. 1. 2. 3. 4. Products Kinley 1 lt water bottle Frooti 600ml Sprite 600ml Coca Cola Select Option Select1 Select2 Select3 Select4 Price 20/30/30/40/-

Select Product Yes Select 1 No Yes Select 2 Yes Select 3 No Select 4 No No

If product available

No

Yes

Insert desired money for selected Product

No
If right amount

Cancel the request

Yes Product out with change returns if any

Inserted money Returned

End

Figure 3. Flow chart for Proposed Vending Machine [5].

Table II. Direction and Width of Signals.

Name Clk reset Sel1 Sel2 Sel3 Sel4 cancel money Rs_10 Rs_20 change return product Width 1 1 1 1 1 1 1 7 1 1 7 7 1 Direction input input input input input input input input input input output output output Name Clk reset Sel1 Sel2 Sel3 Sel4 cancel money Rs_10 Rs_20 change return product

VI. SIMULATION RESULTS The user wants kinley bottle and has two 10/- rupee notes, first select1 is selected, if product is available then it will enter into waiting1 state, the machine will then enter into state1
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twice, money_count signal is updated to 20/- and the product is delivered.

machine requests for service so that the product is placed inside the machine and the machine is further said to be reset.

Figure 7. Simulation waveform when Kinley_count=0. Figure 4. Simulation waveform showing selection of Kinley.

The figure 4. shows the varying of money_count signal with respect to the applied Rs_10 signal only. And after the required processing time the product signal triggered into logic high. The variation of present state and next state can be observed with the selection of these control signals.

When product is unavailable and order is placed the machine requests for service that the product is placed inside the machine and the machine is further reset.

Figure 8. RTL view of Vending Machine. Figure 5. Simulation waveform showing selection of sprite.

With the usage of both Rs_10 and Rs_20, the selection of third product with varying states of present and next can be known from the figure 4. Customer selects product 1 and inserts the money and if the customer further cancels the order, the money inserted is returned through return signal and product is not delivered.

The details of resource utilization are given in table 4. And table 3 gives power dissipation values of the designed vending machine. The generated bit stream file has implemented on XC5VLX50T FPGA board because of high gate count and more maximum availability of ports for configuration. The proposed model has exhibited the delay of 5.279 ns and the calculated maximum operating frequency is 189.42 MHz.

Figure 6. Flow chart for Proposed Vending Machine.

When product is unavailable and if the order is placed the

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Figure 9. Technical Schematic.

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International Journal of Systems , Algorithms & Applications

The proposed design consist 66 slice registers and it has 8 GCLKs among which only one has used with utilization of 8%. The total power dissipation of the model is 450.64 mW with inclusion of both dynamic and quiescent quantities. And it has optimized worst case slacks of 0.458ns. The register transfer logic of the whole design is shown in Figure 8. And its internal gate level model circuitry after the post synthesis can be viewed in figure 9. Table III. Power Supply Summary
Parameter Supply Power Total 450.64 Dynamic 2.38 Quiescent 448.26

VII. CONCLUSION The design and implementation of Finite state machine (FSM) based vending machine is functionally verified using Xilinx ISE simulator 13.1 and the generated bit stream file has implemented in Virtex 5 XC5VLX50T FPGA board. And it has the advantage of less power consumption and the maximum operating frequency of 189.42 MHz also with less negative slack. In the next stage of this model is hardware realization of physical design using Cadence Encounter Tool with the optimized area, power and delay. REFERENCES
[1] Biplab Roy & Biswarup Mukherjee (2010) Design of Coffee Vending Machine using Single Electron Devices Proceedings of 2010 International Symposium on Electronic System Design. Pp38-43. [2] C. J Clement Singh, K Senthil Kumar, Jayanto Gope, Suman Basu & Subir Kumar Sarkar (2007) Single Electron Device based Automatic Tea Vending Machine proceedings of InternationalConference on Information and Communication Technology in Electrical Sciences (ICTES2007),pp891896. [3] J. Bhaskar, VHDL primer, Third Edition. [4] Xilinx Inc., Virtex 5 Data sheet: http://www.xilinx.co/support/ documentation/ user_guides/ug190.pdf [5] Ana Monga, Balwinder Singh, Finite State Machine based Vending Machine Controller with Auto-Billing Features, International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2, April 2012. [6] Peter Minns & Ian Elliott, FSM-based Digital Design using Verilog HDL, John Wiley & Sons Ltd 2008. [7] Steve Kilts, Advanced FPGA Design : Architecture,Implementation, and optimization, Wiley-IEEE press, 2007.

Table IV. Device Utilization Summary.

Slice Logic Utilization Number of Slice Registers Number of Slice LUTs Number of occupied Slices Number of LUT Flip Flop Number of slice register sites Number of bonded IOBs Number of BUFG/ Used 66 106 52 106 58 31 1 Available 28,800 28,800 7200 28,800 480 32 Utilization 1% 1% 1% 1% 6% 3%

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